- break;
- case iro_Minus:
- op1mode = get_irn_mode(in[1]);
- assert (
- /* Minus: BB x float --> float */
- op1mode == mymode && mode_is_float (op1mode) && "Minus node"
- );
- op_is_symmetric = 2;
- break;
- case iro_Mul:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- assert (
- /* Mul: BB x num x num --> num */
- mymode == op1mode && mymode == op2mode
- && mode_is_num (op1mode) && "Mul node"
- );
- op_is_symmetric = 2;
- break;
- case iro_Quot:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- op3mode = get_irn_mode(in[3]);
- assert (
- /* Quot: BB x M x float x float --> M x X x float */
- op1mode == mode_M && op2mode == op3mode
- && mode_is_float(op2mode) && mymode == mode_T && "Quot node"
- );
- op_is_symmetric = 2;
- break;
- case iro_DivMod:;
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- op3mode = get_irn_mode(in[3]);
- assert (
- /* DivMod: BB x M x num x num --> M x X x Is x Is */
- op1mode == mode_M && op2mode == op3mode
- && mode_is_num (op2mode) && mymode == mode_T && "DivMod node"
- );
- op_is_symmetric = 1;
- break;
- case iro_Div:
- case iro_Mod:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- op3mode = get_irn_mode(in[3]);
- assert (
- /* Div or Mod: BB x M x num x num --> M x X x Is */
- op1mode == mode_M && op2mode == op3mode &&
- mode_is_num (op2mode) && mymode == mode_T && "Div or Mod node"
- );
- op_is_symmetric = 1;
- break;
- case iro_Abs:
- op1mode = get_irn_mode(in[1]);
- assert (
- /* Abs: BB x num --> num */
- op1mode == mymode && mode_is_num (op1mode) && "Abs node"
- );
- op_is_symmetric = 2;
- break;
- case iro_And:
- case iro_Or:
- case iro_Eor:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- assert(
- /* And or Or or Eor: BB x int x int --> int */
- mymode == op1mode && mymode == op2mode
- && mode_is_int (mymode) && "And, Or or Eor node"
- );
- op_is_symmetric = 2;
- break;
- case iro_Not:
- op1mode = get_irn_mode(in[1]);
- assert(
- /* Not: BB x int --> int */
- mymode == op1mode
- && mode_is_int (mymode) && "Not node"
- );
- op_is_symmetric = 2;
- break;
-
- case iro_Cmp:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- assert(
- /* Cmp: BB x datab x datab --> b16 */
- op1mode == op2mode && mode_is_data (op1mode)
- && mymode == mode_T && "Cmp node"
- );
- break;
- case iro_Shl:
- case iro_Shr:
- case iro_Shrs:
- case iro_Rot:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- assert(
- /* Shl, Shr, Shrs or Rot: BB x int x Iu --> int */
- mode_is_int (op1mode) && op2mode == mode_Iu
- && op1mode == mymode && "Shl, Shr, Shr or Rot node"
- );
- break;
- case iro_Conv:
- op1mode = get_irn_mode(in[1]);
- assert(
- /* Conv: BB x datab1 --> datab2 */
- mode_is_datab (op1mode)
- && mode_is_data (mymode) && "Conv node"
- );
- break;
- case iro_Phi:
- /* Phi: BB x dataM^n --> dataM */
- /* for some reason "<=" aborts. Is there a problem with get_store? */
- for (i=1; i < get_irn_arity(n); i++) {
- if (!is_Bad(in[i]) && (get_irn_op(in[i]) != op_Unknown))
- assert ( get_irn_mode(in[i]) == mymode && "Phi node");
- };
- assert ( mode_is_dataM(mymode) && "Phi node");
- break;
- case iro_Load:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- assert(
- /* Load: BB x M x P --> M x X x data */
- op1mode == mode_M && op2mode == mode_P && "Load node"
- );
- assert ( mymode == mode_T && "Load node");
- break;
- case iro_Store:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- op3mode = get_irn_mode(in[3]);
- assert(
- /* Load: BB x M x P x data --> M x X */
- op1mode == mode_M && op2mode == mode_P
- && mode_is_data (op3mode) && "Store node"
- );
- assert(mymode == mode_T && "Store node");
- break;
- case iro_Alloc:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- assert(
- /* Alloc: BB x M x Iu --> M x X x P */
- op1mode == mode_M && op2mode == mode_Iu
- && mymode == mode_T && "Alloc node"
- );
- break;
- case iro_Free:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- op3mode = get_irn_mode(in[3]);
- assert(
- /* Free: BB x M x P x Iu --> M */
- op1mode == mode_M && op2mode == mode_P && op3mode == mode_Iu
- && mymode == mode_M && "Free node"
- );
- break;
- case iro_Sync:
- /* Sync: BB x M^n --> M */
- for (i=1; i < get_irn_arity(n); i++) {
- assert ( get_irn_mode(in[i]) == mode_M && "Sync node");
- };
- assert ( mymode == mode_M && "Sync node");
- break;
- case iro_Proj:
- vrfy_Proj_proj(n, irg);
- break;
- default: ;
- }
+ break;
+
+ case iro_Minus:
+ op1mode = get_irn_mode(in[1]);
+ ASSERT_AND_RET_DBG(
+ /* Minus: BB x float --> float */
+ op1mode == mymode && mode_is_float(op1mode), "Minus node", 0,
+ show_unop_failure(n , "/* Minus: BB x float --> float */");
+ );
+ op_is_symmetric = 2;
+ break;
+
+ case iro_Mul:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ ASSERT_AND_RET_DBG(
+ /* Mul: BB x int1 x int1 --> int2 */
+ ((mode_is_int(op1mode) && op2mode == op1mode && mode_is_int(mymode)) ||
+ /* Mul: BB x float x float --> float */
+ (mode_is_float(op1mode) && op2mode == op1mode && mymode == op1mode)),
+ "Mul node",0,
+ show_binop_failure(n, "/* Mul: BB x int1 x int1 --> int2 */ |\n"
+ "/* Mul: BB x float x float --> float */");
+ );
+ op_is_symmetric = 2;
+ break;
+
+ case iro_Quot:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ op3mode = get_irn_mode(in[3]);
+ ASSERT_AND_RET_DBG(
+ /* Quot: BB x M x float x float --> M x X x float */
+ op1mode == mode_M && op2mode == op3mode &&
+ get_mode_sort(op2mode) == irms_float_number &&
+ mymode == mode_T,
+ "Quot node",0,
+ show_binop_failure(n, "/* Quot: BB x M x float x float --> M x X x float */");
+ );
+ op_is_symmetric = 2;
+ break;
+
+ case iro_DivMod:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ op3mode = get_irn_mode(in[3]);
+ ASSERT_AND_RET(
+ /* DivMod: BB x M x int x int --> M x X x int x int */
+ op1mode == mode_M &&
+ mode_is_int(op2mode) &&
+ op3mode == op2mode &&
+ mymode == mode_T,
+ "DivMod node", 0
+ );
+ op_is_symmetric = 1;
+ break;
+
+ case iro_Div:
+ case iro_Mod:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ op3mode = get_irn_mode(in[3]);
+ ASSERT_AND_RET(
+ /* Div or Mod: BB x M x int x int --> M x X x int */
+ op1mode == mode_M &&
+ op2mode == op3mode &&
+ mode_is_int(op2mode) &&
+ mymode == mode_T,
+ "Div or Mod node", 0
+ );
+ op_is_symmetric = 1;
+ break;
+
+ case iro_Abs:
+ op1mode = get_irn_mode(in[1]);
+ ASSERT_AND_RET_DBG(
+ /* Abs: BB x num --> num */
+ op1mode == mymode &&
+ mode_is_num (op1mode),
+ "Abs node", 0,
+ show_unop_failure(n, "/* Abs: BB x num --> num */");
+ );
+ op_is_symmetric = 2;
+ break;
+
+ case iro_And:
+ case iro_Or:
+ case iro_Eor:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ ASSERT_AND_RET_DBG(
+ /* And or Or or Eor: BB x int x int --> int */
+ mode_is_int(mymode) &&
+ op2mode == op1mode &&
+ mymode == op2mode,
+ "And, Or or Eor node", 0,
+ show_binop_failure(n, "/* And or Or or Eor: BB x int x int --> int */");
+ );
+ op_is_symmetric = 2;
+ break;
+
+ case iro_Not:
+ op1mode = get_irn_mode(in[1]);
+ ASSERT_AND_RET_DBG(
+ /* Not: BB x int --> int */
+ mode_is_int(mymode) &&
+ mymode == op1mode,
+ "Not node", 0,
+ show_unop_failure(n, "/* Not: BB x int --> int */");
+ );
+ op_is_symmetric = 2;
+ break;
+
+
+ case iro_Cmp:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ ASSERT_AND_RET_DBG(
+ /* Cmp: BB x datab x datab --> b16 */
+ mode_is_data (op1mode) &&
+ op2mode == op1mode &&
+ mymode == mode_T,
+ "Cmp node", 0,
+ show_binop_failure(n, "/* Cmp: BB x datab x datab --> b16 */");
+ );
+ break;
+
+ case iro_Shl:
+ case iro_Shr:
+ case iro_Shrs:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ ASSERT_AND_RET_DBG(
+ /* Shl, Shr or Shrs: BB x int x int_u --> int */
+ mode_is_int(op1mode) &&
+ mode_is_int(op2mode) &&
+ !mode_is_signed(op2mode) &&
+ mymode == op1mode,
+ "Shl, Shr, Shr or Rot node", 0,
+ show_binop_failure(n, "/* Shl, Shr or Shrs: BB x int x int_u --> int */");
+ );
+ break;
+
+ case iro_Rot:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ ASSERT_AND_RET_DBG(
+ /* Rot: BB x int x int --> int */
+ mode_is_int(op1mode) &&
+ mode_is_int(op2mode) &&
+ mymode == op1mode,
+ "Rot node", 0,
+ show_binop_failure(n, "/* Rot: BB x int x int --> int */");
+ );
+ break;
+
+ case iro_Conv:
+ op1mode = get_irn_mode(in[1]);
+ ASSERT_AND_RET_DBG(
+ /* Conv: BB x datab1 --> datab2 */
+ mode_is_datab(op1mode) && mode_is_data(mymode),
+ "Conv node", 0,
+ show_unop_failure(n, "/* Conv: BB x datab1 --> datab2 */");
+ );
+ break;
+
+ case iro_Cast:
+ op1mode = get_irn_mode(in[1]);
+ ASSERT_AND_RET_DBG(
+ /* Conv: BB x datab1 --> datab2 */
+ mode_is_data(op1mode) && op1mode == mymode,
+ "Cast node", 0,
+ show_unop_failure(n, "/* Conv: BB x datab1 --> datab2 */");
+ );
+ break;
+
+ case iro_Phi:
+ {
+ ir_node *block = get_nodes_block(n);
+
+ if (! is_Bad(block) && get_irg_phase_state(get_irn_irg(n)) != phase_building) {
+ /* a Phi node MUST have the same number of inputs as its block */
+ ASSERT_AND_RET_DBG(
+ get_irn_arity(n) == get_irn_arity(block),
+ "wrong number of inputs in Phi node", 0,
+ show_phi_inputs(n, block);
+ );
+ }
+
+ /* Phi: BB x dataM^n --> dataM */
+ for (i = 1; i < get_irn_arity(n); i++) {
+ if (!is_Bad(in[i]) && (get_irn_op(in[i]) != op_Unknown))
+ ASSERT_AND_RET_DBG(
+ get_irn_mode(in[i]) == mymode,
+ "Phi node", 0,
+ show_phi_failure(n, in[i], i);
+ );
+ };
+ ASSERT_AND_RET( mode_is_dataM(mymode), "Phi node", 0 );
+ break;
+ }
+ case iro_Load:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ ASSERT_AND_RET(
+ /* Load: BB x M x ref --> M x X x data */
+ op1mode == mode_M && mode_is_reference(op2mode),
+ "Load node", 0
+ );
+ ASSERT_AND_RET( mymode == mode_T, "Load node", 0 );
+
+ /*
+ * jack's gen_add_firm_code:simpleSel seems to build Load (Load
+ * (Proj (Proj))) sometimes ...
+
+ * interprete.c:ai_eval seems to assume that this happens, too
+
+ * obset.c:get_abstval_any can't deal with this if the load has
+ * mode_T
+ *
+ {
+ entity *ent = hunt_for_entity (get_Load_ptr (n), n);
+ assert ((NULL != ent) || (mymode != mode_T));
+ }
+ */
+
+ break;
+
+ case iro_Store:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ op3mode = get_irn_mode(in[3]);
+ ASSERT_AND_RET(
+ /* Load: BB x M x ref data --> M x X */
+ op1mode == mode_M && mode_is_reference(op2mode) && mode_is_data(op3mode),
+ "Store node", 0
+ );
+ ASSERT_AND_RET(mymode == mode_T, "Store node", 0);
+
+ entity *target = get_ptr_entity(in[2]);
+ if (vrfy_entities && target && get_irg_phase_state(current_ir_graph) == phase_high) {
+ /*
+ * If lowered code, any Sels that add 0 may be removed, causing
+ * an direct access to entities of array or compound type.
+ * Prevent this by checking the phase.
+ */
+ ASSERT_AND_RET( op3mode == get_type_mode(get_entity_type(target)),
+ "Store node", 0);
+ }
+
+ break;
+
+ case iro_Alloc:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ ASSERT_AND_RET_DBG(
+ /* Alloc: BB x M x int_u --> M x X x ref */
+ op1mode == mode_M &&
+ mode_is_int(op2mode) &&
+ !mode_is_signed(op2mode) &&
+ mymode == mode_T,
+ "Alloc node", 0,
+ show_binop_failure(n, "/* Alloc: BB x M x int_u --> M x X x ref */");
+ );
+ break;
+
+ case iro_Free:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ ASSERT_AND_RET_DBG(
+ /* Free: BB x M x ref --> M */
+ op1mode == mode_M && mode_is_reference(op2mode) &&
+ mymode == mode_M,
+ "Free node", 0,
+ show_binop_failure(n, "/* Free: BB x M x ref --> M */");
+ );
+ break;
+
+ case iro_Sync:
+ /* Sync: BB x M^n --> M */
+ for (i=1; i < get_irn_arity(n); i++) {
+ ASSERT_AND_RET( get_irn_mode(in[i]) == mode_M, "Sync node", 0 );
+ };
+ ASSERT_AND_RET( mymode == mode_M, "Sync node", 0 );
+ break;
+
+ case iro_Proj:
+ return vrfy_Proj_proj(n, irg);
+ break;
+
+ case iro_Confirm:
+ op1mode = get_irn_mode(in[1]);
+ op2mode = get_irn_mode(in[2]);
+ ASSERT_AND_RET_DBG(
+ /* Confirm: BB x T x T --> T */
+ op1mode == mymode &&
+ op2mode == mymode,
+ "Confirm node", 0,
+ show_binop_failure(n, "/* Confirm: BB x T x T --> T */");
+ );
+ break;
+
+ default:
+ break;
+ }
+
+ /* All went ok */
+ return 1;