- break;
-
- case iro_Add:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- ASSERT_AND_RET_DBG(
- (
- /* common Add: BB x numP x numP --> numP */
- (op1mode == mymode && op2mode == op1mode && mode_is_numP(mymode)) ||
- /* Pointer Add: BB x ref x int --> ref */
- (mode_is_reference(op1mode) && mode_is_int(op2mode) && op1mode == mymode) ||
- /* Pointer Add: BB x int x ref --> ref */
- (mode_is_int(op1mode) && op2mode == mymode && mode_is_reference(mymode))
- ),
- "Add node", 0,
- show_binop_failure(n, "/* common Add: BB x numP x numP --> numP */ |\n"
- "/* Pointer Add: BB x ref x int --> ref */ |\n"
- "/* Pointer Add: BB x int x ref --> ref */");
- );
- if (mode_is_reference(op1mode) != mode_is_reference(op2mode)) {
- /* BB x ref x int --> ref or BB x int x ref --> ref */
- op_is_symmetric = 0;
- } else {
- /* BB x num x num --> num or BB x ref x ref */
- op_is_symmetric = 2;
- }
- break;
-
- case iro_Sub:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- ASSERT_AND_RET_DBG(
- /* common Sub: BB x numP x numP --> numP */
- ((mymode ==op1mode && mymode == op2mode && mode_is_numP(op1mode)) ||
- /* Pointer Sub: BB x ref x int --> ref */
- (op1mode == mymode && mode_is_int(op2mode) && mode_is_reference(mymode)) ||
- /* Pointer Sub: BB x int x ref --> ref */
- (mode_is_int(op1mode) && op2mode == mymode && mode_is_reference(mymode)) ||
- /* Pointer Sub: BB x ref x ref --> int */
- (op1mode == op2mode && mode_is_reference(op2mode) && mode_is_int(mymode))),
- "Sub node", 0,
- show_binop_failure(n, "/* common Sub: BB x numP x numP --> numP */ |\n"
- "/* Pointer Sub: BB x ref x int --> ref */ |\n"
- "/* Pointer Sub: BB x int x ref --> ref */ |\n"
- "/* Pointer Sub: BB x ref x ref --> int */" );
- );
- if (mode_is_reference(op1mode) != mode_is_reference(op2mode)) {
- op_is_symmetric = 0;
- } else {
- op_is_symmetric = 2;
- }
- break;
-
- case iro_Minus:
- op1mode = get_irn_mode(in[1]);
- ASSERT_AND_RET_DBG(
- /* Minus: BB x num --> num */
- op1mode == mymode && mode_is_num(op1mode), "Minus node", 0,
- show_unop_failure(n , "/* Minus: BB x num --> num */");
- );
- op_is_symmetric = 2;
- break;
-
- case iro_Mul:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- ASSERT_AND_RET_DBG(
- /* Mul: BB x int1 x int1 --> int2 */
- ((mode_is_int(op1mode) && op2mode == op1mode && mode_is_int(mymode)) ||
- /* Mul: BB x float x float --> float */
- (mode_is_float(op1mode) && op2mode == op1mode && mymode == op1mode)),
- "Mul node",0,
- show_binop_failure(n, "/* Mul: BB x int1 x int1 --> int2 */ |\n"
- "/* Mul: BB x float x float --> float */");
- );
- op_is_symmetric = 2;
- break;
-
- case iro_Quot:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- op3mode = get_irn_mode(in[3]);
- ASSERT_AND_RET_DBG(
- /* Quot: BB x M x float x float --> M x X x float */
- op1mode == mode_M && op2mode == op3mode &&
- get_mode_sort(op2mode) == irms_float_number &&
- mymode == mode_T,
- "Quot node",0,
- show_binop_failure(n, "/* Quot: BB x M x float x float --> M x X x float */");
- );
- op_is_symmetric = 2;
- break;
-
- case iro_DivMod:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- op3mode = get_irn_mode(in[3]);
- ASSERT_AND_RET(
- /* DivMod: BB x M x int x int --> M x X x int x int */
- op1mode == mode_M &&
- mode_is_int(op2mode) &&
- op3mode == op2mode &&
- mymode == mode_T,
- "DivMod node", 0
- );
- op_is_symmetric = 1;
- break;
-
- case iro_Div:
- case iro_Mod:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- op3mode = get_irn_mode(in[3]);
- ASSERT_AND_RET(
- /* Div or Mod: BB x M x int x int --> M x X x int */
- op1mode == mode_M &&
- op2mode == op3mode &&
- mode_is_int(op2mode) &&
- mymode == mode_T,
- "Div or Mod node", 0
- );
- op_is_symmetric = 1;
- break;
-
- case iro_Abs:
- op1mode = get_irn_mode(in[1]);
- ASSERT_AND_RET_DBG(
- /* Abs: BB x num --> num */
- op1mode == mymode &&
- mode_is_num (op1mode),
- "Abs node", 0,
- show_unop_failure(n, "/* Abs: BB x num --> num */");
- );
- op_is_symmetric = 2;
- break;
-
- case iro_And:
- case iro_Or:
- case iro_Eor:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- ASSERT_AND_RET_DBG(
- /* And or Or or Eor: BB x int x int --> int */
- mode_is_int(mymode) &&
- op2mode == op1mode &&
- mymode == op2mode,
- "And, Or or Eor node", 0,
- show_binop_failure(n, "/* And or Or or Eor: BB x int x int --> int */");
- );
- op_is_symmetric = 2;
- break;
-
- case iro_Not:
- op1mode = get_irn_mode(in[1]);
- ASSERT_AND_RET_DBG(
- /* Not: BB x int --> int */
- mode_is_int(mymode) &&
- mymode == op1mode,
- "Not node", 0,
- show_unop_failure(n, "/* Not: BB x int --> int */");
- );
- op_is_symmetric = 2;
- break;
-
-
- case iro_Cmp:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- ASSERT_AND_RET_DBG(
- /* Cmp: BB x datab x datab --> b16 */
- mode_is_data (op1mode) &&
- op2mode == op1mode &&
- mymode == mode_T,
- "Cmp node", 0,
- show_binop_failure(n, "/* Cmp: BB x datab x datab --> b16 */");
- );
- break;
-
- case iro_Shl:
- case iro_Shr:
- case iro_Shrs:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- ASSERT_AND_RET_DBG(
- /* Shl, Shr or Shrs: BB x int x int_u --> int */
- mode_is_int(op1mode) &&
- mode_is_int(op2mode) &&
- !mode_is_signed(op2mode) &&
- mymode == op1mode,
- "Shl, Shr, Shr or Rot node", 0,
- show_binop_failure(n, "/* Shl, Shr or Shrs: BB x int x int_u --> int */");
- );
- break;
-
- case iro_Rot:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- ASSERT_AND_RET_DBG(
- /* Rot: BB x int x int --> int */
- mode_is_int(op1mode) &&
- mode_is_int(op2mode) &&
- mymode == op1mode,
- "Rot node", 0,
- show_binop_failure(n, "/* Rot: BB x int x int --> int */");
- );
- break;
-
- case iro_Conv:
- op1mode = get_irn_mode(in[1]);
- ASSERT_AND_RET_DBG(
- /* Conv: BB x datab1 --> datab2 */
- mode_is_datab(op1mode) && mode_is_data(mymode),
- "Conv node", 0,
- show_unop_failure(n, "/* Conv: BB x datab1 --> datab2 */");
- );
- break;
-
- case iro_Cast:
- op1mode = get_irn_mode(in[1]);
- ASSERT_AND_RET_DBG(
- /* Conv: BB x datab1 --> datab2 */
- mode_is_data(op1mode) && op1mode == mymode,
- "Cast node", 0,
- show_unop_failure(n, "/* Conv: BB x datab1 --> datab2 */");
- );
- break;
-
- case iro_Phi:
- {
- ir_node *block = get_nodes_block(n);
-
- if (! is_Bad(block) && get_irg_phase_state(get_irn_irg(n)) != phase_building) {
- /* a Phi node MUST have the same number of inputs as its block */
- ASSERT_AND_RET_DBG(
- get_irn_arity(n) == get_irn_arity(block),
- "wrong number of inputs in Phi node", 0,
- show_phi_inputs(n, block);
- );
- }
-
- /* Phi: BB x dataM^n --> dataM */
- for (i = 1; i < get_irn_arity(n); i++) {
- if (!is_Bad(in[i]) && (get_irn_op(in[i]) != op_Unknown))
- ASSERT_AND_RET_DBG(
- get_irn_mode(in[i]) == mymode,
- "Phi node", 0,
- show_phi_failure(n, in[i], i);
- );
- };
- ASSERT_AND_RET( mode_is_dataM(mymode), "Phi node", 0 );
- break;
- }
- case iro_Load:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- ASSERT_AND_RET(
- /* Load: BB x M x ref --> M x X x data */
- op1mode == mode_M && mode_is_reference(op2mode),
- "Load node", 0
- );
- ASSERT_AND_RET( mymode == mode_T, "Load node", 0 );
-
- /*
- * jack's gen_add_firm_code:simpleSel seems to build Load (Load
- * (Proj (Proj))) sometimes ...
-
- * interprete.c:ai_eval seems to assume that this happens, too
-
- * obset.c:get_abstval_any can't deal with this if the load has
- * mode_T
- *
- {
- entity *ent = hunt_for_entity (get_Load_ptr (n), n);
- assert ((NULL != ent) || (mymode != mode_T));
- }
- */
-
- break;
-
- case iro_Store: {
- entity *target;
-
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- op3mode = get_irn_mode(in[3]);
- ASSERT_AND_RET(
- /* Load: BB x M x ref data --> M x X */
- op1mode == mode_M && mode_is_reference(op2mode) && mode_is_data(op3mode),
- "Store node", 0
- );
- ASSERT_AND_RET(mymode == mode_T, "Store node", 0);
-
- target = get_ptr_entity(in[2]);
- if (vrfy_entities && target && get_irg_phase_state(current_ir_graph) == phase_high) {
- /*
- * If lowered code, any Sels that add 0 may be removed, causing
- * an direct access to entities of array or compound type.
- * Prevent this by checking the phase.
- */
- ASSERT_AND_RET( op3mode == get_type_mode(get_entity_type(target)),
- "Store node", 0);
- }
-
- break;
- }
-
- case iro_Alloc:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- ASSERT_AND_RET_DBG(
- /* Alloc: BB x M x int_u --> M x X x ref */
- op1mode == mode_M &&
- mode_is_int(op2mode) &&
- !mode_is_signed(op2mode) &&
- mymode == mode_T,
- "Alloc node", 0,
- show_binop_failure(n, "/* Alloc: BB x M x int_u --> M x X x ref */");
- );
- break;
-
- case iro_Free:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- op3mode = get_irn_mode(in[3]);
- ASSERT_AND_RET_DBG(
- /* Free: BB x M x ref x int_u --> M */
- op1mode == mode_M && mode_is_reference(op2mode) &&
- mode_is_int(op3mode) &&
- !mode_is_signed(op3mode) &&
- mymode == mode_M,
- "Free node", 0,
- show_triop_failure(n, "/* Free: BB x M x ref x int_u --> M */");
- );
- break;
-
- case iro_Sync:
- /* Sync: BB x M^n --> M */
- for (i=1; i < get_irn_arity(n); i++) {
- ASSERT_AND_RET( get_irn_mode(in[i]) == mode_M, "Sync node", 0 );
- };
- ASSERT_AND_RET( mymode == mode_M, "Sync node", 0 );
- break;
-
- case iro_Proj:
- return vrfy_Proj_proj(n, irg);
- break;
-
- case iro_Confirm:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- ASSERT_AND_RET_DBG(
- /* Confirm: BB x T x T --> T */
- op1mode == mymode &&
- op2mode == mymode,
- "Confirm node", 0,
- show_binop_failure(n, "/* Confirm: BB x T x T --> T */");
- );
- break;
-
- case iro_Mux:
- op1mode = get_irn_mode(in[1]);
- op2mode = get_irn_mode(in[2]);
- op3mode = get_irn_mode(in[3]);
- ASSERT_AND_RET(
- /* Mux: BB x b x numP x numP --> numP */
- op1mode == mode_b &&
- op2mode == mymode &&
- op3mode == mymode &&
- mode_is_numP(mymode),
- "Mux node", 0
- );
- break;
-
- default:
- break;
- }
-
- /* All went ok */
- return 1;
-}
-
-int irn_vrfy(ir_node *n)
-{
- int res = 1;
+ return 1;
+}
+
+/**
+ * verify an Add node
+ */
+static int verify_node_Add(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Add_left(n));
+ ir_mode *op2mode = get_irn_mode(get_Add_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ (
+ /* common Add: BB x numP x numP --> numP */
+ (op1mode == mymode && op2mode == op1mode && mode_is_data(mymode)) ||
+ /* Pointer Add: BB x ref x int --> ref */
+ (mode_is_reference(op1mode) && mode_is_int(op2mode) && op1mode == mymode) ||
+ /* Pointer Add: BB x int x ref --> ref */
+ (mode_is_int(op1mode) && op2mode == mymode && mode_is_reference(mymode))
+ ),
+ "Add node", 0,
+ show_binop_failure(n, "/* common Add: BB x numP x numP --> numP */ |\n"
+ "/* Pointer Add: BB x ref x int --> ref */ |\n"
+ "/* Pointer Add: BB x int x ref --> ref */");
+ );
+ return 1;
+}
+
+/**
+ * verify a Sub node
+ */
+static int verify_node_Sub(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Sub_left(n));
+ ir_mode *op2mode = get_irn_mode(get_Sub_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ (
+ /* common Sub: BB x numP x numP --> numP */
+ (mymode ==op1mode && mymode == op2mode && mode_is_data(op1mode)) ||
+ /* Pointer Sub: BB x ref x int --> ref */
+ (op1mode == mymode && mode_is_int(op2mode) && mode_is_reference(mymode)) ||
+ /* Pointer Sub: BB x ref x ref --> int */
+ (op1mode == op2mode && mode_is_reference(op2mode) && mode_is_int(mymode))
+ ),
+ "Sub node", 0,
+ show_binop_failure(n, "/* common Sub: BB x numP x numP --> numP */ |\n"
+ "/* Pointer Sub: BB x ref x int --> ref */ |\n"
+ "/* Pointer Sub: BB x ref x ref --> int */" );
+ );
+ return 1;
+}
+
+/**
+ * verify a Minus node
+ */
+static int verify_node_Minus(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Minus_op(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ /* Minus: BB x num --> num */
+ op1mode == mymode && mode_is_num(op1mode), "Minus node", 0,
+ show_unop_failure(n , "/* Minus: BB x num --> num */");
+ );
+ return 1;
+}
+
+/**
+ * verify a Mul node
+ */
+static int verify_node_Mul(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Mul_left(n));
+ ir_mode *op2mode = get_irn_mode(get_Mul_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ (
+ /* Mul: BB x int_n x int_n --> int_n|int_2n */
+ (mode_is_int(op1mode) && op2mode == op1mode && mode_is_int(mymode) &&
+ (op1mode == mymode || get_mode_size_bits(op1mode) * 2 == get_mode_size_bits(mymode))) ||
+ /* Mul: BB x float x float --> float */
+ (mode_is_float(op1mode) && op2mode == op1mode && mymode == op1mode)
+ ),
+ "Mul node",0,
+ show_binop_failure(n, "/* Mul: BB x int_n x int_n --> int_n|int_2n */ |\n"
+ "/* Mul: BB x float x float --> float */");
+ );
+ return 1;
+}
+
+/**
+ * verify a Mulh node
+ */
+static int verify_node_Mulh(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Mulh_left(n));
+ ir_mode *op2mode = get_irn_mode(get_Mulh_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ (
+ /* Mulh: BB x int x int --> int */
+ (mode_is_int(op1mode) && op2mode == op1mode && op1mode == mymode)
+ ),
+ "Mulh node",0,
+ show_binop_failure(n, "/* Mulh: BB x int x int --> int */");
+ );
+ return 1;
+}
+
+/**
+ * verify a Quot node
+ */
+static int verify_node_Quot(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Quot_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_Quot_left(n));
+ ir_mode *op3mode = get_irn_mode(get_Quot_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ /* Quot: BB x M x float x float --> M x X x float */
+ op1mode == mode_M && op2mode == op3mode &&
+ get_mode_sort(op2mode) == irms_float_number &&
+ mymode == mode_T,
+ "Quot node",0,
+ show_binop_failure(n, "/* Quot: BB x M x float x float --> M x X x float */");
+ );
+ return 1;
+}
+
+/**
+ * verify a DivMod node
+ */
+static int verify_node_DivMod(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_DivMod_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_DivMod_left(n));
+ ir_mode *op3mode = get_irn_mode(get_DivMod_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET(
+ /* DivMod: BB x M x int x int --> M x X x int x int */
+ op1mode == mode_M &&
+ mode_is_int(op2mode) &&
+ op3mode == op2mode &&
+ mymode == mode_T,
+ "DivMod node", 0
+ );
+ return 1;
+}
+
+/**
+ * verify a Div node
+ */
+static int verify_node_Div(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Div_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_Div_left(n));
+ ir_mode *op3mode = get_irn_mode(get_Div_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET(
+ /* Div: BB x M x int x int --> M x X x int */
+ op1mode == mode_M &&
+ op2mode == op3mode &&
+ mode_is_int(op2mode) &&
+ mymode == mode_T,
+ "Div node", 0
+ );
+ return 1;
+}
+
+/**
+ * verify a Mod node
+ */
+static int verify_node_Mod(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Mod_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_Mod_left(n));
+ ir_mode *op3mode = get_irn_mode(get_Mod_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET(
+ /* Mod: BB x M x int x int --> M x X x int */
+ op1mode == mode_M &&
+ op2mode == op3mode &&
+ mode_is_int(op2mode) &&
+ mymode == mode_T,
+ "Mod node", 0
+ );
+ return 1;
+}
+
+/**
+ * verify an Abs node
+ */
+static int verify_node_Abs(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Abs_op(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ /* Abs: BB x num --> num */
+ op1mode == mymode &&
+ mode_is_num (op1mode),
+ "Abs node", 0,
+ show_unop_failure(n, "/* Abs: BB x num --> num */");
+ );
+ return 1;
+}
+
+/**
+ * verify a logical And, Or, Eor node
+ */
+static int verify_node_Logic(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_binop_left(n));
+ ir_mode *op2mode = get_irn_mode(get_binop_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ /* And or Or or Eor: BB x int x int --> int */
+ (mode_is_int(mymode) || mymode == mode_b) &&
+ op2mode == op1mode &&
+ mymode == op2mode,
+ "And, Or or Eor node", 0,
+ show_binop_failure(n, "/* And or Or or Eor: BB x int x int --> int */");
+ );
+ return 1;
+}
+
+#define verify_node_And verify_node_Logic
+#define verify_node_Or verify_node_Logic
+#define verify_node_Eor verify_node_Logic
+
+/**
+ * verify a Not node
+ */
+static int verify_node_Not(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Not_op(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ /* Not: BB x int --> int */
+ (mode_is_int(mymode) || mymode == mode_b) &&
+ mymode == op1mode,
+ "Not node", 0,
+ show_unop_failure(n, "/* Not: BB x int --> int */");
+ );
+ return 1;
+}
+
+/**
+ * verify a Cmp node
+ */
+static int verify_node_Cmp(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Cmp_left(n));
+ ir_mode *op2mode = get_irn_mode(get_Cmp_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ /* Cmp: BB x datab x datab --> b16 */
+ mode_is_datab(op1mode) &&
+ op2mode == op1mode &&
+ mymode == mode_T,
+ "Cmp node", 0,
+ show_binop_failure(n, "/* Cmp: BB x datab x datab --> b16 */");
+ );
+ return 1;
+}
+
+/**
+ * verify a Shift node
+ */
+static int verify_node_Shift(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_binop_left(n));
+ ir_mode *op2mode = get_irn_mode(get_binop_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ /* Shl, Shr or Shrs: BB x int x int_u --> int */
+ mode_is_int(op1mode) &&
+ mode_is_int(op2mode) &&
+ !mode_is_signed(op2mode) &&
+ mymode == op1mode,
+ "Shl, Shr or Shrs node", 0,
+ show_binop_failure(n, "/* Shl, Shr or Shrs: BB x int x int_u --> int */");
+ );
+ return 1;
+}
+
+#define verify_node_Shl verify_node_Shift
+#define verify_node_Shr verify_node_Shift
+#define verify_node_Shrs verify_node_Shift
+
+/**
+ * verify a Rotl node
+ */
+static int verify_node_Rotl(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Rotl_left(n));
+ ir_mode *op2mode = get_irn_mode(get_Rotl_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ /* Rotl: BB x int x int --> int */
+ mode_is_int(op1mode) &&
+ mode_is_int(op2mode) &&
+ mymode == op1mode,
+ "Rotl node", 0,
+ show_binop_failure(n, "/* Rotl: BB x int x int --> int */");
+ );
+ return 1;
+}
+
+/**
+ * verify a Conv node
+ */
+static int verify_node_Conv(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Conv_op(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ get_irg_phase_state(irg) == phase_backend ||
+ (mode_is_datab(op1mode) && mode_is_data(mymode)),
+ "Conv node", 0,
+ show_unop_failure(n, "/* Conv: BB x datab --> data */");
+ );
+ return 1;
+}
+
+/**
+ * verify a Cast node
+ */
+static int verify_node_Cast(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Cast_op(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ /* Conv: BB x datab1 --> datab2 */
+ mode_is_data(op1mode) && op1mode == mymode,
+ "Cast node", 0,
+ show_unop_failure(n, "/* Conv: BB x datab1 --> datab2 */");
+ );
+ return 1;
+}
+
+/**
+ * verify a Phi node
+ */
+static int verify_node_Phi(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_node *block = get_nodes_block(n);
+ int i;
+ (void) irg;
+
+ if (! is_Bad(block) && get_irg_phase_state(get_irn_irg(n)) != phase_building && get_irn_arity(n) > 0) {
+ /* a Phi node MUST have the same number of inputs as its block */
+ ASSERT_AND_RET_DBG(
+ get_irn_arity(n) == get_irn_arity(block),
+ "wrong number of inputs in Phi node", 0,
+ show_phi_inputs(n, block);
+ );
+ }
+
+ /* Phi: BB x dataM^n --> dataM */
+ for (i = get_Phi_n_preds(n) - 1; i >= 0; --i) {
+ ir_node *pred = get_Phi_pred(n, i);
+ if (!is_Bad(pred)) {
+ ASSERT_AND_RET_DBG(
+ get_irn_mode(pred) == mymode,
+ "Phi node", 0,
+ show_phi_failure(n, pred, i);
+ );
+ }
+ }
+ ASSERT_AND_RET(mode_is_dataM(mymode) || mymode == mode_b, "Phi node", 0 );
+
+ if (mymode == mode_M) {
+ for (i = get_Phi_n_preds(n) - 1; i >= 0; --i) {
+ int j;
+ ir_node *pred_i = get_Phi_pred(n, i);
+
+ if (is_Bad(pred_i))
+ continue;
+ for (j = i - 1; j >= 0; --j) {
+ ir_node *pred_j = get_Phi_pred(n, j);
+
+ if (is_Bad(pred_j))
+ continue;
+#if 0
+ /* currently this checks fails for blocks with exception
+ outputs (and these are NOT basic blocks). So it is disabled yet. */
+ ASSERT_AND_RET_DBG(
+ (pred_i == pred_j) || (get_irn_n(pred_i, -1) != get_irn_n(pred_j, -1)),
+ "At least two different PhiM predecessors are in the same block",
+ 0,
+ ir_printf("%+F and %+F of %+F are in %+F\n", pred_i, pred_j, n, get_irn_n(pred_i, -1))
+ );
+#endif
+ }
+ }
+ }
+ return 1;
+}
+
+/**
+ * verify a Filter node
+ */
+static int verify_node_Filter(ir_node *n, ir_graph *irg) {
+ (void) n;
+ (void) irg;
+#ifdef INTERPROCEDURAL_VIEW
+ ASSERT_AND_RET((get_irp_ip_view_state() != ip_view_no),
+ "Filter may only appear if ip view is constructed.", 0);
+#endif
+ /* We should further do tests as for Proj and Phi. */
+ return 1;
+}
+
+/**
+ * verify a Load node
+ */
+static int verify_node_Load(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Load_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_Load_ptr(n));
+
+ ASSERT_AND_RET(op1mode == mode_M, "Load node", 0);
+ if (get_irg_phase_state(irg) != phase_backend) {
+ ASSERT_AND_RET(mode_is_reference(op2mode), "Load node", 0 );
+ } else {
+ ASSERT_AND_RET(mode_is_reference(op2mode) ||
+ (mode_is_int(op2mode) && get_mode_size_bits(op2mode) == get_mode_size_bits(mode_P)), "Load node", 0 );
+ }
+ ASSERT_AND_RET( mymode == mode_T, "Load node", 0 );
+
+ /*
+ * jack's gen_add_firm_code:simpleSel seems to build Load (Load
+ * (Proj (Proj))) sometimes ...
+
+ * interprete.c:ai_eval seems to assume that this happens, too
+
+ * obset.c:get_abstval_any can't deal with this if the load has
+ * mode_T
+ *
+ {
+ ir_entity *ent = hunt_for_entity (get_Load_ptr (n), n);
+ assert ((NULL != ent) || (mymode != mode_T));
+ }
+ */
+
+ return 1;
+}
+
+/**
+ * verify a Store node
+ */
+static int verify_node_Store(ir_node *n, ir_graph *irg) {
+ ir_entity *target;
+
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Store_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_Store_ptr(n));
+ ir_mode *op3mode = get_irn_mode(get_Store_value(n));
+
+ ASSERT_AND_RET(op1mode == mode_M && mode_is_datab(op3mode), "Store node", 0 );
+ if (get_irg_phase_state(irg) != phase_backend) {
+ ASSERT_AND_RET(mode_is_reference(op2mode), "Store node", 0 );
+ } else {
+ ASSERT_AND_RET(mode_is_reference(op2mode) ||
+ (mode_is_int(op2mode) && get_mode_size_bits(op2mode) == get_mode_size_bits(mode_P)), "Store node", 0 );
+ }
+ ASSERT_AND_RET(mymode == mode_T, "Store node", 0);
+
+ target = get_ptr_entity(get_Store_ptr(n));
+ if (vrfy_entities && target && get_irg_phase_state(current_ir_graph) == phase_high) {
+ /*
+ * If lowered code, any Sels that add 0 may be removed, causing
+ * an direct access to entities of array or compound type.
+ * Prevent this by checking the phase.
+ */
+ ASSERT_AND_RET( op3mode == get_type_mode(get_entity_type(target)),
+ "Store node", 0);
+ }
+
+ return 1;
+}
+
+/**
+ * verify an Alloc node
+ */
+static int verify_node_Alloc(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Alloc_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_Alloc_size(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ /* Alloc: BB x M x int_u --> M x X x ref */
+ op1mode == mode_M &&
+ mode_is_int(op2mode) &&
+ !mode_is_signed(op2mode) &&
+ mymode == mode_T,
+ "Alloc node", 0,
+ show_node_failure(n);
+ );
+ return 1;
+}
+
+/**
+ * verify a Free node
+ */
+static int verify_node_Free(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Free_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_Free_ptr(n));
+ ir_mode *op3mode = get_irn_mode(get_Free_size(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ /* Free: BB x M x ref x int_u --> M */
+ op1mode == mode_M && mode_is_reference(op2mode) &&
+ mode_is_int(op3mode) &&
+ !mode_is_signed(op3mode) &&
+ mymode == mode_M,
+ "Free node", 0,
+ show_triop_failure(n, "/* Free: BB x M x ref x int_u --> M */");
+ );
+ return 1;
+}
+
+/**
+ * verify a Sync node
+ */
+static int verify_node_Sync(ir_node *n, ir_graph *irg) {
+ int i;
+ ir_mode *mymode = get_irn_mode(n);
+ (void) irg;
+
+ /* Sync: BB x M^n --> M */
+ for (i = get_Sync_n_preds(n) - 1; i >= 0; --i) {
+ ASSERT_AND_RET( get_irn_mode(get_Sync_pred(n, i)) == mode_M, "Sync node", 0 );
+ };
+ ASSERT_AND_RET( mymode == mode_M, "Sync node", 0 );
+ return 1;
+}
+
+/**
+ * verify a Confirm node
+ */
+static int verify_node_Confirm(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Confirm_value(n));
+ ir_mode *op2mode = get_irn_mode(get_Confirm_bound(n));
+ (void) irg;
+
+ ASSERT_AND_RET_DBG(
+ /* Confirm: BB x T x T --> T */
+ op1mode == mymode &&
+ op2mode == mymode,
+ "Confirm node", 0,
+ show_binop_failure(n, "/* Confirm: BB x T x T --> T */");
+ );
+ return 1;
+}
+
+/**
+ * verify a Mux node
+ */
+static int verify_node_Mux(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Mux_sel(n));
+ ir_mode *op2mode = get_irn_mode(get_Mux_true(n));
+ ir_mode *op3mode = get_irn_mode(get_Mux_false(n));
+ (void) irg;
+
+ ASSERT_AND_RET(
+ /* Mux: BB x b x datab x datab --> datab */
+ op1mode == mode_b &&
+ op2mode == mymode &&
+ op3mode == mymode &&
+ mode_is_datab(mymode),
+ "Mux node", 0
+ );
+ return 1;
+}
+
+/**
+ * verify a CopyB node
+ */
+static int verify_node_CopyB(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_CopyB_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_CopyB_dst(n));
+ ir_mode *op3mode = get_irn_mode(get_CopyB_src(n));
+ ir_type *t = get_CopyB_type(n);
+
+ /* CopyB: BB x M x ref x ref --> M x X */
+ ASSERT_AND_RET(mymode == mode_T && op1mode == mode_M, "CopyB node", 0);
+ if (get_irg_phase_state(irg) != phase_backend) {
+ ASSERT_AND_RET(mode_is_reference(op2mode) && mode_is_reference(op3mode),
+ "CopyB node", 0 );
+ } else {
+ ASSERT_AND_RET(mode_is_reference(op2mode) ||
+ (mode_is_int(op2mode) && get_mode_size_bits(op2mode) == get_mode_size_bits(mode_P)), "CopyB node", 0 );
+ ASSERT_AND_RET(mode_is_reference(op3mode) ||
+ (mode_is_int(op3mode) && get_mode_size_bits(op3mode) == get_mode_size_bits(mode_P)), "CopyB node", 0 );
+ }
+
+ ASSERT_AND_RET(
+ is_compound_type(t),
+ "CopyB node should copy compound types only", 0 );
+
+ /* NoMem nodes are only allowed as memory input if the CopyB is NOT pinned.
+ This should happen RARELY, as CopyB COPIES MEMORY */
+ ASSERT_AND_RET(verify_right_pinned(n), "CopyB node with wrong memory input", 0 );
+ return 1;
+}
+
+/**
+ * verify a Bound node
+ */
+static int verify_node_Bound(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Bound_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_Bound_index(n));
+ ir_mode *op3mode = get_irn_mode(get_Bound_lower(n));
+ ir_mode *op4mode = get_irn_mode(get_Bound_upper(n));
+ (void) irg;
+
+ /* Bound: BB x M x int x int x int --> M x X */
+ ASSERT_AND_RET(
+ mymode == mode_T &&
+ op1mode == mode_M &&
+ op2mode == op3mode &&
+ op3mode == op4mode &&
+ mode_is_int(op3mode),
+ "Bound node", 0 );
+ return 1;
+}
+
+/**
+ * Check dominance.
+ * For each usage of a node, it is checked, if the block of the
+ * node dominates the block of the usage (for phis: the predecessor
+ * block of the phi for the corresponding edge).
+ *
+ * @return non-zero on success, 0 on dominance error
+ */
+static int check_dominance_for_node(ir_node *use) {
+ if (is_Block(use)) {
+ ir_node *mbh = get_Block_MacroBlock(use);
+
+ if (mbh != use) {
+ /* must be a partBlock */
+ if (is_Block(mbh)) {
+ ASSERT_AND_RET(block_dominates(mbh, use), "MacroBlock header must dominate a partBlock", 0);
+ }
+ }
+ }
+ /* This won't work for blocks and the end node */
+ else if (use != get_irg_end(current_ir_graph) && use != current_ir_graph->anchor) {
+ int i;
+ ir_node *bl = get_nodes_block(use);
+
+ for (i = get_irn_arity(use) - 1; i >= 0; --i) {
+ ir_node *def = get_irn_n(use, i);
+ ir_node *def_bl = get_nodes_block(def);
+ ir_node *use_bl = bl;
+
+ /* ignore dead definition blocks, will be removed */
+ if (is_Block_dead(def_bl) || get_Block_dom_depth(def_bl) == -1)
+ continue;
+
+ if (is_Phi(use))
+ use_bl = get_Block_cfgpred_block(bl, i);
+
+ /* ignore dead use blocks, will be removed */
+ if (is_Block_dead(use_bl) || get_Block_dom_depth(use_bl) == -1)
+ continue;
+
+ ASSERT_AND_RET_DBG(
+ block_dominates(def_bl, use_bl),
+ "the definition of a value used violates the dominance property", 0,
+ ir_fprintf(stderr,
+ "graph %+F: %+F of %+F must dominate %+F of user %+F input %d\n",
+ current_ir_graph, def_bl, def, use_bl, use, i
+ );
+ );
+ }
+ }
+ return 1;
+}
+
+/* Tests the modes of n and its predecessors. */
+int irn_vrfy_irg(ir_node *n, ir_graph *irg) {
+ int i;
+ ir_op *op;
+
+ if (!get_node_verification_mode())
+ return 1;
+
+ if (!get_interprocedural_view()) {
+ /*
+ * do NOT check placement in interprocedural view, as we don't always know
+ * the "right" graph ...
+ */
+ ASSERT_AND_RET_DBG(
+ node_is_in_irgs_storage(irg, n),
+ "Node is not stored on proper IR graph!", 0,
+ show_node_on_graph(irg, n);
+ );
+ assert(get_irn_irg(n) == irg);
+ {
+ unsigned idx = get_irn_idx(n);
+ ir_node *node_from_map = get_idx_irn(irg, idx);
+ ASSERT_AND_RET_DBG(node_from_map == n, "Node index and index map entry differ", 0, ir_printf("node %+F node in map %+F(%p)", n, node_from_map, node_from_map));
+ }
+ }
+
+ op = get_irn_op(n);
+
+ /* We don't want to test nodes whose predecessors are Bad,
+ as we would have to special case that for each operation. */
+ if (op != op_Phi && op != op_Block) {
+ for (i = get_irn_arity(n) - 1; i >= 0; --i) {
+ if (is_Bad(get_irn_n(n, i)))
+ return 1;
+ }
+ }
+
+ if (_get_op_pinned(op) >= op_pin_state_exc_pinned) {
+ op_pin_state state = get_irn_pinned(n);
+ ASSERT_AND_RET_DBG(
+ state == op_pin_state_floats ||
+ state == op_pin_state_pinned,
+ "invalid pin state", 0,
+ ir_printf("node %+F", n));
+ }
+
+ if (op->ops.verify_node)
+ return op->ops.verify_node(n, irg);
+
+ /* All went ok */
+ return 1;
+}
+
+int irn_vrfy(ir_node *n) {