- ir_mode *mymode = get_irn_mode(n);
- ir_mode *op1mode = get_irn_mode(get_Mux_sel(n));
- ir_mode *op2mode = get_irn_mode(get_Mux_true(n));
- ir_mode *op3mode = get_irn_mode(get_Mux_false(n));
-
- ASSERT_AND_RET(
- /* Mux: BB x b x numP x numP --> numP */
- op1mode == mode_b &&
- op2mode == mymode &&
- op3mode == mymode &&
- mode_is_numP(mymode),
- "Mux node", 0
- );
- return 1;
-}
-
-int irn_vrfy_irg(ir_node *n, ir_graph *irg)
-{
- int i;
- ir_op *op;
-
- if (!opt_do_node_verification) return 1;
-
- if (! get_interprocedural_view()) {
- /*
- * do NOT check placement in interprocedural view, as we don't always know
- * the "right" graph ...
- */
- ASSERT_AND_RET_DBG(
- node_is_in_irgs_storage(irg, n),
- "Node is not stored on proper IR graph!", 0,
- show_node_on_graph(irg, n);
- );
- assert(get_irn_irg(n) == irg);
- }
-
- op = get_irn_op(n);
-
- /* We don't want to test nodes whose predecessors are Bad,
- as we would have to special case that for each operation. */
- if (op != op_Phi && op != op_Block)
- for (i = get_irn_arity(n) - 1; i >= 0; --i) {
- if (is_Bad(get_irn_n(n, i)))
- return 1;
- }
-
- if (op->verify_node)
- return op->verify_node(n, irg);
-
- /* All went ok */
- return 1;
-}
-
-int irn_vrfy(ir_node *n)
-{
- int res = 1;
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Mux_sel(n));
+ ir_mode *op2mode = get_irn_mode(get_Mux_true(n));
+ ir_mode *op3mode = get_irn_mode(get_Mux_false(n));
+ (void) irg;
+
+ ASSERT_AND_RET(
+ /* Mux: BB x b x datab x datab --> datab */
+ op1mode == mode_b &&
+ op2mode == mymode &&
+ op3mode == mymode &&
+ mode_is_datab(mymode),
+ "Mux node", 0
+ );
+ return 1;
+}
+
+/**
+ * verify a CopyB node
+ */
+static int verify_node_CopyB(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_CopyB_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_CopyB_dst(n));
+ ir_mode *op3mode = get_irn_mode(get_CopyB_src(n));
+ ir_type *t = get_CopyB_type(n);
+
+ /* CopyB: BB x M x ref x ref --> M x X */
+ ASSERT_AND_RET(mymode == mode_T && op1mode == mode_M, "CopyB node", 0);
+ if (get_irg_phase_state(irg) != phase_backend) {
+ ASSERT_AND_RET(mode_is_reference(op2mode) && mode_is_reference(op3mode),
+ "CopyB node", 0 );
+ } else {
+ ASSERT_AND_RET(mode_is_reference(op2mode) ||
+ (mode_is_int(op2mode) && get_mode_size_bits(op2mode) == get_mode_size_bits(mode_P)), "CopyB node", 0 );
+ ASSERT_AND_RET(mode_is_reference(op3mode) ||
+ (mode_is_int(op3mode) && get_mode_size_bits(op3mode) == get_mode_size_bits(mode_P)), "CopyB node", 0 );
+ }
+
+ ASSERT_AND_RET(
+ is_compound_type(t),
+ "CopyB node should copy compound types only", 0 );
+
+ /* NoMem nodes are only allowed as memory input if the CopyB is NOT pinned.
+ This should happen RARELY, as CopyB COPIES MEMORY */
+ ASSERT_AND_RET(verify_right_pinned(n), "CopyB node with wrong memory input", 0 );
+ return 1;
+}
+
+/**
+ * verify a Bound node
+ */
+static int verify_node_Bound(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_Bound_mem(n));
+ ir_mode *op2mode = get_irn_mode(get_Bound_index(n));
+ ir_mode *op3mode = get_irn_mode(get_Bound_lower(n));
+ ir_mode *op4mode = get_irn_mode(get_Bound_upper(n));
+ (void) irg;
+
+ /* Bound: BB x M x int x int x int --> M x X */
+ ASSERT_AND_RET(
+ mymode == mode_T &&
+ op1mode == mode_M &&
+ op2mode == op3mode &&
+ op3mode == op4mode &&
+ mode_is_int(op3mode),
+ "Bound node", 0 );
+ return 1;
+}
+
+/**
+ * Check dominance.
+ * For each usage of a node, it is checked, if the block of the
+ * node dominates the block of the usage (for phis: the predecessor
+ * block of the phi for the corresponding edge).
+ *
+ * @return non-zero on success, 0 on dominance error
+ */
+static int check_dominance_for_node(ir_node *use) {
+ if (is_Block(use)) {
+ ir_node *mbh = get_Block_MacroBlock(use);
+
+ if (mbh != use) {
+ /* must be a partBlock */
+ if (is_Block(mbh)) {
+ ASSERT_AND_RET(block_dominates(mbh, use), "MacroBlock header must dominate a partBlock", 0);
+ }
+ }
+ }
+ /* This won't work for blocks and the end node */
+ else if (use != get_irg_end(current_ir_graph) && use != current_ir_graph->anchor) {
+ int i;
+ ir_node *bl = get_nodes_block(use);
+
+ for (i = get_irn_arity(use) - 1; i >= 0; --i) {
+ ir_node *def = get_irn_n(use, i);
+ ir_node *def_bl = get_nodes_block(def);
+ ir_node *use_bl = bl;
+
+ /* ignore dead definition blocks, will be removed */
+ if (is_Block_dead(def_bl) || get_Block_dom_depth(def_bl) == -1)
+ continue;
+
+ if (is_Phi(use))
+ use_bl = get_Block_cfgpred_block(bl, i);
+
+ /* ignore dead use blocks, will be removed */
+ if (is_Block_dead(use_bl) || get_Block_dom_depth(use_bl) == -1)
+ continue;
+
+ ASSERT_AND_RET_DBG(
+ block_dominates(def_bl, use_bl),
+ "the definition of a value used violates the dominance property", 0,
+ ir_fprintf(stderr,
+ "graph %+F: %+F of %+F must dominate %+F of user %+F input %d\n",
+ current_ir_graph, def_bl, def, use_bl, use, i
+ );
+ );
+ }
+ }
+ return 1;
+}
+
+/* Tests the modes of n and its predecessors. */
+int irn_vrfy_irg(ir_node *n, ir_graph *irg) {
+ int i;
+ ir_op *op;
+
+ if (!get_node_verification_mode())
+ return 1;
+
+ if (!get_interprocedural_view()) {
+ /*
+ * do NOT check placement in interprocedural view, as we don't always know
+ * the "right" graph ...
+ */
+ ASSERT_AND_RET_DBG(
+ node_is_in_irgs_storage(irg, n),
+ "Node is not stored on proper IR graph!", 0,
+ show_node_on_graph(irg, n);
+ );
+ assert(get_irn_irg(n) == irg);
+ {
+ unsigned idx = get_irn_idx(n);
+ ir_node *node_from_map = get_idx_irn(irg, idx);
+ ASSERT_AND_RET_DBG(node_from_map == n, "Node index and index map entry differ", 0, ir_printf("node %+F node in map %+F(%p)", n, node_from_map, node_from_map));
+ }
+ }
+
+ op = get_irn_op(n);
+
+ /* We don't want to test nodes whose predecessors are Bad,
+ as we would have to special case that for each operation. */
+ if (op != op_Phi && op != op_Block) {
+ for (i = get_irn_arity(n) - 1; i >= 0; --i) {
+ if (is_Bad(get_irn_n(n, i)))
+ return 1;
+ }
+ }
+
+ if (_get_op_pinned(op) >= op_pin_state_exc_pinned) {
+ op_pin_state state = get_irn_pinned(n);
+ ASSERT_AND_RET_DBG(
+ state == op_pin_state_floats ||
+ state == op_pin_state_pinned,
+ "invalid pin state", 0,
+ ir_printf("node %+F", n));
+ }
+
+ if (op->ops.verify_node)
+ return op->ops.verify_node(n, irg);
+
+ /* All went ok */
+ return 1;
+}
+
+int irn_vrfy(ir_node *n) {