+/**
+ * emits code for save instruction with min. required stack space
+ */
+static void emit_sparc_Save(const ir_node *irn)
+{
+ const sparc_save_attr_t *save_attr = get_sparc_save_attr_const(irn);
+ be_emit_cstring("\tsave ");
+ sparc_emit_source_register(irn, 0);
+ be_emit_irprintf(", %d, ", -save_attr->initial_stacksize);
+ sparc_emit_dest_register(irn, 0);
+ be_emit_finish_line_gas(irn);
+}
+
+/**
+ * emits code to load hi 22 bit of a constant
+ */
+static void emit_sparc_HiImm(const ir_node *irn)
+{
+ const sparc_attr_t *attr = get_sparc_attr_const(irn);
+ be_emit_cstring("\tsethi ");
+ be_emit_irprintf("%%hi(%d), ", attr->immediate_value);
+ sparc_emit_dest_register(irn, 0);
+ be_emit_finish_line_gas(irn);
+}
+
+/**
+ * emits code to load lo 10bits of a constant
+ */
+static void emit_sparc_LoImm(const ir_node *irn)
+{
+ const sparc_attr_t *attr = get_sparc_attr_const(irn);
+ be_emit_cstring("\tor ");
+ sparc_emit_source_register(irn, 0);
+ be_emit_irprintf(", %%lo(%d), ", attr->immediate_value);
+ sparc_emit_dest_register(irn, 0);
+ be_emit_finish_line_gas(irn);
+}
+
+/**
+ * emits code for mulh
+ */
+static void emit_sparc_Mulh(const ir_node *irn)
+{
+ be_emit_cstring("\t");
+ sparc_emit_mode_sign_prefix(irn);
+ be_emit_cstring("mul ");
+
+ sparc_emit_source_register(irn, 0);
+ be_emit_cstring(", ");
+ sparc_emit_reg_or_imm(irn, 1);
+ be_emit_cstring(", ");
+ sparc_emit_dest_register(irn, 0);
+ be_emit_finish_line_gas(irn);
+
+ // our result is in the y register now
+ // we just copy it to the assigned target reg
+ be_emit_cstring("\tmov %y, ");
+ sparc_emit_dest_register(irn, 0);
+ be_emit_finish_line_gas(irn);
+}
+
+static void emit_sparc_Div(const ir_node *node, bool is_signed)
+{
+ /* can we get the delay count of the wr instruction somewhere? */
+ unsigned wry_delay_count = 3;
+ unsigned i;
+
+ be_emit_cstring("\twr ");
+ sparc_emit_source_register(node, 0);
+ be_emit_cstring(", 0, %y");
+ be_emit_finish_line_gas(node);
+
+ for (i = 0; i < wry_delay_count; ++i) {
+ be_emit_cstring("\tnop");
+ be_emit_finish_line_gas(node);
+ }
+
+ be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
+ sparc_emit_source_register(node, 1);
+ be_emit_cstring(", ");
+ sparc_emit_source_register(node, 2);
+ be_emit_cstring(", ");
+ sparc_emit_dest_register(node, 0);
+ be_emit_finish_line_gas(node);
+}
+
+static void emit_sparc_SDiv(const ir_node *node)
+{
+ (void) node;
+ /* aehm we would need an aditional register for an sra instruction to
+ * compute the upper bits... Just panic for now */
+ //emit_sparc_Div(node, true);
+ panic("signed div is wrong");
+}
+
+static void emit_sparc_UDiv(const ir_node *node)
+{
+ emit_sparc_Div(node, false);