+ panic("result Proj missing");
+}
+
+static int sim_Asm(x87_state *const state, ir_node *const n)
+{
+ (void)state;
+
+ for (size_t i = get_irn_arity(n); i-- != 0;) {
+ arch_register_req_t const *const req = arch_get_irn_register_req_in(n, i);
+ if (req->cls == &ia32_reg_classes[CLASS_ia32_vfp])
+ panic("cannot handle %+F with x87 constraints", n);
+ }
+
+ for (size_t i = arch_get_irn_n_outs(n); i-- != 0;) {
+ arch_register_req_t const *const req = arch_get_irn_register_req_out(n, i);
+ if (req->cls == &ia32_reg_classes[CLASS_ia32_vfp])
+ panic("cannot handle %+F with x87 constraints", n);
+ }
+
+ return NO_NODE_ADDED;