+ if (live_after_node) {
+ /*
+ Problem: fst doesn't support mode_E (spills), only fstp does
+ Solution:
+ - stack not full: push value and fstp
+ - stack full: fstp value and load again
+ Note that we cannot test on mode_E, because floats might be 96bit ...
+ */
+ if (get_mode_size_bits(mode) > 64 || mode == mode_Ls) {
+ if (depth < N_x87_REGS) {
+ /* ok, we have a free register: push + fstp */
+ x87_create_fpush(state, n, op2_idx, n_ia32_vfst_val);
+ x87_pop(state);
+ x87_patch_insn(n, op_p);
+ } else {
+ ir_node *vfld, *mem, *block, *rproj, *mproj;
+ ir_graph *irg;
+
+ /* stack full here: need fstp + load */
+ x87_pop(state);
+ x87_patch_insn(n, op_p);
+
+ block = get_nodes_block(n);
+ vfld = new_bd_ia32_vfld(NULL, block, get_irn_n(n, 0), get_irn_n(n, 1), new_NoMem(), get_ia32_ls_mode(n));
+
+ /* copy all attributes */
+ set_ia32_frame_ent(vfld, get_ia32_frame_ent(n));
+ if (is_ia32_use_frame(n))
+ set_ia32_use_frame(vfld);
+ set_ia32_op_type(vfld, ia32_AddrModeS);
+ add_ia32_am_offs_int(vfld, get_ia32_am_offs_int(n));
+ set_ia32_am_sc(vfld, get_ia32_am_sc(n));
+ set_ia32_ls_mode(vfld, get_ia32_ls_mode(n));
+
+ irg = get_irn_irg(n);
+ rproj = new_r_Proj(irg, block, vfld, get_ia32_ls_mode(vfld), pn_ia32_vfld_res);
+ mproj = new_r_Proj(irg, block, vfld, mode_M, pn_ia32_vfld_M);
+ mem = get_irn_Proj_for_mode(n, mode_M);
+
+ assert(mem && "Store memory not found");
+
+ arch_set_irn_register(rproj, op2);
+
+ /* reroute all former users of the store memory to the load memory */
+ edges_reroute(mem, mproj, irg);
+ /* set the memory input of the load to the store memory */
+ set_irn_n(vfld, n_ia32_vfld_mem, mem);
+
+ sched_add_after(n, vfld);
+ sched_add_after(vfld, rproj);
+
+ /* rewire all users, scheduled after the store, to the loaded value */
+ collect_and_rewire_users(n, val, rproj);
+
+ insn = NODE_ADDED;
+ }
+ } else {
+ /* we can only store the tos to memory */
+ if (op2_idx != 0)
+ x87_create_fxch(state, n, op2_idx);
+
+ /* mode != mode_E -> use normal fst */
+ x87_patch_insn(n, op);
+ }
+ } else {
+ /* we can only store the tos to memory */
+ if (op2_idx != 0)
+ x87_create_fxch(state, n, op2_idx);
+
+ x87_pop(state);
+ x87_patch_insn(n, op_p);
+ }
+
+ attr = get_ia32_x87_attr(n);
+ attr->x87[1] = op2 = &ia32_st_regs[0];
+ DB((dbg, LEVEL_1, "<<< %s %s ->\n", get_irn_opname(n), arch_register_get_name(op2)));
+
+ return insn;
+} /* sim_store */