+ if(new_node != NULL) {
+ if(get_irn_pinned(new_node) != op_pin_state_pinned &&
+ get_irn_pinned(node) == op_pin_state_pinned) {
+ set_irn_pinned(new_node, op_pin_state_pinned);
+ }
+ }
+
+ return new_node;
+}
+
+static int is_float_to_int32_conv(const ir_node *node)
+{
+ ir_mode *mode = get_irn_mode(node);
+ ir_node *conv_op;
+ ir_mode *conv_mode;
+
+ if(get_mode_size_bits(mode) != 32 || !ia32_mode_needs_gp_reg(mode))
+ return 0;
+ /* don't report unsigned as conv to 32bit, because we really need to do
+ * a vfist with 64bit signed in this case */
+ if(!mode_is_signed(mode))
+ return 0;
+
+ if(!is_Conv(node))
+ return 0;
+ conv_op = get_Conv_op(node);
+ conv_mode = get_irn_mode(conv_op);
+
+ if(!mode_is_float(conv_mode))
+ return 0;
+
+ return 1;
+}
+
+/**
+ * Transform a Store(floatConst).
+ *
+ * @return the created ia32 Store node
+ */
+static ir_node *gen_float_const_Store(ir_node *node, ir_node *cns) {
+ ir_mode *mode = get_irn_mode(cns);
+ int size = get_mode_size_bits(mode);
+ tarval *tv = get_Const_tarval(cns);
+ ir_node *block = get_nodes_block(node);
+ ir_node *new_block = be_transform_node(block);
+ ir_node *ptr = get_Store_ptr(node);
+ ir_node *mem = get_Store_mem(node);
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *noreg = ia32_new_NoReg_gp(env_cg);
+ int ofs = 4;
+ ir_node *new_node;
+ ia32_address_t addr;
+
+ unsigned val = get_tarval_sub_bits(tv, 0) |
+ (get_tarval_sub_bits(tv, 1) << 8) |
+ (get_tarval_sub_bits(tv, 2) << 16) |
+ (get_tarval_sub_bits(tv, 3) << 24);
+ ir_node *imm = create_Immediate(NULL, 0, val);
+
+ /* construct store address */
+ memset(&addr, 0, sizeof(addr));
+ ia32_create_address_mode(&addr, ptr, /*force=*/0);
+
+ if (addr.base == NULL) {
+ addr.base = noreg;
+ } else {
+ addr.base = be_transform_node(addr.base);
+ }
+
+ if (addr.index == NULL) {
+ addr.index = noreg;
+ } else {
+ addr.index = be_transform_node(addr.index);
+ }
+ addr.mem = be_transform_node(mem);
+
+ new_node = new_rd_ia32_Store(dbgi, irg, new_block, addr.base,
+ addr.index, addr.mem, imm);
+
+ set_irn_pinned(new_node, get_irn_pinned(node));
+ set_ia32_op_type(new_node, ia32_AddrModeD);
+ set_ia32_ls_mode(new_node, mode_Iu);
+
+ set_address(new_node, &addr);
+
+ /** add more stores if needed */
+ while (size > 32) {
+ unsigned val = get_tarval_sub_bits(tv, ofs) |
+ (get_tarval_sub_bits(tv, ofs + 1) << 8) |
+ (get_tarval_sub_bits(tv, ofs + 2) << 16) |
+ (get_tarval_sub_bits(tv, ofs + 3) << 24);
+ ir_node *imm = create_Immediate(NULL, 0, val);
+
+ addr.offset += 4;
+ addr.mem = new_node;
+
+ new_node = new_rd_ia32_Store(dbgi, irg, new_block, addr.base,
+ addr.index, addr.mem, imm);
+
+ set_irn_pinned(new_node, get_irn_pinned(node));
+ set_ia32_op_type(new_node, ia32_AddrModeD);
+ set_ia32_ls_mode(new_node, mode_Iu);
+
+ set_address(new_node, &addr);
+ size -= 32;
+ ofs += 4;
+ }
+
+ SET_IA32_ORIG_NODE(new_node, ia32_get_old_node_name(env_cg, node));