+/**
+ * In case SSE Unit is used, the node is transformed into a vfst + xLoad.
+ */
+static ir_node *gen_ia32_l_X87toSSE(ia32_transform_env_t *env) {
+ ia32_code_gen_t *cg = env->cg;
+ ir_node *res = NULL;
+ ir_node *ptr = get_irn_n(env->irn, 0);
+ ir_node *val = get_irn_n(env->irn, 1);
+ ir_node *mem = get_irn_n(env->irn, 2);
+
+ if (USE_SSE2(cg)) {
+ ir_node *noreg = ia32_new_NoReg_gp(cg);
+
+ /* Store x87 -> MEM */
+ res = new_rd_ia32_vfst(env->dbg, env->irg, env->block, ptr, noreg, val, mem);
+ set_ia32_frame_ent(res, get_ia32_frame_ent(env->irn));
+ set_ia32_use_frame(res);
+ set_ia32_ls_mode(res, get_ia32_ls_mode(env->irn));
+ set_ia32_am_support(res, ia32_am_Dest);
+ set_ia32_am_flavour(res, ia32_B);
+ res = new_rd_Proj(env->dbg, env->irg, env->block, res, mode_M, pn_ia32_vfst_M);
+
+ /* Load MEM -> SSE */
+ res = new_rd_ia32_xLoad(env->dbg, env->irg, env->block, ptr, noreg, res);
+ set_ia32_frame_ent(res, get_ia32_frame_ent(env->irn));
+ set_ia32_use_frame(res);
+ set_ia32_ls_mode(res, get_ia32_ls_mode(env->irn));
+ set_ia32_am_support(res, ia32_am_Source);
+ set_ia32_am_flavour(res, ia32_B);
+ res = new_rd_Proj(env->dbg, env->irg, env->block, res, get_ia32_ls_mode(env->irn), pn_ia32_xLoad_res);
+ }
+ else {
+ /* SSE unit is not used -> skip this node. */
+ int i;
+
+ edges_reroute(env->irn, val, env->irg);
+ for (i = get_irn_arity(env->irn) - 1; i >= 0; i--)
+ set_irn_n(env->irn, i, get_irg_bad(env->irg));
+ }
+
+ return res;
+}
+
+/**
+ * In case SSE Unit is used, the node is transformed into a xStore + vfld.
+ */
+static ir_node *gen_ia32_l_SSEtoX87(ia32_transform_env_t *env) {
+ ia32_code_gen_t *cg = env->cg;
+ ir_node *res = NULL;
+ ir_node *ptr = get_irn_n(env->irn, 0);
+ ir_node *val = get_irn_n(env->irn, 1);
+ ir_node *mem = get_irn_n(env->irn, 2);
+
+ if (USE_SSE2(cg)) {
+ ir_node *noreg = ia32_new_NoReg_gp(cg);
+
+ /* Store SSE -> MEM */
+ res = new_rd_ia32_xStore(env->dbg, env->irg, env->block, ptr, noreg, val, mem);
+ set_ia32_frame_ent(res, get_ia32_frame_ent(env->irn));
+ set_ia32_use_frame(res);
+ set_ia32_ls_mode(res, get_ia32_ls_mode(env->irn));
+ set_ia32_am_support(res, ia32_am_Dest);
+ set_ia32_am_flavour(res, ia32_B);
+ res = new_rd_Proj(env->dbg, env->irg, env->block, res, mode_M, pn_ia32_xStore_M);
+
+ /* Load MEM -> x87 */
+ res = new_rd_ia32_vfld(env->dbg, env->irg, env->block, ptr, noreg, mem);
+ set_ia32_frame_ent(res, get_ia32_frame_ent(env->irn));
+ set_ia32_use_frame(res);
+ set_ia32_ls_mode(res, get_ia32_ls_mode(env->irn));
+ set_ia32_am_support(res, ia32_am_Source);
+ set_ia32_am_flavour(res, ia32_B);
+ res = new_rd_Proj(env->dbg, env->irg, env->block, res, get_ia32_ls_mode(env->irn), pn_ia32_vfld_res);
+ }
+ else {
+ /* SSE unit is not used -> skip this node. */
+ int i;
+
+ edges_reroute(env->irn, val, env->irg);
+ for (i = get_irn_arity(env->irn) - 1; i >= 0; i--)
+ set_irn_n(env->irn, i, get_irg_bad(env->irg));
+ }