- src_mode, tgt_mode));
- return be_transform_node(op);
- }
-
- res = create_I2I_Conv(src_mode, tgt_mode, dbgi, block, op, node);
- return res;
- }
- }
-
- return res;
-}
-
-static int check_immediate_constraint(long val, char immediate_constraint_type)
-{
- switch (immediate_constraint_type) {
- case 0:
- return 1;
- case 'I':
- return val >= 0 && val <= 32;
- case 'J':
- return val >= 0 && val <= 63;
- case 'K':
- return val >= -128 && val <= 127;
- case 'L':
- return val == 0xff || val == 0xffff;
- case 'M':
- return val >= 0 && val <= 3;
- case 'N':
- return val >= 0 && val <= 255;
- case 'O':
- return val >= 0 && val <= 127;
- default:
- break;
- }
- panic("Invalid immediate constraint found");
- return 0;
-}
-
-static ir_node *try_create_Immediate(ir_node *node,
- char immediate_constraint_type)
-{
- int minus = 0;
- tarval *offset = NULL;
- int offset_sign = 0;
- long val = 0;
- ir_entity *symconst_ent = NULL;
- int symconst_sign = 0;
- ir_mode *mode;
- ir_node *cnst = NULL;
- ir_node *symconst = NULL;
- ir_node *new_node;
-
- mode = get_irn_mode(node);
- if(!mode_is_int(mode) && !mode_is_reference(mode)) {
- return NULL;
- }
-
- if(is_Minus(node)) {
- minus = 1;
- node = get_Minus_op(node);
- }
-
- if(is_Const(node)) {
- cnst = node;
- symconst = NULL;
- offset_sign = minus;
- } else if(is_SymConst(node)) {
- cnst = NULL;
- symconst = node;
- symconst_sign = minus;
- } else if(is_Add(node)) {
- ir_node *left = get_Add_left(node);
- ir_node *right = get_Add_right(node);
- if(is_Const(left) && is_SymConst(right)) {
- cnst = left;
- symconst = right;
- symconst_sign = minus;
- offset_sign = minus;
- } else if(is_SymConst(left) && is_Const(right)) {
- cnst = right;
- symconst = left;
- symconst_sign = minus;
- offset_sign = minus;
- }
- } else if(is_Sub(node)) {
- ir_node *left = get_Sub_left(node);
- ir_node *right = get_Sub_right(node);
- if(is_Const(left) && is_SymConst(right)) {
- cnst = left;
- symconst = right;
- symconst_sign = !minus;
- offset_sign = minus;
- } else if(is_SymConst(left) && is_Const(right)) {
- cnst = right;
- symconst = left;
- symconst_sign = minus;
- offset_sign = !minus;
- }
- } else {
- return NULL;
- }
-
- if(cnst != NULL) {
- offset = get_Const_tarval(cnst);
- if(tarval_is_long(offset)) {
- val = get_tarval_long(offset);
- } else {
- ir_fprintf(stderr, "Optimisation Warning: tarval from %+F is not a "
- "long?\n", cnst);
- return NULL;
- }
-
- if(!check_immediate_constraint(val, immediate_constraint_type))
- return NULL;
- }
- if(symconst != NULL) {
- if(immediate_constraint_type != 0) {
- /* we need full 32bits for symconsts */
- return NULL;
- }
-
- /* unfortunately the assembler/linker doesn't support -symconst */
- if(symconst_sign)
- return NULL;
-
- if(get_SymConst_kind(symconst) != symconst_addr_ent)
- return NULL;
- symconst_ent = get_SymConst_entity(symconst);
- }
- if(cnst == NULL && symconst == NULL)
- return NULL;
-
- if(offset_sign && offset != NULL) {
- offset = tarval_neg(offset);
- }
-
- new_node = create_Immediate(symconst_ent, symconst_sign, val);
-
- return new_node;
-}
-
-static ir_node *create_immediate_or_transform(ir_node *node,
- char immediate_constraint_type)
-{
- ir_node *new_node = try_create_Immediate(node, immediate_constraint_type);
- if (new_node == NULL) {
- new_node = be_transform_node(node);
- }
- return new_node;
-}
-
-static const arch_register_req_t no_register_req = {
- arch_register_req_type_none,
- NULL, /* regclass */
- NULL, /* limit bitset */
- { -1, -1 }, /* same pos */
- -1 /* different pos */
-};
-
-/**
- * An assembler constraint.
- */
-typedef struct constraint_t constraint_t;
-struct constraint_t {
- int is_in;
- int n_outs;
- const arch_register_req_t **out_reqs;
-
- const arch_register_req_t *req;
- unsigned immediate_possible;
- char immediate_type;
-};
-
-static void parse_asm_constraint(int pos, constraint_t *constraint, const char *c)
-{
- int immediate_possible = 0;
- char immediate_type = 0;
- unsigned limited = 0;
- const arch_register_class_t *cls = NULL;
- ir_graph *irg = current_ir_graph;
- struct obstack *obst = get_irg_obstack(irg);
- arch_register_req_t *req;
- unsigned *limited_ptr;
- int p;
- int same_as = -1;
-
- /* TODO: replace all the asserts with nice error messages */
-
- if(*c == 0) {
- /* a memory constraint: no need to do anything in backend about it
- * (the dependencies are already respected by the memory edge of
- * the node) */
- constraint->req = &no_register_req;
- return;
- }
-
- while(*c != 0) {
- switch(*c) {
- case ' ':
- case '\t':
- case '\n':
- break;
-
- case 'a':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EAX;
- break;
- case 'b':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EBX;
- break;
- case 'c':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_ECX;
- break;
- case 'd':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EDX;
- break;
- case 'D':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EDI;
- break;
- case 'S':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_ESI;
- break;
- case 'Q':
- case 'q': /* q means lower part of the regs only, this makes no
- * difference to Q for us (we only assigne whole registers) */
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EAX | 1 << REG_EBX | 1 << REG_ECX |
- 1 << REG_EDX;
- break;
- case 'A':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EAX | 1 << REG_EDX;
- break;
- case 'l':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EAX | 1 << REG_EBX | 1 << REG_ECX |
- 1 << REG_EDX | 1 << REG_ESI | 1 << REG_EDI |
- 1 << REG_EBP;
- break;
-
- case 'R':
- case 'r':
- case 'p':
- assert(cls == NULL);
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- break;
-
- case 'f':
- case 't':
- case 'u':
- /* TODO: mark values so the x87 simulator knows about t and u */
- assert(cls == NULL);
- cls = &ia32_reg_classes[CLASS_ia32_vfp];
- break;
-
- case 'Y':
- case 'x':
- assert(cls == NULL);
- /* TODO: check that sse2 is supported */
- cls = &ia32_reg_classes[CLASS_ia32_xmm];
- break;
-
- case 'I':
- case 'J':
- case 'K':
- case 'L':
- case 'M':
- case 'N':
- case 'O':
- assert(!immediate_possible);
- immediate_possible = 1;
- immediate_type = *c;
- break;
- case 'n':
- case 'i':
- assert(!immediate_possible);
- immediate_possible = 1;
- break;
-
- case 'g':
- assert(!immediate_possible && cls == NULL);
- immediate_possible = 1;
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- break;
-
- case '0':
- case '1':
- case '2':
- case '3':
- case '4':
- case '5':
- case '6':
- case '7':
- case '8':
- case '9':
- assert(constraint->is_in && "can only specify same constraint "
- "on input");
-
- sscanf(c, "%d%n", &same_as, &p);
- if(same_as >= 0) {
- c += p;
- continue;