- } else {
- /* ... to int */
- DB((dbg, LEVEL_1, "create Conv(float, int) ..."));
- if (ia32_cg_config.use_sse2) {
- res = new_rd_ia32_Conv_FP2I(dbgi, irg, new_block, noreg, noreg,
- nomem, new_op);
- set_ia32_ls_mode(res, src_mode);
- } else {
- return gen_x87_fp_to_gp(node);
- }
- }
- } else {
- /* we convert from int ... */
- if (mode_is_float(tgt_mode)) {
- /* ... to float */
- DB((dbg, LEVEL_1, "create Conv(int, float) ..."));
- if (ia32_cg_config.use_sse2) {
- new_op = be_transform_node(op);
- res = new_rd_ia32_Conv_I2FP(dbgi, irg, new_block, noreg, noreg,
- nomem, new_op);
- set_ia32_ls_mode(res, tgt_mode);
- } else {
- res = gen_x87_gp_to_fp(node, src_mode);
- if(get_Conv_strict(node)) {
- res = gen_x87_strict_conv(tgt_mode, res);
- SET_IA32_ORIG_NODE(get_Proj_pred(res),
- ia32_get_old_node_name(env_cg, node));
- }
- return res;
- }
- } else if(tgt_mode == mode_b) {
- /* mode_b lowering already took care that we only have 0/1 values */
- DB((dbg, LEVEL_1, "omitting unnecessary Conv(%+F, %+F) ...",
- src_mode, tgt_mode));
- return be_transform_node(op);
- } else {
- /* to int */
- if (src_bits == tgt_bits) {
- DB((dbg, LEVEL_1, "omitting unnecessary Conv(%+F, %+F) ...",
- src_mode, tgt_mode));
- return be_transform_node(op);
- }
-
- res = create_I2I_Conv(src_mode, tgt_mode, dbgi, block, op, node);
- return res;
- }
- }
-
- return res;
-}
-
-static int check_immediate_constraint(long val, char immediate_constraint_type)
-{
- switch (immediate_constraint_type) {
- case 0:
- return 1;
- case 'I':
- return val >= 0 && val <= 32;
- case 'J':
- return val >= 0 && val <= 63;
- case 'K':
- return val >= -128 && val <= 127;
- case 'L':
- return val == 0xff || val == 0xffff;
- case 'M':
- return val >= 0 && val <= 3;
- case 'N':
- return val >= 0 && val <= 255;
- case 'O':
- return val >= 0 && val <= 127;
- default:
- break;
- }
- panic("Invalid immediate constraint found");
- return 0;
-}
-
-static ir_node *try_create_Immediate(ir_node *node,
- char immediate_constraint_type)
-{
- int minus = 0;
- tarval *offset = NULL;
- int offset_sign = 0;
- long val = 0;
- ir_entity *symconst_ent = NULL;
- int symconst_sign = 0;
- ir_mode *mode;
- ir_node *cnst = NULL;
- ir_node *symconst = NULL;
- ir_node *new_node;
-
- mode = get_irn_mode(node);
- if(!mode_is_int(mode) && !mode_is_reference(mode)) {
- return NULL;
- }
-
- if(is_Minus(node)) {
- minus = 1;
- node = get_Minus_op(node);
- }
-
- if(is_Const(node)) {
- cnst = node;
- symconst = NULL;
- offset_sign = minus;
- } else if(is_SymConst(node)) {
- cnst = NULL;
- symconst = node;
- symconst_sign = minus;
- } else if(is_Add(node)) {
- ir_node *left = get_Add_left(node);
- ir_node *right = get_Add_right(node);
- if(is_Const(left) && is_SymConst(right)) {
- cnst = left;
- symconst = right;
- symconst_sign = minus;
- offset_sign = minus;
- } else if(is_SymConst(left) && is_Const(right)) {
- cnst = right;
- symconst = left;
- symconst_sign = minus;
- offset_sign = minus;
- }
- } else if(is_Sub(node)) {
- ir_node *left = get_Sub_left(node);
- ir_node *right = get_Sub_right(node);
- if(is_Const(left) && is_SymConst(right)) {
- cnst = left;
- symconst = right;
- symconst_sign = !minus;
- offset_sign = minus;
- } else if(is_SymConst(left) && is_Const(right)) {
- cnst = right;
- symconst = left;
- symconst_sign = minus;
- offset_sign = !minus;
- }
- } else {
- return NULL;
- }
-
- if(cnst != NULL) {
- offset = get_Const_tarval(cnst);
- if(tarval_is_long(offset)) {
- val = get_tarval_long(offset);
- } else {
- ir_fprintf(stderr, "Optimisation Warning: tarval from %+F is not a "
- "long?\n", cnst);
- return NULL;
- }
-
- if(!check_immediate_constraint(val, immediate_constraint_type))
- return NULL;
- }
- if(symconst != NULL) {
- if(immediate_constraint_type != 0) {
- /* we need full 32bits for symconsts */
- return NULL;
- }
-
- /* unfortunately the assembler/linker doesn't support -symconst */
- if(symconst_sign)
- return NULL;
-
- if(get_SymConst_kind(symconst) != symconst_addr_ent)
- return NULL;
- symconst_ent = get_SymConst_entity(symconst);
- }
- if(cnst == NULL && symconst == NULL)
- return NULL;
-
- if(offset_sign && offset != NULL) {
- offset = tarval_neg(offset);
- }
-
- new_node = create_Immediate(symconst_ent, symconst_sign, val);
-
- return new_node;
-}
-
-static ir_node *create_immediate_or_transform(ir_node *node,
- char immediate_constraint_type)
-{
- ir_node *new_node = try_create_Immediate(node, immediate_constraint_type);
- if (new_node == NULL) {
- new_node = be_transform_node(node);
- }
- return new_node;
-}
-
-static const arch_register_req_t no_register_req = {
- arch_register_req_type_none,
- NULL, /* regclass */
- NULL, /* limit bitset */
- 0, /* same pos */
- 0 /* different pos */
-};
-
-/**
- * An assembler constraint.
- */
-typedef struct constraint_t constraint_t;
-struct constraint_t {
- int is_in;
- int n_outs;
- const arch_register_req_t **out_reqs;
-
- const arch_register_req_t *req;
- unsigned immediate_possible;
- char immediate_type;
-};
-
-static void parse_asm_constraint(int pos, constraint_t *constraint, const char *c)
-{
- int immediate_possible = 0;
- char immediate_type = 0;
- unsigned limited = 0;
- const arch_register_class_t *cls = NULL;
- ir_graph *irg = current_ir_graph;
- struct obstack *obst = get_irg_obstack(irg);
- arch_register_req_t *req;
- unsigned *limited_ptr = NULL;
- int p;
- int same_as = -1;
-
- /* TODO: replace all the asserts with nice error messages */
-
- if(*c == 0) {
- /* a memory constraint: no need to do anything in backend about it
- * (the dependencies are already respected by the memory edge of
- * the node) */
- constraint->req = &no_register_req;
- return;
- }
-
- while(*c != 0) {
- switch(*c) {
- case ' ':
- case '\t':
- case '\n':
- break;
-
- case 'a':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EAX;
- break;
- case 'b':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EBX;
- break;
- case 'c':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_ECX;
- break;
- case 'd':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EDX;
- break;
- case 'D':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EDI;
- break;
- case 'S':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_ESI;
- break;
- case 'Q':
- case 'q': /* q means lower part of the regs only, this makes no
- * difference to Q for us (we only assigne whole registers) */
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EAX | 1 << REG_EBX | 1 << REG_ECX |
- 1 << REG_EDX;
- break;
- case 'A':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EAX | 1 << REG_EDX;
- break;
- case 'l':
- assert(cls == NULL ||
- (cls == &ia32_reg_classes[CLASS_ia32_gp] && limited != 0));
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- limited |= 1 << REG_EAX | 1 << REG_EBX | 1 << REG_ECX |
- 1 << REG_EDX | 1 << REG_ESI | 1 << REG_EDI |
- 1 << REG_EBP;
- break;
-
- case 'R':
- case 'r':
- case 'p':
- assert(cls == NULL);
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- break;
-
- case 'f':
- case 't':
- case 'u':
- /* TODO: mark values so the x87 simulator knows about t and u */
- assert(cls == NULL);
- cls = &ia32_reg_classes[CLASS_ia32_vfp];
- break;
-
- case 'Y':
- case 'x':
- assert(cls == NULL);
- /* TODO: check that sse2 is supported */
- cls = &ia32_reg_classes[CLASS_ia32_xmm];
- break;
-
- case 'I':
- case 'J':
- case 'K':
- case 'L':
- case 'M':
- case 'N':
- case 'O':
- assert(!immediate_possible);
- immediate_possible = 1;
- immediate_type = *c;
- break;
- case 'n':
- case 'i':
- assert(!immediate_possible);
- immediate_possible = 1;
- break;
-
- case 'g':
- assert(!immediate_possible && cls == NULL);
- immediate_possible = 1;
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- break;
-
- case '0':
- case '1':
- case '2':
- case '3':
- case '4':
- case '5':
- case '6':
- case '7':
- case '8':
- case '9':
- assert(constraint->is_in && "can only specify same constraint "
- "on input");
-
- sscanf(c, "%d%n", &same_as, &p);
- if(same_as >= 0) {
- c += p;
- continue;
- }
- break;
-
- case 'm':
- /* memory constraint no need to do anything in backend about it
- * (the dependencies are already respected by the memory edge of
- * the node) */
- constraint->req = &no_register_req;
- return;
-
- case 'E': /* no float consts yet */
- case 'F': /* no float consts yet */
- case 's': /* makes no sense on x86 */
- case 'X': /* we can't support that in firm */
- case 'o':
- case 'V':
- case '<': /* no autodecrement on x86 */
- case '>': /* no autoincrement on x86 */
- case 'C': /* sse constant not supported yet */
- case 'G': /* 80387 constant not supported yet */
- case 'y': /* we don't support mmx registers yet */
- case 'Z': /* not available in 32 bit mode */
- case 'e': /* not available in 32 bit mode */
- panic("unsupported asm constraint '%c' found in (%+F)",
- *c, current_ir_graph);
- break;
- default:
- panic("unknown asm constraint '%c' found in (%+F)", *c,
- current_ir_graph);
- break;
- }
- ++c;
- }
-
- if(same_as >= 0) {
- const arch_register_req_t *other_constr;
-
- assert(cls == NULL && "same as and register constraint not supported");
- assert(!immediate_possible && "same as and immediate constraint not "
- "supported");
- assert(same_as < constraint->n_outs && "wrong constraint number in "
- "same_as constraint");
-
- other_constr = constraint->out_reqs[same_as];
-
- req = obstack_alloc(obst, sizeof(req[0]));
- req->cls = other_constr->cls;
- req->type = arch_register_req_type_should_be_same;
- req->limited = NULL;
- req->other_same = 1U << pos;
- req->other_different = 0;
-
- /* switch constraints. This is because in firm we have same_as
- * constraints on the output constraints while in the gcc asm syntax
- * they are specified on the input constraints */
- constraint->req = other_constr;
- constraint->out_reqs[same_as] = req;
- constraint->immediate_possible = 0;
- return;
- }
-
- if(immediate_possible && cls == NULL) {
- cls = &ia32_reg_classes[CLASS_ia32_gp];
- }
- assert(!immediate_possible || cls == &ia32_reg_classes[CLASS_ia32_gp]);
- assert(cls != NULL);
-
- if(immediate_possible) {
- assert(constraint->is_in
- && "immediate make no sense for output constraints");
- }
- /* todo: check types (no float input on 'r' constrained in and such... */
-
- if(limited != 0) {
- req = obstack_alloc(obst, sizeof(req[0]) + sizeof(unsigned));
- limited_ptr = (unsigned*) (req+1);
- } else {
- req = obstack_alloc(obst, sizeof(req[0]));
- }
- memset(req, 0, sizeof(req[0]));
-
- if(limited != 0) {
- req->type = arch_register_req_type_limited;
- *limited_ptr = limited;
- req->limited = limited_ptr;
- } else {
- req->type = arch_register_req_type_normal;
- }
- req->cls = cls;
-
- constraint->req = req;
- constraint->immediate_possible = immediate_possible;
- constraint->immediate_type = immediate_type;
-}
-
-static void parse_clobber(ir_node *node, int pos, constraint_t *constraint,
- const char *c)
-{
- (void) node;
- (void) pos;
- (void) constraint;
- (void) c;
- panic("Clobbers not supported yet");
-}
-
-static int is_memory_op(const ir_asm_constraint *constraint)
-{
- ident *id = constraint->constraint;
- const char *str = get_id_str(id);
- const char *c;
-
- for(c = str; *c != '\0'; ++c) {
- if(*c == 'm')
- return 1;
- }
-
- return 0;
-}
-
-/**
- * generates code for a ASM node
- */
-static ir_node *gen_ASM(ir_node *node)
-{
- int i, arity;
- ir_graph *irg = current_ir_graph;
- ir_node *block = get_nodes_block(node);
- ir_node *new_block = be_transform_node(block);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node **in;
- ir_node *new_node;
- int out_arity;
- int n_out_constraints;
- int n_clobbers;
- const arch_register_req_t **out_reg_reqs;
- const arch_register_req_t **in_reg_reqs;
- ia32_asm_reg_t *register_map;
- unsigned reg_map_size = 0;
- struct obstack *obst;
- const ir_asm_constraint *in_constraints;
- const ir_asm_constraint *out_constraints;
- ident **clobbers;
- constraint_t parsed_constraint;
-
- arity = get_irn_arity(node);
- in = alloca(arity * sizeof(in[0]));
- memset(in, 0, arity * sizeof(in[0]));
-
- n_out_constraints = get_ASM_n_output_constraints(node);
- n_clobbers = get_ASM_n_clobbers(node);
- out_arity = n_out_constraints + n_clobbers;
-
- in_constraints = get_ASM_input_constraints(node);
- out_constraints = get_ASM_output_constraints(node);
- clobbers = get_ASM_clobbers(node);
-
- /* construct output constraints */
- obst = get_irg_obstack(irg);
- out_reg_reqs = obstack_alloc(obst, out_arity * sizeof(out_reg_reqs[0]));
- parsed_constraint.out_reqs = out_reg_reqs;
- parsed_constraint.n_outs = n_out_constraints;
- parsed_constraint.is_in = 0;
-
- for(i = 0; i < out_arity; ++i) {
- const char *c;
-
- if(i < n_out_constraints) {
- const ir_asm_constraint *constraint = &out_constraints[i];
- c = get_id_str(constraint->constraint);
- parse_asm_constraint(i, &parsed_constraint, c);
-
- if(constraint->pos > reg_map_size)
- reg_map_size = constraint->pos;
- } else {
- ident *glob_id = clobbers [i - n_out_constraints];
- c = get_id_str(glob_id);
- parse_clobber(node, i, &parsed_constraint, c);
- }
-
- out_reg_reqs[i] = parsed_constraint.req;
- }
-
- /* construct input constraints */
- in_reg_reqs = obstack_alloc(obst, arity * sizeof(in_reg_reqs[0]));
- parsed_constraint.is_in = 1;
- for(i = 0; i < arity; ++i) {
- const ir_asm_constraint *constraint = &in_constraints[i];
- ident *constr_id = constraint->constraint;
- const char *c = get_id_str(constr_id);
-
- parse_asm_constraint(i, &parsed_constraint, c);
- in_reg_reqs[i] = parsed_constraint.req;
-
- if(constraint->pos > reg_map_size)
- reg_map_size = constraint->pos;
-
- if(parsed_constraint.immediate_possible) {
- ir_node *pred = get_irn_n(node, i);
- char imm_type = parsed_constraint.immediate_type;
- ir_node *immediate = try_create_Immediate(pred, imm_type);
-
- if(immediate != NULL) {
- in[i] = immediate;