+/**
+ * Transforms a Const.
+ *
+ * @param mod the debug module
+ * @param block the block the new node should belong to
+ * @param node the ir Const node
+ * @param mode mode of the Const
+ * @return the created ia32 Const node
+ */
+static ir_node *gen_Const(ia32_transform_env_t *env, ir_node *node) {
+ ir_graph *irg = env->irg;
+ dbg_info *dbg = get_irn_dbg_info(node);
+ ir_mode *mode = get_irn_mode(node);
+ ir_node *block = transform_node(env, get_nodes_block(node));
+
+ if (mode_is_float(mode)) {
+ ir_node *res = NULL;
+ ir_entity *floatent;
+ ir_node *noreg = ia32_new_NoReg_gp(env->cg);
+ ir_node *nomem = new_NoMem();
+ ir_node *load;
+
+ FP_USED(env->cg);
+ if (! USE_SSE2(env->cg)) {
+ cnst_classify_t clss = classify_Const(node);
+
+ if (clss == CNST_NULL) {
+ load = new_rd_ia32_vfldz(dbg, irg, block);
+ res = load;
+ } else if (clss == CNST_ONE) {
+ load = new_rd_ia32_vfld1(dbg, irg, block);
+ res = load;
+ } else {
+ floatent = get_entity_for_tv(env->cg, node);
+
+ load = new_rd_ia32_vfld(dbg, irg, block, noreg, noreg, nomem);
+ set_ia32_am_support(load, ia32_am_Source);
+ set_ia32_op_type(load, ia32_AddrModeS);
+ set_ia32_am_flavour(load, ia32_am_N);
+ set_ia32_am_sc(load, ia32_get_ent_ident(floatent));
+ res = new_r_Proj(irg, block, load, mode_E, pn_ia32_vfld_res);
+ }
+ } else {
+ floatent = get_entity_for_tv(env->cg, node);
+
+ load = new_rd_ia32_xLoad(dbg, irg, block, noreg, noreg, nomem);
+ set_ia32_am_support(load, ia32_am_Source);
+ set_ia32_op_type(load, ia32_AddrModeS);
+ set_ia32_am_flavour(load, ia32_am_N);
+ set_ia32_am_sc(load, ia32_get_ent_ident(floatent));
+ res = new_r_Proj(irg, block, load, mode_E, pn_ia32_xLoad_res);
+ }
+
+ set_ia32_ls_mode(load, mode);
+ SET_IA32_ORIG_NODE(load, ia32_get_old_node_name(env->cg, node));
+
+ /* Const Nodes before the initial IncSP are a bad idea, because
+ * they could be spilled and we have no SP ready at that point yet
+ */
+ if (get_irg_start_block(irg) == block) {
+ add_irn_dep(load, get_irg_frame(irg));
+ }
+
+ SET_IA32_ORIG_NODE(load, ia32_get_old_node_name(env->cg, node));
+ return res;
+ } else {
+ ir_node *cnst = new_rd_ia32_Const(dbg, irg, block);
+
+ /* see above */
+ if (get_irg_start_block(irg) == block) {
+ add_irn_dep(cnst, get_irg_frame(irg));
+ }
+
+ set_ia32_Const_attr(cnst, node);
+ SET_IA32_ORIG_NODE(cnst, ia32_get_old_node_name(env->cg, node));
+ return cnst;
+ }
+
+ assert(0);
+ return new_r_Bad(irg);
+}
+
+/**
+ * Transforms a SymConst.
+ *
+ * @param mod the debug module
+ * @param block the block the new node should belong to
+ * @param node the ir SymConst node
+ * @param mode mode of the SymConst
+ * @return the created ia32 Const node
+ */
+static ir_node *gen_SymConst(ia32_transform_env_t *env, ir_node *node) {
+ ir_graph *irg = env->irg;
+ dbg_info *dbg = get_irn_dbg_info(node);
+ ir_mode *mode = get_irn_mode(node);
+ ir_node *block = transform_node(env, get_nodes_block(node));
+ ir_node *cnst;
+
+ if (mode_is_float(mode)) {
+ FP_USED(env->cg);
+ if (USE_SSE2(env->cg))
+ cnst = new_rd_ia32_xConst(dbg, irg, block);
+ else
+ cnst = new_rd_ia32_vfConst(dbg, irg, block);
+ set_ia32_ls_mode(cnst, mode);
+ } else {
+ cnst = new_rd_ia32_Const(dbg, irg, block);
+ }
+
+ /* Const Nodes before the initial IncSP are a bad idea, because
+ * they could be spilled and we have no SP ready at that point yet
+ */
+ if (get_irg_start_block(irg) == block) {
+ add_irn_dep(cnst, get_irg_frame(irg));
+ }
+
+ set_ia32_Const_attr(cnst, node);
+ SET_IA32_ORIG_NODE(cnst, ia32_get_old_node_name(env->cg, node));
+
+ return cnst;