+#include "../bearch_t.h"
+#include "../bemachine.h"
+#include "irnode_t.h"
+
+enum {
+ ia32_pn_Cmp_unsigned = 0x1000,
+ ia32_pn_Cmp_float = 0x2000,
+};
+
+typedef enum {
+ ia32_Normal,
+ ia32_AddrModeD,
+ ia32_AddrModeS
+} ia32_op_type_t;
+
+typedef enum {
+ ia32_am_None = 0, /**< no addrmode support */
+ ia32_am_Source = 2 /**< addrmode for source only */
+} ia32_am_type_t;
+
+typedef enum {
+ ia32_am_arity_none = 0,
+ ia32_am_unary = 1,
+ ia32_am_binary = 2,
+ ia32_am_ternary = 3,
+} ia32_am_arity_t;
+
+typedef enum {
+ match_commutative = 1 << 0, /**< inputs are commutative */
+ match_am_and_immediates = 1 << 1, /**< node supports AM and immediate at
+ the same time */
+ match_am = 1 << 2, /**< node supports (32bit) source AM */
+ match_8bit_am = 1 << 3, /**< node supports 8bit source AM */
+ match_16bit_am = 1 << 4, /**< node supports 16bit source AM */
+ match_immediate = 1 << 5, /**< node supports immediates */
+ match_8bit = 1 << 6, /**< supports 8 bit modes natively */
+ match_16bit = 1 << 7, /**< supports 16bit modes natively */
+ match_mode_neutral = 1 << 8, /**< 16 and 8 bit modes can be emulated
+ by 32 bit operations */
+ match_dest_am = 1 << 9,
+ match_try_am = 1 << 10, /**< only try to produce AM node, don't
+ do anything if AM isn't possible */
+ match_two_users = 1 << 11 /**< the instruction uses a load two times ... */
+} match_flags_t;
+
+typedef struct ia32_op_attr_t ia32_op_attr_t;
+struct ia32_op_attr_t {
+ match_flags_t flags;
+ unsigned latency;
+};
+
+#ifndef NDEBUG
+typedef enum {
+ IA32_ATTR_INVALID = 0,
+ IA32_ATTR_ia32_attr_t = 1 << 0,
+ IA32_ATTR_ia32_x87_attr_t = 1 << 1,
+ IA32_ATTR_ia32_asm_attr_t = 1 << 2,
+ IA32_ATTR_ia32_immediate_attr_t = 1 << 3,
+ IA32_ATTR_ia32_condcode_attr_t = 1 << 4,
+ IA32_ATTR_ia32_copyb_attr_t = 1 << 5
+} ia32_attr_type_t;
+#endif
+
+/**
+ * The generic ia32 attributes. Every node has them.
+ */
+typedef struct ia32_attr_t ia32_attr_t;
+struct ia32_attr_t {
+ except_attr exc; /**< the exception attribute. MUST be the first one. */
+ struct ia32_attr_data_bitfield {
+ unsigned flags:5; /**< Indicating if spillable, rematerializeable, stack modifying and/or ignore. */
+ unsigned tp:3; /**< ia32 node type. */
+ unsigned am_support:2; /**< Indicates the address mode type supported by this node. */
+ unsigned am_arity : 2;
+ unsigned am_scale:2; /**< The address mode scale for index register. */
+ unsigned am_sc_sign:1; /**< The sign bit of the address mode symconst. */
+
+ unsigned use_frame:1; /**< Indicates whether the operation uses the frame pointer or not. */
+ unsigned has_except_label:1; /**< Set if this node needs a label because of possible exception. */
+
+ unsigned is_commutative:1; /**< Indicates whether op is commutative or not. */
+
+ unsigned need_stackent:1; /**< Set to 1 if node need space on stack. */
+ unsigned need_64bit_stackent:1; /**< needs a 64bit stack entity (see double->unsigned int conv) */
+ unsigned need_32bit_stackent:1; /**< needs a 32bit stack entity */
+ unsigned ins_permuted : 1; /**< inputs of node have been permuted
+ (for commutative nodes) */
+ unsigned cmp_unsigned : 1; /**< compare should be unsigned */
+ unsigned is_reload : 1; /**< node performs a reload */
+ unsigned is_spill : 1;
+ unsigned is_remat : 1;
+ } data;
+
+ int *out_flags; /**< flags for each produced value */
+
+ int am_offs; /**< offsets for AddrMode */
+ ir_entity *am_sc; /**< SymConst for AddrMode */
+
+ ir_mode *ls_mode; /**< Load/Store mode: This is the mode of the
+ value that is manipulated by this node. */
+
+ ir_entity *frame_ent; /**< the frame entity attached to this node */
+
+ const be_execution_unit_t ***exec_units; /**< list of units this operation can be executed on */
+
+ const arch_register_req_t **in_req; /**< register requirements for arguments */
+ const arch_register_req_t **out_req; /**< register requirements for results */
+
+ const arch_register_t **slots; /**< register slots for assigned registers */
+
+ ir_label_t exc_label; /**< the exception label iff this instruction can throw an exception */