-static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) {
- const char *name, *p;
- ir_mode *mode = NULL;
- int bad = 0;
-
- switch (reason) {
- case dump_node_opcode_txt:
- name = get_irn_opname(n);
- fprintf(F, "%s", name);
- break;
-
- case dump_node_mode_txt:
- mode = get_irn_mode(n);
-
- if (mode == mode_BB || mode == mode_ANY || mode == mode_BAD || mode == mode_T) {
- mode = NULL;
- }
- else if (is_ia32_Load(n)) {
- mode = get_irn_mode(get_irn_n(n, 1));
- }
- else if (is_ia32_Store(n)) {
- mode = get_irn_mode(get_irn_n(n, 2));
- }
-
- if (mode)
- fprintf(F, "[%s]", get_mode_name(mode));
- break;
-
- case dump_node_nodeattr_txt:
- name = get_irn_opname(n);
- p = name + strlen(name) - 2;
- if (p[0] == '_' && p[1] == 'i') {
- tarval *tv = get_ia32_Immop_tarval(n);
- if (tv)
- fprintf_tv(F, tv, 1);
- else {
- fprintf(F, "[SymC &%s]", get_sc_name(get_ia32_old_ir(n)));
- }
- }
- else if (is_ia32_Call(n)) {
- ir_node *old_call = get_ia32_old_ir(n);
- ir_node *sc = get_Call_ptr(old_call);
-
- fprintf(F, "&%s ", get_sc_name(sc));
- }
- break;
-
- case dump_node_info_txt:
- if (is_ia32_Lea(n)) {
- tarval *o = get_ia32_offs(n);
- tarval *tv = get_ia32_Immop_tarval(n);
-
- fprintf(F, "LEA ");
- if (o)
- fprintf_tv(F, o, 0);
- fprintf(F, "(%s, %s", get_irn_opname(get_irn_n(n, 0)), get_irn_opname(get_irn_n(n, 1)));
- if (tv) {
- fprintf(F, ", ");
- fprintf_tv(F, tv, 0);
- }
- fprintf(F, ")\n");
- }
- break;
- }
-
- return bad;
+static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
+ ir_mode *mode = NULL;
+ int bad = 0;
+ int i, n_res, flags;
+ const arch_register_req_t **reqs;
+ const arch_register_t **slots;
+
+ switch (reason) {
+ case dump_node_opcode_txt:
+ fprintf(F, "%s", get_irn_opname(n));
+
+ if(is_ia32_Immediate(n) || is_ia32_Const(n)) {
+ const ia32_immediate_attr_t *attr
+ = get_ia32_immediate_attr_const(n);
+
+ fputc(' ', F);
+ if(attr->symconst) {
+ if(attr->sc_sign) {
+ fputc('-', F);
+ }
+ fputs(get_entity_name(attr->symconst), F);
+ }
+ if(attr->offset != 0 || attr->symconst == NULL) {
+ if(attr->offset > 0 && attr->symconst != NULL) {
+ fputc('+', F);
+ }
+ fprintf(F, "%ld", attr->offset);
+ }
+ }
+ else {
+ const ia32_attr_t *attr = get_ia32_attr_const(n);
+
+ if(attr->am_sc != NULL || attr->am_offs != 0)
+ fputs(" [", F);
+
+ if(attr->am_sc != NULL) {
+ if(attr->data.am_sc_sign) {
+ fputc('-', F);
+ }
+ fputs(get_entity_name(attr->am_sc), F);
+ }
+ if(attr->am_offs != 0) {
+ if(attr->am_offs > 0 && attr->am_sc != NULL) {
+ fputc('+', F);
+ }
+ fprintf(F, "%d", attr->am_offs);
+ }
+
+ if(attr->am_sc != NULL || attr->am_offs != 0)
+ fputc(']', F);
+ }
+ break;
+
+ case dump_node_mode_txt:
+ if (is_ia32_Ld(n) || is_ia32_St(n)) {
+ mode = get_ia32_ls_mode(n);
+ fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
+ }
+ break;
+
+ case dump_node_nodeattr_txt:
+ if (! is_ia32_Lea(n)) {
+ if (is_ia32_AddrModeS(n)) {
+ fprintf(F, "[AM S] ");
+ } else if (is_ia32_AddrModeD(n)) {
+ fprintf(F, "[AM D] ");
+ }
+ }
+
+ break;
+
+ case dump_node_info_txt:
+ n_res = get_ia32_n_res(n);
+ fprintf(F, "=== IA32 attr begin ===\n");
+
+ /* dump IN requirements */
+ if (get_irn_arity(n) > 0) {
+ reqs = get_ia32_in_req_all(n);
+ dump_reg_req(F, n, reqs, 0);
+ }
+
+ /* dump OUT requirements */
+ if (n_res > 0) {
+ reqs = get_ia32_out_req_all(n);
+ dump_reg_req(F, n, reqs, 1);
+ }
+
+ /* dump assigned registers */
+ slots = get_ia32_slots(n);
+ if (slots && n_res > 0) {
+ for (i = 0; i < n_res; i++) {
+ const arch_register_t *reg;
+
+ reg = slots[i];
+
+ fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
+ }
+ fprintf(F, "\n");
+ }
+
+ /* dump op type */
+ fprintf(F, "op = ");
+ switch (get_ia32_op_type(n)) {
+ case ia32_Normal:
+ fprintf(F, "Normal");
+ break;
+ case ia32_AddrModeD:
+ fprintf(F, "AM Dest (Load+Store)");
+ break;
+ case ia32_AddrModeS:
+ fprintf(F, "AM Source (Load)");
+ break;
+ default:
+ fprintf(F, "unknown (%d)", get_ia32_op_type(n));
+ break;
+ }
+ fprintf(F, "\n");
+
+ /* dump supported am */
+ fprintf(F, "AM support = ");
+ switch (get_ia32_am_support(n)) {
+ case ia32_am_None:
+ fprintf(F, "none");
+ break;
+ case ia32_am_Source:
+ fprintf(F, "source only (Load)");
+ break;
+ default:
+ fprintf(F, "unknown (%d)", get_ia32_am_support(n));
+ break;
+ }
+ fprintf(F, "\n");
+
+ /* dump AM offset */
+ if(get_ia32_am_offs_int(n) != 0) {
+ fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
+ }
+
+ /* dump AM symconst */
+ if(get_ia32_am_sc(n) != NULL) {
+ ir_entity *ent = get_ia32_am_sc(n);
+ ident *id = get_entity_ld_ident(ent);
+ fprintf(F, "AM symconst = %s\n", get_id_str(id));
+ }
+
+ /* dump AM scale */
+ fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
+
+ /* dump pn code */
+ if (is_ia32_SwitchJmp(n)) {
+ fprintf(F, "pn_code = %ld\n", get_ia32_condcode(n));
+ } else if (is_ia32_CMov(n) || is_ia32_Set(n) || is_ia32_Jcc(n)) {
+ ia32_attr_t *attr = get_ia32_attr(n);
+ long pnc = get_ia32_condcode(n);
+ fprintf(F, "pn_code = 0x%lX (%s)\n", pnc, get_pnc_string(pnc & pn_Cmp_True));
+ fprintf(F, "ins_permuted = %u \n", attr->data.ins_permuted);
+ fprintf(F, "cmp_unsigned = %u \n", attr->data.cmp_unsigned);
+ }
+ else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
+ fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
+ }
+
+ fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
+ fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
+ fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
+ fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
+ fprintf(F, "is reload = %d\n", is_ia32_is_reload(n));
+ fprintf(F, "latency = %d\n", get_ia32_latency(n));
+
+ /* dump flags */
+ fprintf(F, "flags =");
+ flags = get_ia32_flags(n);
+ if (flags == arch_irn_flags_none) {
+ fprintf(F, " none");
+ }
+ else {
+ if (flags & arch_irn_flags_dont_spill) {
+ fprintf(F, " unspillable");
+ }
+ if (flags & arch_irn_flags_rematerializable) {
+ fprintf(F, " remat");
+ }
+ if (flags & arch_irn_flags_ignore) {
+ fprintf(F, " ignore");
+ }
+ if (flags & arch_irn_flags_modify_sp) {
+ fprintf(F, " modify_sp");
+ }
+ if (flags & arch_irn_flags_modify_flags) {
+ fprintf(F, " modify_flags");
+ }
+ }
+ fprintf(F, " (%d)\n", flags);
+
+ /* dump frame entity */
+ fprintf(F, "frame entity = ");
+ if (get_ia32_frame_ent(n)) {
+ ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
+ /* dump modes */
+ fprintf(F, "ls_mode = ");
+ if (get_ia32_ls_mode(n)) {
+ ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
+#ifndef NDEBUG
+ /* dump original ir node name */
+ fprintf(F, "orig node = ");
+ if (get_ia32_orig_node(n)) {
+ fprintf(F, "%s", get_ia32_orig_node(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+#endif /* NDEBUG */
+
+ fprintf(F, "=== IA32 attr end ===\n");
+ /* end of: case dump_node_info_txt */
+ break;
+ }
+
+ return bad;