+int is_ia32_AddrModeD(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return (attr->data.tp == ia32_AddrModeD);
+}
+
+/**
+ * Checks if node is a Load or fLoad.
+ */
+int is_ia32_Ld(const ir_node *node) {
+ return is_ia32_Load(node) || is_ia32_fLoad(node);
+}
+
+/**
+ * Checks if node is a Store or fStore.
+ */
+int is_ia32_St(const ir_node *node) {
+ return is_ia32_Store(node) || is_ia32_fStore(node);
+}
+
+/**
+ * Returns the name of the OUT register at position pos.
+ */
+const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+
+ assert(is_ia32_irn(node) && "Not an ia32 node.");
+ assert(pos < attr->data.n_res && "Invalid OUT position.");
+ assert(attr->slots[pos] && "No register assigned");
+
+ return arch_register_get_name(attr->slots[pos]);
+}
+
+/**
+ * Returns the index of the OUT register at position pos within its register class.
+ */
+int get_ia32_out_regnr(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+
+ assert(is_ia32_irn(node) && "Not an ia32 node.");
+ assert(pos < attr->data.n_res && "Invalid OUT position.");
+ assert(attr->slots[pos] && "No register assigned");
+
+ return arch_register_get_index(attr->slots[pos]);
+}
+
+/**
+ * Returns the OUT register at position pos.
+ */
+const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {