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- Corrected Abs/Nabs check
[libfirm]
/
ir
/
be
/
ia32
/
ia32_fpu.c
diff --git
a/ir/be/ia32/ia32_fpu.c
b/ir/be/ia32/ia32_fpu.c
index
2a56a74
..
40ca7b5
100644
(file)
--- a/
ir/be/ia32/ia32_fpu.c
+++ b/
ir/be/ia32/ia32_fpu.c
@@
-1,5
+1,5
@@
/*
/*
- * Copyright (C) 1995-200
7
University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-200
8
University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
*
* This file is part of libFirm.
*
@@
-28,9
+28,7
@@
* to int conversion which are specified as truncation in the C standard we have
* to spill, change and restore the fpu rounding mode between spills.
*/
* to int conversion which are specified as truncation in the C standard we have
* to spill, change and restore the fpu rounding mode between spills.
*/
-#ifdef HAVE_CONFIG_H
#include "config.h"
#include "config.h"
-#endif
#include "ia32_fpu.h"
#include "ia32_new_nodes.h"
#include "ia32_fpu.h"
#include "ia32_new_nodes.h"
@@
-137,7
+135,7
@@
static ir_node *create_fldcw_ent(ia32_code_gen_t *cg, ir_node *block,
set_ia32_ls_mode(reload, ia32_reg_classes[CLASS_ia32_fp_cw].mode);
set_ia32_am_sc(reload, entity);
set_ia32_use_frame(reload);
set_ia32_ls_mode(reload, ia32_reg_classes[CLASS_ia32_fp_cw].mode);
set_ia32_am_sc(reload, entity);
set_ia32_use_frame(reload);
- arch_set_irn_register(
cg->arch_env,
reload, &ia32_fp_cw_regs[REG_FPCW]);
+ arch_set_irn_register(reload, &ia32_fp_cw_regs[REG_FPCW]);
return reload;
}
return reload;
}
@@
-171,7
+169,7
@@
static ir_node *create_fpu_mode_reload(void *env, ir_node *state,
set_ia32_op_type(reload, ia32_AddrModeS);
set_ia32_ls_mode(reload, ia32_reg_classes[CLASS_ia32_fp_cw].mode);
set_ia32_use_frame(reload);
set_ia32_op_type(reload, ia32_AddrModeS);
set_ia32_ls_mode(reload, ia32_reg_classes[CLASS_ia32_fp_cw].mode);
set_ia32_use_frame(reload);
- arch_set_irn_register(
cg->arch_env,
reload, &ia32_fp_cw_regs[REG_FPCW]);
+ arch_set_irn_register(reload, &ia32_fp_cw_regs[REG_FPCW]);
sched_add_before(before, reload);
} else {
sched_add_before(before, reload);
} else {
@@
-199,8
+197,7
@@
static ir_node *create_fpu_mode_reload(void *env, ir_node *state,
/* TODO: make the actual mode configurable in ChangeCW... */
or_const = new_rd_ia32_Immediate(NULL, irg, get_irg_start_block(irg),
NULL, 0, 3072);
/* TODO: make the actual mode configurable in ChangeCW... */
or_const = new_rd_ia32_Immediate(NULL, irg, get_irg_start_block(irg),
NULL, 0, 3072);
- arch_set_irn_register(cg->arch_env, or_const,
- &ia32_gp_regs[REG_GP_NOREG]);
+ arch_set_irn_register(or_const, &ia32_gp_regs[REG_GP_NOREG]);
or = new_rd_ia32_Or(NULL, irg, block, noreg, noreg, nomem, load_res,
or_const);
sched_add_before(before, or);
or = new_rd_ia32_Or(NULL, irg, block, noreg, noreg, nomem, load_res,
or_const);
sched_add_before(before, or);
@@
-216,7
+213,7
@@
static ir_node *create_fpu_mode_reload(void *env, ir_node *state,
set_ia32_op_type(fldcw, ia32_AddrModeS);
set_ia32_ls_mode(fldcw, lsmode);
set_ia32_use_frame(fldcw);
set_ia32_op_type(fldcw, ia32_AddrModeS);
set_ia32_ls_mode(fldcw, lsmode);
set_ia32_use_frame(fldcw);
- arch_set_irn_register(
cg->arch_env,
fldcw, &ia32_fp_cw_regs[REG_FPCW]);
+ arch_set_irn_register(fldcw, &ia32_fp_cw_regs[REG_FPCW]);
sched_add_before(before, fldcw);
reload = fldcw;
sched_add_before(before, fldcw);
reload = fldcw;
@@
-226,7
+223,6
@@
static ir_node *create_fpu_mode_reload(void *env, ir_node *state,
}
typedef struct collect_fpu_mode_nodes_env_t {
}
typedef struct collect_fpu_mode_nodes_env_t {
- const arch_env_t *arch_env;
ir_node **state_nodes;
} collect_fpu_mode_nodes_env_t;
ir_node **state_nodes;
} collect_fpu_mode_nodes_env_t;
@@
-238,7
+234,7
@@
static void collect_fpu_mode_nodes_walker(ir_node *node, void *data)
if(!mode_is_data(get_irn_mode(node)))
return;
if(!mode_is_data(get_irn_mode(node)))
return;
- reg = arch_get_irn_register(
env->arch_env,
node);
+ reg = arch_get_irn_register(node);
if(reg == &ia32_fp_cw_regs[REG_FPCW] && !is_ia32_ChangeCW(node)) {
ARR_APP1(ir_node*, env->state_nodes, node);
}
if(reg == &ia32_fp_cw_regs[REG_FPCW] && !is_ia32_ChangeCW(node)) {
ARR_APP1(ir_node*, env->state_nodes, node);
}
@@
-257,7
+253,6
@@
void rewire_fpu_mode_nodes(be_irg_t *birg)
int i, len;
/* do ssa construction for the fpu modes */
int i, len;
/* do ssa construction for the fpu modes */
- env.arch_env = be_get_birg_arch_env(birg);
env.state_nodes = NEW_ARR_F(ir_node*, 0);
irg_walk_graph(irg, collect_fpu_mode_nodes_walker, NULL, &env);
env.state_nodes = NEW_ARR_F(ir_node*, 0);
irg_walk_graph(irg, collect_fpu_mode_nodes_walker, NULL, &env);
@@
-293,8
+288,7
@@
void rewire_fpu_mode_nodes(be_irg_t *birg)
len = ARR_LEN(phis);
for(i = 0; i < len; ++i) {
ir_node *phi = phis[i];
len = ARR_LEN(phis);
for(i = 0; i < len; ++i) {
ir_node *phi = phis[i];
- be_set_phi_flags(env.arch_env, phi, arch_irn_flags_ignore);
- arch_set_irn_register(env.arch_env, phi, reg);
+ arch_set_irn_register(phi, reg);
}
be_ssa_construction_destroy(&senv);
DEL_ARR_F(env.state_nodes);
}
be_ssa_construction_destroy(&senv);
DEL_ARR_F(env.state_nodes);