- if (arch_register_req_is(reqs[i], should_be_same)) {
- /* get in and out register */
- const arch_register_t *out_reg = get_ia32_out_reg(irn, i);
- int same_pos = get_first_same(reqs[i]);
- ir_node *same_node = get_irn_n(irn, same_pos);
- const arch_register_t *same_reg
- = arch_get_irn_register(arch_env, same_node);
- const arch_register_class_t *same_cls;
- ir_graph *irg = cg->irg;
- dbg_info *dbgi = get_irn_dbg_info(irn);
- ir_node *block = get_nodes_block(irn);
- ir_mode *proj_mode;
- ir_node *load;
- ir_node *load_res;
- ir_node *mem;
- int pnres;
- int pnmem;
-
- /* should_be same constraint is fullfilled, nothing to do */
- if(out_reg == same_reg)
- continue;
-
- /* we only need to do something if the out reg is the same as base
- or index register */
- if (out_reg != reg_base && out_reg != reg_index)
- continue;
-
- /* turn back address mode */
- same_cls = arch_register_get_class(same_reg);
- mem = get_irn_n(irn, n_ia32_mem);
- assert(get_irn_mode(mem) == mode_M);
- if (same_cls == &ia32_reg_classes[CLASS_ia32_gp]) {
- load = new_rd_ia32_Load(dbgi, irg, block, base, index, mem);
- pnres = pn_ia32_Load_res;
- pnmem = pn_ia32_Load_M;
- proj_mode = mode_Iu;
- } else if (same_cls == &ia32_reg_classes[CLASS_ia32_xmm]) {
- load = new_rd_ia32_xLoad(dbgi, irg, block, base, index, mem,
- get_ia32_ls_mode(irn));
- pnres = pn_ia32_xLoad_res;
- pnmem = pn_ia32_xLoad_M;
- proj_mode = mode_E;
- } else {
- panic("cannot turn back address mode for this register class");
- }