+ /* for now, the code works for scheduled and non-schedules blocks */
+ block = get_nodes_block(irn);
+ if (proj2) {
+ /* we have a block schedule */
+ next_bl = next_blk_sched(block);
+
+ if (get_cfop_target_block(proj1) == next_bl) {
+ /* exchange both proj's so the second one can be omitted */
+ const ir_node *t = proj1;
+ proj1 = proj2;
+ proj2 = t;
+ }
+ }
+
+ /* the first Proj must always be created */
+ if (get_Proj_proj(proj1) == pn_Cond_true) {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
+ get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
+ get_cfop_target(proj1, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == TRUE */");
+ }
+ else {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
+ get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), mode),
+ !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
+ get_cfop_target(proj1, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == FALSE */");
+ }
+ IA32_DO_EMIT(irn);
+
+ /* the second Proj might be a fallthrough */
+ if (proj2) {
+ if (get_cfop_target_block(proj2) != next_bl) {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
+ }
+ else {
+ cmd_buf[0] = '\0';
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrogh %s */", get_cfop_target(proj2, buf));
+ }
+ IA32_DO_EMIT(irn);
+ }
+}
+
+/**
+ * Emits code for conditional jump.
+ */
+static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
+ FILE *F = env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN];
+ char cmnt_buf[SNPRINTF_BUF_LEN];
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
+ IA32_DO_EMIT(irn);
+ finish_CondJmp(F, irn, get_ia32_res_mode(irn));
+}
+
+/**
+ * Emits code for conditional jump with two variables.
+ */
+static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
+ CondJmp_emitter(irn, env);
+}
+
+/**
+ * Emits code for conditional test and jump.
+ */
+static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
+
+#define IA32_IS_IMMOP (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn))
+
+ FILE *F = env->out;
+ const char *op1 = arch_register_get_name(get_in_reg(irn, 0));
+ const char *op2 = IA32_IS_IMMOP ? get_ia32_cnst(irn) : NULL;
+ char cmd_buf[SNPRINTF_BUF_LEN];
+ char cmnt_buf[SNPRINTF_BUF_LEN];
+
+ if (! op2)
+ op2 = arch_register_get_name(get_in_reg(irn, 1));
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "test %%%s,%s%s ", op1, IA32_IS_IMMOP ? " " : " %", op2);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
+
+ IA32_DO_EMIT(irn);
+ finish_CondJmp(F, irn, get_ia32_res_mode(irn));
+
+#undef IA32_IS_IMMOP
+}
+
+/**
+ * Emits code for conditional test and jump with two variables.
+ */
+static void emit_ia32_TestJmp(const ir_node *irn, ia32_emit_env_t *env) {
+ TestJmp_emitter(irn, env);
+}
+
+static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
+ FILE *F = env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN];
+ char cmnt_buf[SNPRINTF_BUF_LEN];
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
+ IA32_DO_EMIT(irn);
+ finish_CondJmp(F, irn, get_ia32_res_mode(irn));
+}
+
+static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
+ FILE *F = env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN];
+ char cmnt_buf[SNPRINTF_BUF_LEN];
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
+ IA32_DO_EMIT(irn);
+ finish_CondJmp(F, irn, get_ia32_res_mode(irn));
+}
+
+/**
+ * Emits code for conditional x87 floating point jump with two variables.
+ */
+static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) {
+ FILE *F = env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN];
+ char cmnt_buf[SNPRINTF_BUF_LEN];
+ ia32_attr_t *attr = get_ia32_attr(irn);
+ const char *reg = attr->x87[1]->name;
+ const char *instr = "fcom";
+ int reverse = 0;
+
+ switch (get_ia32_pncode(irn)) {
+ case iro_ia32_fcomrJmp:
+ reverse = 1;
+ case iro_ia32_fcomJmp:
+ default:
+ instr = "fucom";
+ break;
+ case iro_ia32_fcomrpJmp:
+ reverse = 1;
+ case iro_ia32_fcompJmp:
+ instr = "fucomp";
+ break;
+ case iro_ia32_fcomrppJmp:
+ reverse = 1;
+ case iro_ia32_fcomppJmp:
+ instr = "fucompp";
+ reg = "";
+ break;
+ }
+
+ if (reverse)
+ set_ia32_pncode(irn, (long)get_negated_pnc(get_ia32_pncode(irn), mode_Is));
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %s", instr, reg);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
+ IA32_DO_EMIT(irn);
+// lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %3D", irn);
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %%ax", irn);
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store x87 FPU Control Word */");
+ IA32_DO_EMIT(irn);
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "sahf");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store ah into flags */");
+ IA32_DO_EMIT(irn);
+
+ finish_CondJmp(F, irn, mode_Is);
+}
+
+/*********************************************************
+ * _ _ _
+ * (_) | (_)
+ * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
+ * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
+ * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
+ * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
+ * _/ | | |
+ * |__/ |_|
+ *********************************************************/
+
+/* jump table entry (target and corresponding number) */
+typedef struct _branch_t {
+ ir_node *target;
+ int value;
+} branch_t;
+
+/* jump table for switch generation */
+typedef struct _jmp_tbl_t {
+ ir_node *defProj; /**< default target */
+ int min_value; /**< smallest switch case */
+ int max_value; /**< largest switch case */
+ int num_branches; /**< number of jumps */
+ char *label; /**< label of the jump table */
+ branch_t *branches; /**< jump array */
+} jmp_tbl_t;
+
+/**
+ * Compare two variables of type branch_t. Used to sort all switch cases
+ */
+static int ia32_cmp_branch_t(const void *a, const void *b) {
+ branch_t *b1 = (branch_t *)a;
+ branch_t *b2 = (branch_t *)b;
+
+ if (b1->value <= b2->value)
+ return -1;
+ else
+ return 1;
+}
+
+/**
+ * Emits code for a SwitchJmp (creates a jump table if
+ * possible otherwise a cmp-jmp cascade). Port from
+ * cggg ia32 backend
+ */
+static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ unsigned long interval;
+ char buf[SNPRINTF_BUF_LEN];
+ int last_value, i, pn;
+ jmp_tbl_t tbl;
+ ir_node *proj;
+ const ir_edge_t *edge;
+ const lc_arg_env_t *env = ia32_get_arg_env();
+ FILE *F = emit_env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
+ /* fill the table structure */
+ tbl.label = xmalloc(SNPRINTF_BUF_LEN);
+ tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
+ tbl.defProj = NULL;
+ tbl.num_branches = get_irn_n_edges(irn);
+ tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
+ tbl.min_value = INT_MAX;
+ tbl.max_value = INT_MIN;
+
+ i = 0;
+ /* go over all proj's and collect them */
+ foreach_out_edge(irn, edge) {
+ proj = get_edge_src_irn(edge);
+ assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
+
+ pn = get_Proj_proj(proj);
+
+ /* create branch entry */
+ tbl.branches[i].target = proj;
+ tbl.branches[i].value = pn;
+
+ tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
+ tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
+
+ /* check for default proj */
+ if (pn == get_ia32_pncode(irn)) {
+ assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
+ tbl.defProj = proj;
+ }
+
+ i++;
+ }
+
+ /* sort the branches by their number */
+ qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
+
+ /* two-complement's magic make this work without overflow */
+ interval = tbl.max_value - tbl.min_value;
+
+ /* emit the table */
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %u", irn, interval);
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
+ IA32_DO_EMIT(irn);
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
+ IA32_DO_EMIT(irn);
+
+ if (tbl.num_branches > 1) {
+ /* create table */
+
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp %s[%1S*4]", tbl.label, irn);
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
+ IA32_DO_EMIT(irn);
+
+ ia32_switch_section(F, SECTION_RODATA);
+ fprintf(F, "\t.align 4\n");
+
+ fprintf(F, "%s:\n", tbl.label);
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", tbl.branches[0].value);
+ IA32_DO_EMIT(irn);
+
+ last_value = tbl.branches[0].value;
+ for (i = 1; i < tbl.num_branches; ++i) {
+ while (++last_value < tbl.branches[i].value) {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
+ IA32_DO_EMIT(irn);
+ }
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
+ IA32_DO_EMIT(irn);
+ }
+ ia32_switch_section(F, SECTION_TEXT);
+ }
+ else {
+ /* one jump is enough */
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
+ IA32_DO_EMIT(irn);
+ }
+
+ if (tbl.label)
+ free(tbl.label);
+ if (tbl.branches)
+ free(tbl.branches);
+}
+
+/**
+ * Emits code for a unconditional jump.
+ */
+static void emit_Jmp(const ir_node *irn, ia32_emit_env_t *env) {
+ ir_node *block, *next_bl;
+ FILE *F = env->out;
+ char buf[SNPRINTF_BUF_LEN], cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
+ /* for now, the code works for scheduled and non-schedules blocks */
+ block = get_nodes_block(irn);
+
+ /* we have a block schedule */
+ next_bl = next_blk_sched(block);
+ if (get_cfop_target_block(irn) != next_bl) {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(irn, buf));
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F) */", irn, get_cfop_target_block(irn));
+ }
+ else {
+ cmd_buf[0] = '\0';
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(irn, buf));
+ }
+ IA32_DO_EMIT(irn);
+}
+
+/****************************
+ * _
+ * (_)
+ * _ __ _ __ ___ _ ___
+ * | '_ \| '__/ _ \| |/ __|
+ * | |_) | | | (_) | |\__ \
+ * | .__/|_| \___/| ||___/
+ * | | _/ |
+ * |_| |__/
+ ****************************/
+
+/**
+ * Emits code for a proj -> node
+ */
+static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) {
+ ir_node *pred = get_Proj_pred(irn);
+
+ if (get_irn_op(pred) == op_Start) {
+ switch(get_Proj_proj(irn)) {
+ case pn_Start_X_initial_exec:
+ emit_Jmp(irn, env);
+ break;
+ default:
+ break;
+ }
+ }
+}
+
+/**********************************
+ * _____ ____
+ * / ____| | _ \
+ * | | ___ _ __ _ _| |_) |
+ * | | / _ \| '_ \| | | | _ <
+ * | |___| (_) | |_) | |_| | |_) |
+ * \_____\___/| .__/ \__, |____/
+ * | | __/ |
+ * |_| |___/
+ **********************************/
+
+/**
+ * Emit movsb/w instructions to make mov count divideable by 4
+ */
+static void emit_CopyB_prolog(FILE *F, int rem, int size) {
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
+ fprintf(F, "\t/* memcopy %d bytes*/\n", size);
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward*/");
+ IA32_DO_EMIT(NULL);
+
+ switch(rem) {
+ case 1:
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */");
+ break;
+ case 2:
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */");
+ break;
+ case 3:
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
+ IA32_DO_EMIT(NULL);
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
+ break;
+ }
+
+ IA32_DO_EMIT(NULL);
+}
+
+/**
+ * Emit rep movsd instruction for memcopy.
+ */
+static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ tarval *tv = get_ia32_Immop_tarval(irn);
+ int rem = get_tarval_long(tv);
+ ir_node *size_node = get_irn_n(irn, 2);
+ int size;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
+ /* beware: size_node could be a be_Copy to fulfill constraints for ecx */
+ size_node = be_is_Copy(size_node) ? be_get_Copy_op(size_node) : size_node;
+ size = get_tarval_long(get_ia32_Immop_tarval(size_node));
+
+ emit_CopyB_prolog(F, rem, size);
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */");
+ IA32_DO_EMIT(irn);
+}
+
+/**
+ * Emits unrolled memcopy.
+ */
+static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ tarval *tv = get_ia32_Immop_tarval(irn);
+ int size = get_tarval_long(tv);
+ FILE *F = emit_env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
+ emit_CopyB_prolog(F, size & 0x3, size);
+
+ size >>= 2;
+ while (size--) {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsd");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy unrolled */");
+ IA32_DO_EMIT(irn);
+ }
+}
+
+
+
+/***************************
+ * _____
+ * / ____|
+ * | | ___ _ ____ __
+ * | | / _ \| '_ \ \ / /
+ * | |___| (_) | | | \ V /
+ * \_____\___/|_| |_|\_/
+ *
+ ***************************/
+
+/**
+ * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
+ */
+static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ const lc_arg_env_t *env = ia32_get_arg_env();
+ ir_mode *src_mode = get_ia32_src_mode(irn);
+ ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
+ char *from, *to, buf[64];
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
+ from = mode_is_float(src_mode) ? (get_mode_size_bits(src_mode) == 32 ? "ss" : "sd") : "si";
+ to = mode_is_float(tgt_mode) ? (get_mode_size_bits(tgt_mode) == 32 ? "ss" : "sd") : "si";
+
+ switch(get_ia32_op_type(irn)) {
+ case ia32_Normal:
+ lc_esnprintf(env, buf, sizeof(buf), "%1D, %3S", irn, irn);
+ break;
+ case ia32_AddrModeS:
+ lc_esnprintf(env, buf, sizeof(buf), "%1D, %s", irn, ia32_emit_am(irn, emit_env));
+ break;
+ default:
+ assert(0 && "unsupported op type for Conv");
+ }
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cvt%s2%s %s", from, to, buf);
+ lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F, %+F) */", irn, src_mode, tgt_mode);
+ IA32_DO_EMIT(irn);
+}
+
+static void emit_ia32_Conv_I2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ emit_ia32_Conv_with_FP(irn, emit_env);
+}
+
+static void emit_ia32_Conv_FP2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ emit_ia32_Conv_with_FP(irn, emit_env);
+}
+
+static void emit_ia32_Conv_FP2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ emit_ia32_Conv_with_FP(irn, emit_env);
+}
+
+/**
+ * Emits code for an Int conversion.
+ */
+static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ const lc_arg_env_t *env = ia32_get_arg_env();
+ char *move_cmd = "movzx";
+ char *conv_cmd = NULL;
+ ir_mode *src_mode = get_ia32_src_mode(irn);
+ ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
+ int n, m;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+ const arch_register_t *in_reg, *out_reg;
+
+ n = get_mode_size_bits(src_mode);
+ m = get_mode_size_bits(tgt_mode);
+
+ if (mode_is_signed(n < m ? src_mode : tgt_mode)) {
+ move_cmd = "movsx";
+ if (n == 8 || m == 8)
+ conv_cmd = "cbw";
+ else if (n == 16 || m == 16)
+ conv_cmd = "cwde";
+ else
+ assert(0 && "unsupported Conv_I2I");
+ }
+
+ switch(get_ia32_op_type(irn)) {
+ case ia32_Normal:
+ in_reg = get_in_reg(irn, 2);
+ out_reg = get_out_reg(irn, 0);
+
+ if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
+ REGS_ARE_EQUAL(out_reg, in_reg) &&
+ mode_is_signed(n < m ? src_mode : tgt_mode))
+ {
+ /* argument and result are both in EAX and */
+ /* signedness is ok: -> use converts */
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s", conv_cmd);
+ }
+ else if (REGS_ARE_EQUAL(out_reg, in_reg) &&
+ ! mode_is_signed(n < m ? src_mode : tgt_mode))
+ {
+ /* argument and result are in the same register */
+ /* and signedness is ok: -> use and with mask */
+ int mask = (1 << (n < m ? n : m)) - 1;
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "and %1D, 0x%x", irn, mask);
+ }
+ else {
+ /* use move w/o sign extension */
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %%%s",
+ move_cmd, irn, ia32_get_reg_name_for_mode(emit_env, n < m ? src_mode : tgt_mode, in_reg));
+ }
+
+ break;
+ case ia32_AddrModeS:
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %s",
+ move_cmd, irn, ia32_emit_am(irn, emit_env));
+ break;
+ default:
+ assert(0 && "unsupported op type for Conv");
+ }
+
+ lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%d Bit mode_%F -> %d Bit mode_%F) */",
+ irn, n, src_mode, m, tgt_mode);
+
+ IA32_DO_EMIT(irn);
+}
+
+/**
+ * Emits code for an 8Bit Int conversion.
+ */
+void emit_ia32_Conv_I2I8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ emit_ia32_Conv_I2I(irn, emit_env);
+}
+
+
+/*******************************************
+ * _ _
+ * | | | |
+ * | |__ ___ _ __ ___ __| | ___ ___
+ * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
+ * | |_) | __/ | | | (_) | (_| | __/\__ \
+ * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
+ *
+ *******************************************/
+
+/**
+ * Emits a backend call
+ */
+static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ entity *ent = be_Call_get_entity(irn);
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
+ if (ent) {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_ld_name(ent));
+ }
+ else {
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr));
+ }
+
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn);
+
+ IA32_DO_EMIT(irn);
+}
+
+/**
+ * Emits code to increase stack pointer.
+ */
+static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ unsigned offs = be_get_IncSP_offset(irn);
+ be_stack_dir_t dir = be_get_IncSP_direction(irn);
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
+ if (offs) {
+ if (dir == be_stack_dir_expand)
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1S, %u", irn, offs);
+ else
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, offs);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
+ }
+ else {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* omitted %+F (IncSP) with 0 */", irn);
+ }
+
+ IA32_DO_EMIT(irn);
+}
+
+/**
+ * Emits code to set stack pointer.
+ */
+static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (restore SP) */", irn);
+ IA32_DO_EMIT(irn);
+}
+
+/**
+ * Emits code for Copy.
+ */
+static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ const arch_env_t *aenv = emit_env->arch_env;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
+ if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, be_get_Copy_op(irn))))
+ return;
+
+ if (mode_is_float(get_irn_mode(irn)))
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movs%M %1D, %1S", irn, irn, irn);
+ else
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %1S", irn, irn);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
+ IA32_DO_EMIT(irn);
+}
+
+/**
+ * Emits code for exchange.
+ */
+static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn);
+ IA32_DO_EMIT(irn);
+}
+
+/**
+ * Emits code for Constant loading.
+ */
+static void emit_ia32_Const(const ir_node *n, ia32_emit_env_t *env) {
+ FILE *F = env->out;
+ char cmd_buf[256], cmnt_buf[256];
+ const lc_arg_env_t *arg_env = ia32_get_arg_env();
+
+ if (get_ia32_Immop_tarval(n) == get_tarval_null(get_irn_mode(n))) {
+ const char *instr = "xor";
+ if (env->isa->opt_arch == arch_pentium_4) {
+ /* P4 prefers sub r, r, others xor r, r */
+ instr = "sub";
+ }
+ lc_esnprintf(arg_env, cmd_buf, 256, "%s %1D, %1D ", instr, n, n);
+ lc_esnprintf(arg_env, cmnt_buf, 256, "/* optimized mov 0 to register */");
+ }
+ else {
+ if (get_ia32_op_type(n) == ia32_SymConst) {
+ lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, OFFSET FLAT:%C ", n, n);
+ lc_esnprintf(arg_env, cmnt_buf, 256, "/* Move address of SymConst into register */");
+ }
+ else {
+ lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, %C ", n, n);
+ lc_esnprintf(arg_env, cmnt_buf, 256, "/* Mov Const into register */");
+ }