+ pn_Cmp pnc = get_ia32_condcode(node);
+ pnc = determine_final_pnc(node, n_ia32_Setcc_eflags, pnc);
+ if (pnc & ia32_pn_Cmp_float) {
+ switch (pnc & 0x0f) {
+ case pn_Cmp_Uo:
+ /* setp <dreg */
+ bemit8(0x0F);
+ bemit8(0x9A);
+ bemit_modrm8(REG_LOW, dreg);
+ return;
+
+ case pn_Cmp_Leg:
+ /* setnp <dreg*/
+ bemit8(0x0F);
+ bemit8(0x9B);
+ bemit_modrm8(REG_LOW, dreg);
+ return;
+
+ case pn_Cmp_Eq:
+ case pn_Cmp_Lt:
+ case pn_Cmp_Le:
+ /* set%PNC <dreg */
+ bemit8(0x0F);
+ bemit8(0x90 | pnc2cc(pnc));
+ bemit_modrm8(REG_LOW, dreg);
+
+ /* setnp >dreg */
+ bemit8(0x0F);
+ bemit8(0x9B);
+ bemit_modrm8(REG_HIGH, dreg);
+
+ /* andb %>dreg, %<dreg */
+ bemit8(0x20);
+ bemit_modrr8(REG_LOW, dreg, REG_HIGH, dreg);
+ return;
+
+ case pn_Cmp_Ug:
+ case pn_Cmp_Uge:
+ case pn_Cmp_Ne:
+ /* set%PNC <dreg */
+ bemit8(0x0F);
+ bemit8(0x90 | pnc2cc(pnc));
+ bemit_modrm8(REG_LOW, dreg);
+
+ /* setp >dreg */
+ bemit8(0x0F);
+ bemit8(0x9A);
+ bemit_modrm8(REG_HIGH, dreg);
+
+ /* orb %>dreg, %<dreg */
+ bemit8(0x08);
+ bemit_modrr8(REG_LOW, dreg, REG_HIGH, dreg);
+ return;
+
+ default:
+ break;
+ }
+ }
+ /* set%PNC <dreg */
+ bemit8(0x0F);
+ bemit8(0x90 | pnc2cc(pnc));
+ bemit_modrm8(REG_LOW, dreg);
+}
+
+static void bemit_cmovcc(const ir_node *node)
+{
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ int ins_permuted = attr->data.ins_permuted;
+ const arch_register_t *out = arch_irn_get_register(node, pn_ia32_res);
+ pn_Cmp pnc = get_ia32_condcode(node);
+ const arch_register_t *in_true;
+ const arch_register_t *in_false;
+
+ pnc = determine_final_pnc(node, n_ia32_CMovcc_eflags, pnc);
+
+ in_true = arch_get_irn_register(get_irn_n(node, n_ia32_CMovcc_val_true));
+ in_false = arch_get_irn_register(get_irn_n(node, n_ia32_CMovcc_val_false));
+
+ /* should be same constraint fullfilled? */
+ if (out == in_false) {
+ /* yes -> nothing to do */
+ } else if (out == in_true) {
+ assert(get_ia32_op_type(node) == ia32_Normal);
+ ins_permuted = !ins_permuted;
+ in_true = in_false;
+ } else {
+ /* we need a mov */
+ bemit8(0x8B); // mov %in_false, %out
+ bemit_modrr(in_false, out);
+ }
+
+ if (ins_permuted)
+ pnc = ia32_get_negated_pnc(pnc);
+
+ /* TODO: handling of Nans isn't correct yet */
+
+ bemit8(0x0F);
+ bemit8(0x40 | pnc2cc(pnc));
+ if (get_ia32_op_type(node) == ia32_Normal) {
+ bemit_modrr(in_true, out);
+ } else {
+ bemit_mod_am(reg_gp_map[out->index], node);
+ }
+}
+
+static void bemit_cmp(const ir_node *node)
+{
+ unsigned ls_size = get_mode_size_bits(get_ia32_ls_mode(node));
+ ir_node *right;
+
+ if (ls_size == 16)
+ bemit8(0x66);
+
+ right = get_irn_n(node, n_ia32_binary_right);
+ if (is_ia32_Immediate(right)) {
+ /* Use in-reg, because some instructions (cmp, test) have no out-reg. */
+ const ir_node *op = get_irn_n(node, n_ia32_binary_right);
+ const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(op);
+ unsigned size;
+
+ if (attr->symconst != NULL) {
+ size = 4;
+ } else {
+ /* check for sign extension */
+ size = get_signed_imm_size(attr->offset);
+ }
+
+ switch (size) {
+ case 1:
+ bemit8(0x81 | SIGNEXT_IMM);
+ /* cmp has this special mode */
+ if (get_ia32_op_type(node) == ia32_AddrModeS) {
+ bemit_mod_am(7, node);
+ } else {
+ const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left);
+ bemit_modru(reg, 7);
+ }
+ bemit8((unsigned char)attr->offset);
+ return;
+ case 2:
+ case 4:
+ /* check for eax variant: this variant is shorter for 32bit immediates only */
+ if (get_ia32_op_type(node) == ia32_AddrModeS) {
+ bemit8(0x81);
+ bemit_mod_am(7, node);
+ } else {
+ const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left);
+ if (reg->index == REG_GP_EAX) {
+ bemit8(0x3D);
+ } else {
+ bemit8(0x81);
+ bemit_modru(reg, 7);
+ }
+ }
+ if (ls_size == 16) {
+ bemit16(attr->offset);
+ } else {
+ bemit_entity(attr->symconst, attr->sc_sign, attr->offset, false);
+ }
+ return;
+ }
+ panic("invalid imm size?!?");
+ } else {
+ const arch_register_t *out = get_in_reg(node, n_ia32_binary_left);
+ bemit8(0x3B);
+ if (get_ia32_op_type(node) == ia32_Normal) {
+ const arch_register_t *op2 = get_in_reg(node, n_ia32_binary_right);
+ bemit_modrr(op2, out);
+ } else {
+ bemit_mod_am(reg_gp_map[out->index], node);
+ }
+ }
+}
+
+static void bemit_cmp8bit(const ir_node *node)
+{
+ ir_node *right = get_irn_n(node, n_ia32_binary_right);
+ if (is_ia32_Immediate(right)) {
+ if (get_ia32_op_type(node) == ia32_Normal) {
+ const arch_register_t *out = get_in_reg(node, n_ia32_Cmp_left);
+ if (out->index == REG_GP_EAX) {
+ bemit8(0x3C);
+ } else {
+ bemit8(0x80);
+ bemit_modru(out, 7);
+ }
+ } else {
+ bemit8(0x80);
+ bemit_mod_am(7, node);
+ }
+ bemit8(get_ia32_immediate_attr_const(right)->offset);
+ } else {
+ const arch_register_t *out = get_in_reg(node, n_ia32_Cmp_left);
+ bemit8(0x3A);
+ if (get_ia32_op_type(node) == ia32_Normal) {
+ const arch_register_t *in = get_in_reg(node, n_ia32_Cmp_right);
+ bemit_modrr(out, in);
+ } else {
+ bemit_mod_am(reg_gp_map[out->index], node);
+ }
+ }
+}
+
+static void bemit_test8bit(const ir_node *node)
+{
+ ir_node *right = get_irn_n(node, n_ia32_Test8Bit_right);
+ if (is_ia32_Immediate(right)) {
+ if (get_ia32_op_type(node) == ia32_Normal) {
+ const arch_register_t *out = get_in_reg(node, n_ia32_Test8Bit_left);
+ if (out->index == REG_GP_EAX) {
+ bemit8(0xA8);
+ } else {
+ bemit8(0xF6);
+ bemit_modru(out, 0);
+ }
+ } else {
+ bemit8(0xF6);
+ bemit_mod_am(0, node);
+ }
+ bemit8(get_ia32_immediate_attr_const(right)->offset);
+ } else {
+ const arch_register_t *out = get_in_reg(node, n_ia32_Test8Bit_left);
+ bemit8(0x84);
+ if (get_ia32_op_type(node) == ia32_Normal) {
+ const arch_register_t *in = get_in_reg(node, n_ia32_Test8Bit_right);
+ bemit_modrr(out, in);
+ } else {
+ bemit_mod_am(reg_gp_map[out->index], node);
+ }
+ }
+}
+
+static void bemit_imul(const ir_node *node)
+{
+ ir_node *right = get_irn_n(node, n_ia32_IMul_right);
+ /* Do we need the immediate form? */
+ if (is_ia32_Immediate(right)) {
+ int imm = get_ia32_immediate_attr_const(right)->offset;
+ if (get_signed_imm_size(imm) == 1) {
+ bemit_unop_reg(node, 0x6B, n_ia32_IMul_left);
+ bemit8(imm);
+ } else {
+ bemit_unop_reg(node, 0x69, n_ia32_IMul_left);
+ bemit32(imm);
+ }
+ } else {
+ bemit8(0x0F);
+ bemit_unop_reg(node, 0xAF, n_ia32_IMul_right);
+ }
+}
+
+static void bemit_dec(const ir_node *node)
+{
+ const arch_register_t *out = get_out_reg(node, pn_ia32_Dec_res);
+ bemit8(0x48 + reg_gp_map[out->index]);
+}
+
+static void bemit_inc(const ir_node *node)
+{
+ const arch_register_t *out = get_out_reg(node, pn_ia32_Inc_res);
+ bemit8(0x40 + reg_gp_map[out->index]);
+}
+
+#define UNOPMEM(op, code, ext) \
+static void bemit_##op(const ir_node *node) \
+{ \
+ bemit_unop_mem(node, code, ext); \
+}
+
+UNOPMEM(notmem, 0xF6, 2)
+UNOPMEM(negmem, 0xF6, 3)
+UNOPMEM(incmem, 0xFE, 0)
+UNOPMEM(decmem, 0xFE, 1)
+
+static void bemit_ldtls(const ir_node *node)
+{
+ const arch_register_t *out = get_out_reg(node, 0);
+
+ bemit8(0x65); // gs:
+ if (out->index == REG_GP_EAX) {
+ bemit8(0xA1); // movl 0, %eax
+ } else {
+ bemit8(0x8B); // movl 0, %reg
+ bemit8(MOD_IND | ENC_REG(reg_gp_map[out->index]) | ENC_RM(0x05));
+ }
+ bemit32(0);
+}
+
+/**
+ * Emit a Lea.
+ */
+static void bemit_lea(const ir_node *node)
+{
+ const arch_register_t *out = get_out_reg(node, 0);
+ bemit8(0x8D);
+ bemit_mod_am(reg_gp_map[out->index], node);
+}
+
+/* helper function for bemit_minus64bit */
+static void bemit_helper_mov(const arch_register_t *src, const arch_register_t *dst)
+{
+ bemit8(0x8B); // movl %src, %dst
+ bemit_modrr(src, dst);
+}
+
+/* helper function for bemit_minus64bit */
+static void bemit_helper_neg(const arch_register_t *reg)
+{
+ bemit8(0xF7); // negl %reg
+ bemit_modru(reg, 3);
+}
+
+/* helper function for bemit_minus64bit */
+static void bemit_helper_sbb0(const arch_register_t *reg)
+{
+ bemit8(0x83); // sbbl $0, %reg
+ bemit_modru(reg, 3);
+ bemit8(0);
+}
+
+/* helper function for bemit_minus64bit */
+static void bemit_helper_sbb(const arch_register_t *src, const arch_register_t *dst)
+{
+ bemit8(0x1B); // sbbl %src, %dst
+ bemit_modrr(src, dst);
+}
+
+/* helper function for bemit_minus64bit */
+static void bemit_helper_xchg(const arch_register_t *src, const arch_register_t *dst)
+{
+ if (src->index == REG_GP_EAX) {
+ bemit8(0x90 + reg_gp_map[dst->index]); // xchgl %eax, %dst
+ } else if (dst->index == REG_GP_EAX) {
+ bemit8(0x90 + reg_gp_map[src->index]); // xchgl %src, %eax
+ } else {
+ bemit8(0x87); // xchgl %src, %dst
+ bemit_modrr(src, dst);
+ }
+}
+
+/* helper function for bemit_minus64bit */
+static void bemit_helper_zero(const arch_register_t *reg)
+{
+ bemit8(0x33); // xorl %reg, %reg
+ bemit_modrr(reg, reg);
+}
+
+static void bemit_minus64bit(const ir_node *node)
+{
+ const arch_register_t *in_lo = get_in_reg(node, 0);
+ const arch_register_t *in_hi = get_in_reg(node, 1);
+ const arch_register_t *out_lo = get_out_reg(node, 0);
+ const arch_register_t *out_hi = get_out_reg(node, 1);
+
+ if (out_lo == in_lo) {
+ if (out_hi != in_hi) {
+ /* a -> a, b -> d */
+ goto zero_neg;
+ } else {
+ /* a -> a, b -> b */
+ goto normal_neg;
+ }
+ } else if (out_lo == in_hi) {
+ if (out_hi == in_lo) {
+ /* a -> b, b -> a */
+ bemit_helper_xchg(in_lo, in_hi);
+ goto normal_neg;
+ } else {
+ /* a -> b, b -> d */
+ bemit_helper_mov(in_hi, out_hi);
+ bemit_helper_mov(in_lo, out_lo);
+ goto normal_neg;
+ }
+ } else {
+ if (out_hi == in_lo) {
+ /* a -> c, b -> a */
+ bemit_helper_mov(in_lo, out_lo);
+ goto zero_neg;
+ } else if (out_hi == in_hi) {
+ /* a -> c, b -> b */
+ bemit_helper_mov(in_lo, out_lo);
+ goto normal_neg;
+ } else {
+ /* a -> c, b -> d */
+ bemit_helper_mov(in_lo, out_lo);
+ goto zero_neg;
+ }
+ }
+
+normal_neg:
+ bemit_helper_neg( out_hi);
+ bemit_helper_neg( out_lo);
+ bemit_helper_sbb0(out_hi);
+ return;
+
+zero_neg:
+ bemit_helper_zero(out_hi);
+ bemit_helper_neg( out_lo);
+ bemit_helper_sbb( in_hi, out_hi);
+}
+
+/**
+ * Emit a single opcode.
+ */
+#define EMIT_SINGLEOP(op, code) \