+ /* count inputs which are real values (and not memory) */
+ value_arity = 0;
+ for (i = 0; i < arity; ++i) {
+ ir_node *in = get_irn_n(node, i);
+ if (get_irn_mode(in) == mode_M)
+ continue;
+ ++value_arity;
+ }
+
+ /* Attempt to make ASM node register pressure faithful.
+ * (This does not work for complicated cases yet!)
+ *
+ * Algorithm: Check if there are fewer inputs or outputs (I will call this
+ * the smaller list). Then try to match each constraint of the smaller list
+ * to 1 of the other list. If we can't match it, then we have to add a dummy
+ * input/output to the other list
+ *
+ * FIXME: This is still broken in lots of cases. But at least better than
+ * before...
+ * FIXME: need to do this per register class...
+ */
+ if (out_arity <= value_arity) {
+ int orig_arity = arity;
+ int in_size = arity;
+ int o;
+ bitset_t *used_ins = bitset_alloca(arity);
+ for (o = 0; o < out_arity; ++o) {
+ int i;
+ const arch_register_req_t *outreq = out_reg_reqs[o];
+
+ if (outreq->cls == NULL) {
+ continue;
+ }
+
+ for (i = 0; i < orig_arity; ++i) {
+ const arch_register_req_t *inreq;
+ if (bitset_is_set(used_ins, i))
+ continue;
+ inreq = in_reg_reqs[i];
+ if (!can_match(outreq, inreq))
+ continue;
+ bitset_set(used_ins, i);
+ break;
+ }
+ /* did we find any match? */
+ if (i < orig_arity)
+ continue;
+
+ /* we might need more space in the input arrays */
+ if (arity >= in_size) {
+ const arch_register_req_t **new_in_reg_reqs;
+ ir_node **new_in;
+
+ in_size *= 2;
+ new_in_reg_reqs = OALLOCN(obst, const arch_register_req_t*,
+ in_size);
+ memcpy(new_in_reg_reqs, in_reg_reqs, arity * sizeof(new_in_reg_reqs[0]));
+ new_in = ALLOCANZ(ir_node*, in_size);
+ memcpy(new_in, in, arity*sizeof(new_in[0]));
+
+ in_reg_reqs = new_in_reg_reqs;
+ in = new_in;
+ }