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removed outdated comment
[libfirm]
/
ir
/
be
/
ia32
/
ia32_common_transform.c
diff --git
a/ir/be/ia32/ia32_common_transform.c
b/ir/be/ia32/ia32_common_transform.c
index
7e825bc
..
9e51116
100644
(file)
--- a/
ir/be/ia32/ia32_common_transform.c
+++ b/
ir/be/ia32/ia32_common_transform.c
@@
-226,7
+226,6
@@
int ia32_mode_needs_gp_reg(ir_mode *mode) {
static void parse_asm_constraints(constraint_t *constraint, const char *c,
int is_output)
{
static void parse_asm_constraints(constraint_t *constraint, const char *c,
int is_output)
{
- asm_constraint_flags_t flags = 0;
char immediate_type = '\0';
unsigned limited = 0;
const arch_register_class_t *cls = NULL;
char immediate_type = '\0';
unsigned limited = 0;
const arch_register_class_t *cls = NULL;
@@
-254,15
+253,9
@@
static void parse_asm_constraints(constraint_t *constraint, const char *c,
case '\n':
break;
case '\n':
break;
- case '=':
- flags |= ASM_CONSTRAINT_FLAG_MODIFIER_WRITE
- | ASM_CONSTRAINT_FLAG_MODIFIER_NO_READ;
- break;
-
- case '+':
- flags |= ASM_CONSTRAINT_FLAG_MODIFIER_WRITE
- | ASM_CONSTRAINT_FLAG_MODIFIER_READ;
- break;
+ /* Skip out/in-out marker */
+ case '=': break;
+ case '+': break;
case '*':
++c;
case '*':
++c;
@@
-491,6
+484,7
@@
ir_node *gen_ASM(ir_node *node)
#ifdef FIRM_GRGEN_BE
case TRANSFORMER_PBQP:
#ifdef FIRM_GRGEN_BE
case TRANSFORMER_PBQP:
+ case TRANSFORMER_RAND:
new_block = get_nodes_block(node);
break;
#endif
new_block = get_nodes_block(node);
break;
#endif
@@
-620,6
+614,7
@@
ir_node *gen_ASM(ir_node *node)
#ifdef FIRM_GRGEN_BE
case TRANSFORMER_PBQP:
#ifdef FIRM_GRGEN_BE
case TRANSFORMER_PBQP:
+ case TRANSFORMER_RAND:
input = get_irn_n(node, i);
break;
#endif
input = get_irn_n(node, i);
break;
#endif
@@
-659,6
+654,12
@@
ir_node *gen_ASM(ir_node *node)
new_node = new_rd_ia32_Asm(dbgi, irg, new_block, arity, in, out_arity,
get_ASM_text(node), register_map);
new_node = new_rd_ia32_Asm(dbgi, irg, new_block, arity, in, out_arity,
get_ASM_text(node), register_map);
+ /* Prevent the ASM node from being scheduled before the Barrier, if it has
+ * no inputs */
+ if (arity == 0 && get_irg_start_block(irg) == new_block) {
+ add_irn_dep(new_node, get_irg_frame(irg));
+ }
+
set_ia32_out_req_all(new_node, out_reg_reqs);
set_ia32_in_req_all(new_node, in_reg_reqs);
set_ia32_out_req_all(new_node, out_reg_reqs);
set_ia32_in_req_all(new_node, in_reg_reqs);
@@
-694,6
+695,7
@@
ir_node *gen_CopyB(ir_node *node) {
#ifdef FIRM_GRGEN_BE
case TRANSFORMER_PBQP:
#ifdef FIRM_GRGEN_BE
case TRANSFORMER_PBQP:
+ case TRANSFORMER_RAND:
block = get_nodes_block(node);
new_src = get_CopyB_src(node);
new_dst = get_CopyB_dst(node);
block = get_nodes_block(node);
new_src = get_CopyB_src(node);
new_dst = get_CopyB_dst(node);
@@
-740,6
+742,7
@@
ir_node *gen_Proj_tls(ir_node *node) {
#ifdef FIRM_GRGEN_BE
case TRANSFORMER_PBQP:
#ifdef FIRM_GRGEN_BE
case TRANSFORMER_PBQP:
+ case TRANSFORMER_RAND:
block = get_nodes_block(node);
break;
#endif
block = get_nodes_block(node);
break;
#endif
@@
-843,7
+846,7
@@
const arch_register_req_t *parse_clobber(const char *clobber)
unsigned *limited;
if(reg == NULL) {
unsigned *limited;
if(reg == NULL) {
- panic("Register '%s' mentioned in asm clobber is unknown
\n
", clobber);
+ panic("Register '%s' mentioned in asm clobber is unknown", clobber);
}
assert(reg->index < 32);
}
assert(reg->index < 32);