+ /** mode_D moves instead of 2 integer moves */
+ unsigned use_modeD_moves:1;
+ /** use add esp, 4 instead of pop */
+ unsigned use_add_esp_4:1;
+ /** use add esp, 8 instead of 2 pops */
+ unsigned use_add_esp_8:1;
+ /** use sub esp, 4 instead of push */
+ unsigned use_sub_esp_4:1;
+ /** use sub esp, 8 instead of 2 pushs */
+ unsigned use_sub_esp_8:1;
+ /** use imul mem, imm32 instruction (slow on some CPUs) */
+ unsigned use_imul_mem_imm32:1;
+ /** use pxor instead xorps/xorpd */
+ unsigned use_pxor:1;
+ /** use mov reg, 0 instruction */
+ unsigned use_mov_0:1;
+ /** use cwtl/cltd, which are shorter, to sign extend ax/eax */
+ unsigned use_short_sex_eax:1;
+ /** pad Ret instructions that are destination of conditional jump or directly preceded
+ by other jump instruction. */
+ unsigned use_pad_return:1;
+ /** use the bt instruction */
+ unsigned use_bt:1;
+ /** use fisttp instruction (requires SSE3) */
+ unsigned use_fisttp:1;
+ /** use SSE prefetch instructions */
+ unsigned use_sse_prefetch:1;
+ /** use 3DNow! prefetch instructions */
+ unsigned use_3dnow_prefetch:1;
+ /** use SSE4.2 or SSE4a popcnt instruction */
+ unsigned use_popcnt:1;
+ /** use i486 instructions */
+ unsigned use_bswap:1;