+ return false;
+}
+
+/*--------------------------------------------------------------------------- */
+
+static const arch_env_t *arch_env;
+static ir_graph *irg;
+static be_lv_t *lv;
+static bool problem_found;
+static const ir_node **registers;
+
+static void check_output_constraints(const ir_node *node)
+{
+ if (arch_get_irn_reg_class(node) == NULL)
+ return;
+
+ /* verify output register */
+ const arch_register_req_t *req = arch_get_irn_register_req(node);
+ const arch_register_t *reg = arch_get_irn_register(node);
+ if (reg == NULL) {
+ ir_fprintf(stderr, "Verify warning: Node %+F in block %+F(%s) should have a register assigned\n",
+ node, get_nodes_block(node), get_irg_name(irg));
+ problem_found = true;
+ } else if (!arch_reg_is_allocatable(req, reg)) {
+ ir_fprintf(stderr, "Verify warning: Register %s assigned as output of %+F not allowed (register constraint) in block %+F(%s)\n",
+ reg->name, node, get_nodes_block(node), get_irg_name(irg));
+ problem_found = true;
+ }
+}
+
+static void check_input_constraints(ir_node *node)
+{
+ /* verify input register */
+ int arity = get_irn_arity(node);
+ for (int i = 0; i < arity; ++i) {
+ ir_node *pred = get_irn_n(node, i);
+ if (is_Bad(pred)) {
+ ir_fprintf(stderr, "Verify warning: %+F in block %+F(%s) has Bad as input %d\n",
+ node, get_nodes_block(node), get_irg_name(irg), i);
+ problem_found = 1;
+ continue;
+ }
+
+ const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
+ if (req->cls == NULL)
+ continue;
+
+ const arch_register_req_t *pred_req = arch_get_irn_register_req(pred);
+ if (req->width > pred_req->width) {
+ ir_fprintf(stderr, "Verify warning: %+F in block %+F(%s) register width of value at input %d too small\n",
+ node, get_nodes_block(node), get_irg_name(irg), i);
+ problem_found = 1;
+ }
+
+ const arch_register_t *reg = arch_get_irn_register(pred);
+ if (reg == NULL) {
+ ir_fprintf(stderr, "Verify warning: Node %+F in block %+F(%s) should have a register assigned (%+F input constraint)\n",
+ pred, get_nodes_block(pred), get_irg_name(irg), node);
+ problem_found = 1;
+ continue;
+ } else if (!arch_reg_is_allocatable(req, reg)) {
+ ir_fprintf(stderr, "Verify warning: Register %s as input %d of %+F not allowed (register constraint) in block %+F(%s)\n",
+ reg->name, i, node, get_nodes_block(node), get_irg_name(irg));
+ problem_found = 1;
+ }
+ }
+
+ /* phis should be NOPs at this point, which means all input regs
+ * must be the same as the output reg */
+ if (is_Phi(node)) {
+ const arch_register_t *reg = arch_get_irn_register(node);
+
+ int arity = get_irn_arity(node);
+ for (int i = 0; i < arity; ++i) {
+ ir_node *pred = get_Phi_pred(node, i);
+ const arch_register_t *pred_reg = arch_get_irn_register(pred);
+
+ if (reg != pred_reg && !(pred_reg->type & arch_register_type_virtual)) {
+ const char *pred_name = pred_reg != NULL ? pred_reg->name : "(null)";
+ const char *reg_name = reg != NULL ? reg->name : "(null)";
+ ir_fprintf(stderr, "Verify warning: Input %d of %+F in block %+F(%s) uses register %s instead of %s\n",
+ i, node, get_nodes_block(node),
+ get_irg_name(irg), pred_name, reg_name);
+ problem_found = true;
+ }
+ }
+ }
+}
+
+static void value_used(const ir_node *block, const ir_node *node)
+{
+ const arch_register_t *reg = arch_get_irn_register(node);
+ if (reg == NULL || reg->type & arch_register_type_virtual)
+ return;
+
+ const arch_register_req_t *req = arch_get_irn_register_req(node);
+ assert(req->width > 0);
+ unsigned idx = reg->global_index;
+ for (unsigned i = 0; i < req->width; ++i) {
+ const ir_node *reg_node = registers[idx+i];
+ if (reg_node != NULL && reg_node != node) {
+ ir_fprintf(stderr, "Verify warning: Register %s assigned more than once in block %+F(%s) (nodes %+F %+F)\n",
+ reg->name, block, get_irg_name(irg),
+ node, reg_node);
+ problem_found = true;
+ }
+ registers[idx+i] = node;
+ }
+}
+
+static void value_def(const ir_node *node)
+{
+ const arch_register_t *reg = arch_get_irn_register(node);
+
+ if (reg == NULL || reg->type & arch_register_type_virtual)
+ return;
+
+ const arch_register_req_t *req = arch_get_irn_register_req(node);
+ assert(req->width > 0);
+ unsigned idx = reg->global_index;
+ for (unsigned i = 0; i < req->width; ++i) {
+ const ir_node *reg_node = registers[idx+i];
+
+ /* a little cheat, since its so hard to remove all outedges to dead code
+ * in the backend. This particular case should never be a problem. */
+ if (reg_node == NULL && get_irn_n_edges(node) == 0)
+ return;
+
+ if (reg_node != node) {
+ ir_fprintf(stderr, "Verify warning: Node %+F not registered as value for Register %s (but %+F) in block %+F(%s)\n",
+ node, reg->name, reg_node, get_nodes_block(node),
+ get_irg_name(irg));
+ problem_found = true;
+ }
+ registers[idx+i] = NULL;
+ }
+}
+
+static void verify_block_register_allocation(ir_node *block, void *data)
+{
+ (void) data;
+
+ assert(lv->sets_valid && "live sets must be computed");
+
+ unsigned n_regs = arch_env->n_registers;
+ registers = ALLOCANZ(const ir_node*, n_regs);
+
+ be_lv_foreach(lv, block, be_lv_state_end, lv_node) {
+ value_used(block, lv_node);
+ }
+
+ sched_foreach_reverse(block, node) {
+ be_foreach_value(node, value,
+ value_def(value);
+ check_output_constraints(value);
+ );
+
+ check_input_constraints(node);
+
+ /* process uses. (Phi inputs are no real uses) */
+ if (!is_Phi(node)) {
+ int arity = get_irn_arity(node);
+ for (int in = 0; in < arity; ++in) {
+ ir_node *use = get_irn_n(node, in);
+ value_used(block, use);
+ }
+ }
+ }
+
+ be_lv_foreach(lv, block, be_lv_state_in, lv_node) {
+ value_def(lv_node);
+ }
+
+ /* set must be empty now */
+ for (unsigned i = 0; i < n_regs; ++i) {
+ if (registers[i] == NULL)
+ continue;
+
+ ir_fprintf(stderr, "Verify warning: Node %+F not live-in and no def found in block %+F(%s)\n",
+ registers[i], block, get_irg_name(irg));
+ problem_found = true;
+ }
+}
+
+bool be_verify_register_allocation(ir_graph *new_irg)
+{
+ irg = new_irg;
+ arch_env = be_get_irg_arch_env(irg);
+ lv = be_liveness_new(irg);
+ problem_found = false;
+
+ be_liveness_compute_sets(lv);
+ irg_block_walk_graph(irg, verify_block_register_allocation, NULL, NULL);
+ be_liveness_free(lv);
+
+ return !problem_found;
+}
+
+/*--------------------------------------------------------------------------- */
+
+typedef struct lv_walker_t {
+ be_lv_t *lv;
+ void *data;
+} lv_walker_t;
+
+static const char *lv_flags_to_str(unsigned flags)
+{
+ static const char *states[] = {
+ "---",
+ "i--",
+ "-e-",
+ "ie-",
+ "--o",
+ "i-o",
+ "-eo",
+ "ieo"
+ };
+
+ return states[flags & 7];
+}
+
+static void lv_check_walker(ir_node *bl, void *data)
+{
+ lv_walker_t *w = (lv_walker_t*)data;
+ be_lv_t *fresh = (be_lv_t*)w->data;
+
+ be_lv_info_t *curr = ir_nodehashmap_get(be_lv_info_t, &fresh->map, bl);
+ be_lv_info_t *fr = ir_nodehashmap_get(be_lv_info_t, &fresh->map, bl);
+
+ if (!fr && curr && curr[0].head.n_members > 0) {
+ ir_fprintf(stderr, "%+F liveness should be empty but current liveness contains:\n", bl);
+ for (unsigned i = 0; i < curr[0].head.n_members; ++i) {
+ ir_fprintf(stderr, "\t%+F\n", curr[1 + i].node.node);
+ }
+ } else if (curr) {
+ unsigned n_curr = curr[0].head.n_members;
+ unsigned n_fresh = fr[0].head.n_members;
+
+ if (n_curr != n_fresh) {
+ ir_fprintf(stderr, "%+F: liveness set sizes differ. curr %d, correct %d\n", bl, n_curr, n_fresh);
+
+ ir_fprintf(stderr, "current:\n");
+ for (unsigned i = 0; i < n_curr; ++i) {
+ be_lv_info_node_t *n = &curr[1 + i].node;
+ ir_fprintf(stderr, "%+F %u %+F %s\n", bl, i, n->node, lv_flags_to_str(n->flags));
+ }
+
+ ir_fprintf(stderr, "correct:\n");
+ for (unsigned i = 0; i < n_fresh; ++i) {
+ be_lv_info_node_t *n = &fr[1 + i].node;
+ ir_fprintf(stderr, "%+F %u %+F %s\n", bl, i, n->node, lv_flags_to_str(n->flags));
+ }
+ }
+ }
+}
+
+void be_liveness_check(be_lv_t *lv)
+{
+ lv_walker_t w;
+ be_lv_t *fresh = be_liveness_new(lv->irg);
+
+ w.lv = lv;
+ w.data = fresh;
+ irg_block_walk_graph(lv->irg, lv_check_walker, NULL, &w);
+ be_liveness_free(fresh);