+#define is_pinned(irn) (get_irn_link(irn))
+#define get_pinning_block(irn) ((ir_node *)get_irn_link(irn))
+#define pin_irn(irn, lock) (set_irn_link(irn, lock))
+
+/**
+ * Adjusts the register allocation for the (new) phi-operands
+ * and insert duplicates iff necessary.
+ */
+static void set_regs_or_place_dupls_walker(ir_node *bl, void *data)
+{
+ be_chordal_env_t *chordal_env = data;
+ be_lv_t *lv = chordal_env->birg->lv;
+ ir_node *phi;
+
+ /* Consider all phis of this block */
+ for (phi = get_irn_link(bl); phi; phi = get_irn_link(phi)) {
+ ir_node *phi_block = get_nodes_block(phi);
+ const arch_register_t *phi_reg = get_reg(phi);
+ const arch_register_class_t *cls = phi_reg->reg_class;
+ int max;
+ int i;
+
+ assert(is_Phi(phi) && "Can only handle phi-destruction :)");
+
+ /* process all arguments of the phi */
+ for (i = 0, max = get_irn_arity(phi); i < max; ++i) {
+ ir_node *arg = get_irn_n(phi, i);
+ const arch_register_req_t *req = arch_get_register_req_out(arg);
+ const arch_register_t *arg_reg;
+ ir_node *arg_block;
+
+ if (req->type & arch_register_req_type_ignore)
+ continue;
+
+ arg_block = get_Block_cfgpred_block(phi_block, i);
+ arg_reg = get_reg(arg);
+
+ assert(arg_reg && "Register must be set while placing perms");
+
+ DBG((dbg, LEVEL_1, " for %+F(%s) -- %+F(%s)\n", phi, phi_reg->name, arg, arg_reg->name));
+
+ if (be_values_interfere(lv, phi, arg)) {
+ /*
+ Insert a duplicate in arguments block,
+ make it the new phi arg,
+ set its register,
+ insert it into schedule,
+ pin it
+ */
+ ir_node *dupl = be_new_Copy(cls, arg_block, arg);
+
+ /* this is commented out because it will fail in case of unknown float */
+#if 0
+ ir_mode *m_phi = get_irn_mode(phi), *m_dupl = get_irn_mode(dupl);
+
+ /*
+ Conv signed <-> unsigned is killed on ia32
+ check for: (both int OR both float) AND equal mode sizes
+ */
+ assert(((mode_is_int(m_phi) && mode_is_int(m_dupl)) ||
+ (mode_is_float(m_phi) && mode_is_float(m_dupl))) &&
+ (get_mode_size_bits(m_phi) == get_mode_size_bits(m_dupl)));
+#endif /* if 0 */
+
+ set_irn_n(phi, i, dupl);
+ set_reg(dupl, phi_reg);
+ sched_add_after(sched_skip(sched_last(arg_block), 0, sched_skip_cf_predicator, NULL), dupl);
+ pin_irn(dupl, phi_block);
+ be_liveness_introduce(lv, dupl);
+ be_liveness_update(lv, arg);
+ DBG((dbg, LEVEL_1, " they do interfere: insert %+F(%s)\n", dupl, get_reg(dupl)->name));
+ continue; /* with next argument */
+ }
+
+ if (phi_reg == arg_reg) {
+ /* Phi and arg have the same register, so pin and continue */
+ pin_irn(arg, phi_block);
+ DBG((dbg, LEVEL_1, " arg has same reg: pin %+F(%s)\n", arg, get_reg(arg)->name));
+ continue;
+ }
+
+ DBG((dbg, LEVEL_1, " they do not interfere\n"));
+ assert(is_Proj(arg));
+ /*
+ First check if there is an other phi
+ - in the same block
+ - having arg at the current pos in its arg-list
+ - having the same color as arg
+
+ If found, then pin the arg (for that phi)
+ */
+ if (! is_pinned(arg)) {
+ ir_node *other_phi;
+
+ DBG((dbg, LEVEL_1, " searching for phi with same arg having args register\n"));
+
+ for (other_phi = get_irn_link(phi_block); other_phi; other_phi = get_irn_link(other_phi)) {
+
+ assert(is_Phi(other_phi) &&
+ get_nodes_block(phi) == get_nodes_block(other_phi) &&
+ "link fields are screwed up");
+
+ if (get_irn_n(other_phi, i) == arg && get_reg(other_phi) == arg_reg) {
+ DBG((dbg, LEVEL_1, " found %+F(%s)\n", other_phi, get_reg(other_phi)->name));
+ pin_irn(arg, phi_block);
+ break;
+ }
+ }
+ }
+
+ if (is_pinned(arg)) {
+ /*
+ Insert a duplicate of the original value in arguments block,
+ make it the new phi arg,
+ set its register,
+ insert it into schedule,
+ pin it
+ */
+ ir_node *perm = get_Proj_pred(arg);
+ ir_node *dupl = be_new_Copy(cls, arg_block, arg);
+ ir_node *ins;
+
+ /* this is commented out because it will fail in case of unknown float */
+#if 0
+ ir_mode *m_phi = get_irn_mode(phi);
+ ir_mode *m_dupl = get_irn_mode(dupl);
+
+ /*
+ Conv signed <-> unsigned is killed on ia32
+ check for: (both int OR both float) AND equal mode sizes
+ */
+ assert(((mode_is_int(m_phi) && mode_is_int(m_dupl)) ||
+ (mode_is_float(m_phi) && mode_is_float(m_dupl))) &&
+ (get_mode_size_bits(m_phi) == get_mode_size_bits(m_dupl)));
+#endif /* if 0 */
+
+ set_irn_n(phi, i, dupl);
+ set_reg(dupl, phi_reg);
+ /* skip the Perm's Projs and insert the copies behind. */
+ for (ins = sched_next(perm); is_Proj(ins); ins = sched_next(ins));
+ sched_add_before(ins, dupl);
+ pin_irn(dupl, phi_block);
+ be_liveness_introduce(lv, dupl);
+ be_liveness_update(lv, arg);
+ DBG((dbg, LEVEL_1, " arg is pinned: insert %+F(%s)\n", dupl, get_reg(dupl)->name));
+ } else {
+ /*
+ No other phi has the same color (else arg would have been pinned),
+ so just set the register and pin
+ */
+ set_reg(arg, phi_reg);
+ pin_irn(arg, phi_block);
+ DBG((dbg, LEVEL_1, " arg is not pinned: so pin %+F(%s)\n", arg, get_reg(arg)->name));
+ }
+ }
+ }