+ dump(DUMP_RA, irg, "-ra", dump_ir_block_graph_sched);
+ be_do_stat_nodes(irg, "06 Register Allocation");
+
+ /* let the codegenerator prepare the graph for emitter */
+ BE_TIMER_PUSH(t_finish);
+ arch_code_generator_after_ra(birg.cg);
+ BE_TIMER_POP(t_finish);
+
+ /* fix stack offsets */
+ BE_TIMER_PUSH(t_abi);
+ //be_abi_fix_stack_bias(birg.abi);
+ BE_TIMER_POP(t_abi);
+
+ BE_TIMER_PUSH(t_finish);
+ arch_code_generator_finish(birg.cg);
+ BE_TIMER_POP(t_finish);
+
+ /* fix stack offsets */
+ BE_TIMER_PUSH(t_abi);
+ be_abi_fix_stack_nodes(birg.abi, NULL);
+ be_remove_dead_nodes_from_schedule(birg.irg);
+ be_abi_fix_stack_bias(birg.abi);
+ BE_TIMER_POP(t_abi);
+
+ dump(DUMP_FINAL, irg, "-finish", dump_ir_block_graph_sched);
+
+ /* check schedule and register allocation */
+ BE_TIMER_PUSH(t_verify);
+ if (vrfy_option == BE_VRFY_WARN) {
+ //irg_verify(birg.irg, VRFY_ENFORCE_SSA);
+ be_check_dominance(birg.irg);
+ be_verify_schedule(birg.irg);
+ be_verify_register_allocation(env.arch_env, birg.irg);
+ }
+ else if (vrfy_option == BE_VRFY_ASSERT) {
+ //assert(irg_verify(birg.irg, VRFY_ENFORCE_SSA) && "irg verification failed");
+ assert(be_check_dominance(birg.irg) && "Dominance verification failed");
+ assert(be_verify_schedule(birg.irg) && "Schedule verification failed");
+ assert(be_verify_register_allocation(env.arch_env, birg.irg)
+ && "register allocation verification failed");
+ }
+ BE_TIMER_POP(t_verify);
+
+ /* emit assembler code */
+ BE_TIMER_PUSH(t_emit);