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added get_next_ir_opcodes() to allow allocation of cosecutive opcodes
[libfirm]
/
ir
/
be
/
bemain.c
diff --git
a/ir/be/bemain.c
b/ir/be/bemain.c
index
80983c4
..
a0e0e58
100644
(file)
--- a/
ir/be/bemain.c
+++ b/
ir/be/bemain.c
@@
-94,6
+94,7
@@
static const lc_opt_enum_mask_items_t dump_items[] = {
/* register allocators */
static const lc_opt_enum_const_ptr_items_t ra_items[] = {
{ "chordal", &be_ra_chordal_allocator },
/* register allocators */
static const lc_opt_enum_const_ptr_items_t ra_items[] = {
{ "chordal", &be_ra_chordal_allocator },
+ { "external", &be_ra_external_allocator },
{ NULL, NULL }
};
{ NULL, NULL }
};
@@
-132,15
+133,17
@@
void be_opt_register(void)
{
#ifdef WITH_LIBCORE
int i;
{
#ifdef WITH_LIBCORE
int i;
+ lc_opt_entry_t *be_grp_ra;
be_grp_root = lc_opt_get_grp(firm_opt_get_root(), "be");
be_grp_root = lc_opt_get_grp(firm_opt_get_root(), "be");
+ be_grp_ra = lc_opt_get_grp(be_grp_root, "ra");
lc_opt_add_table(be_grp_root, be_main_options);
lc_opt_add_table(be_grp_root, be_main_options);
- /* register
register
allocator options */
+ /* register allocator options */
for(i = 0; ra_items[i].name != NULL; ++i) {
const be_ra_t *ra = ra_items[i].value;
for(i = 0; ra_items[i].name != NULL; ++i) {
const be_ra_t *ra = ra_items[i].value;
- ra->register_options(be_grp_r
oot
);
+ ra->register_options(be_grp_r
a
);
}
/* register isa options */
}
/* register isa options */
@@
-235,7
+238,6
@@
static void be_main_loop(FILE *file_handle)
for(i = 0, n = get_irp_n_irgs(); i < n; ++i) {
ir_graph *irg = get_irp_irg(i);
for(i = 0, n = get_irp_n_irgs(); i < n; ++i) {
ir_graph *irg = get_irp_irg(i);
- arch_code_generator_t *cg;
const arch_code_generator_if_t *cg_if;
DBG((env.dbg, LEVEL_2, "====> IRG: %F\n", irg));
const arch_code_generator_if_t *cg_if;
DBG((env.dbg, LEVEL_2, "====> IRG: %F\n", irg));
@@
-245,14
+247,14
@@
static void be_main_loop(FILE *file_handle)
current_ir_graph = irg;
/* Get the code generator interface. */
current_ir_graph = irg;
/* Get the code generator interface. */
- cg_if = isa->impl->get_code_generator(isa);
+ cg_if = isa->impl->get_code_generator
_if
(isa);
/* get a code generator for this graph. */
/* get a code generator for this graph. */
- cg = cg_if->init(file_handle, irg, env.arch_env);
+
env.
cg = cg_if->init(file_handle, irg, env.arch_env);
/* create the code generator and generate code. */
prepare_graph(&env, irg);
/* create the code generator and generate code. */
prepare_graph(&env, irg);
- arch_code_generator_prepare_graph(cg);
+ arch_code_generator_prepare_graph(
env.
cg);
edges_deactivate(irg);
dead_node_elimination(irg);
edges_deactivate(irg);
dead_node_elimination(irg);
@@
-261,7
+263,7
@@
static void be_main_loop(FILE *file_handle)
dump(DUMP_PREPARED, irg, "-prepared", dump_ir_block_graph);
/* Schedule the graphs. */
dump(DUMP_PREPARED, irg, "-prepared", dump_ir_block_graph);
/* Schedule the graphs. */
- arch_code_generator_before_sched(cg);
+ arch_code_generator_before_sched(
env.
cg);
list_sched(isa, irg);
dump(DUMP_SCHED, irg, "-sched", dump_ir_block_graph_sched);
list_sched(isa, irg);
dump(DUMP_SCHED, irg, "-sched", dump_ir_block_graph_sched);
@@
-270,12
+272,12
@@
static void be_main_loop(FILE *file_handle)
sched_verify_irg(irg);
/* Do register allocation */
sched_verify_irg(irg);
/* Do register allocation */
- arch_code_generator_before_ra(cg);
+ arch_code_generator_before_ra(
env.
cg);
ra->allocate(&env, irg);
dump(DUMP_RA, irg, "-ra", dump_ir_block_graph_sched);
ra->allocate(&env, irg);
dump(DUMP_RA, irg, "-ra", dump_ir_block_graph_sched);
- arch_code_generator_done(cg);
+ arch_code_generator_done(
env.
cg);
dump(DUMP_FINAL, irg, "-end", dump_ir_block_graph_sched);
}
dump(DUMP_FINAL, irg, "-end", dump_ir_block_graph_sched);
}