+/**
+ * In case there is no phase information for irn, initialize it.
+ */
+static co_mst_irn_t *co_mst_irn_init(co_mst_env_t *env, const ir_node *irn)
+{
+ co_mst_irn_t *res = OALLOC(&env->obst, co_mst_irn_t);
+
+ const arch_register_req_t *req;
+ neighbours_iter_t nodes_it;
+ ir_node *neigh;
+ unsigned len;
+
+ res->irn = irn;
+ res->chunk = NULL;
+ res->fixed = 0;
+ res->tmp_col = -1;
+ res->int_neighs = NULL;
+ res->int_aff_neigh = 0;
+ res->col = arch_register_get_index(arch_get_irn_register(irn));
+ res->init_col = res->col;
+ INIT_LIST_HEAD(&res->list);
+
+ DB((dbg, LEVEL_4, "Creating phase info for %+F\n", irn));
+
+ /* set admissible registers */
+ res->adm_colors = bitset_obstack_alloc(&env->obst, env->n_regs);
+
+ /* Exclude colors not assignable to the irn */
+ req = arch_get_irn_register_req(irn);
+ if (arch_register_req_is(req, limited)) {
+ rbitset_copy_to_bitset(req->limited, res->adm_colors);
+ } else {
+ bitset_set_all(res->adm_colors);
+ }
+
+ /* exclude global ignore registers as well */
+ bitset_and(res->adm_colors, env->allocatable_regs);
+
+ /* compute the constraint factor */
+ res->constr_factor = (real_t) (1 + env->n_regs - bitset_popcount(res->adm_colors)) / env->n_regs;
+
+ /* set the number of interfering affinity neighbours to -1, they are calculated later */
+ res->int_aff_neigh = -1;
+
+ /* build list of interfering neighbours */
+ len = 0;
+ be_ifg_foreach_neighbour(env->ifg, &nodes_it, irn, neigh) {
+ if (!arch_irn_is_ignore(neigh)) {
+ obstack_ptr_grow(&env->obst, neigh);
+ ++len;
+ }
+ }
+ res->int_neighs = (ir_node**)obstack_finish(&env->obst);
+ res->n_neighs = len;
+ return res;
+}
+
+static co_mst_irn_t *get_co_mst_irn(co_mst_env_t *env, const ir_node *node)
+{
+ co_mst_irn_t *res = (co_mst_irn_t*)ir_nodemap_get(&env->map, node);
+ if (res == NULL) {
+ res = co_mst_irn_init(env, node);
+ ir_nodemap_insert(&env->map, node, res);
+ }
+ return res;
+}