- for(irn = pset_first(leftover); irn; irn = pset_next(leftover)) {
- const arch_register_t *reg;
- ir_node *precol;
- int colored = 0;
-
- for(precol = pset_first(pre_colored); precol; precol = pset_next(pre_colored)) {
- arch_register_t *pre_col_reg = arch_get_irn_register(arch_env, precol);
-
- if(!values_interfere(irn, precol)) {
- reg = arch_get_irn_register(arch_env, precol);
- pset_break(pre_colored);
- pset_remove_ptr(pre_colored, precol);
- DBG((dbg, LEVEL_2, "non-interfering %+F setting to %s\n", irn, reg->name));
- colored = 1;
- break;
+ /*
+ Perms inserted before the constraint handling phase are considered to be
+ correctly precolored. These Perms arise during the ABI handling phase.
+ */
+ if(insn->has_constraints) {
+ const arch_env_t *aenv = env->birg->main_env->arch_env;
+ int n_regs = env->cls->n_regs;
+ bitset_t *bs = bitset_alloca(n_regs);
+ ir_node **alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0]));
+ hungarian_problem_t *bp= hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT);
+// bipartite_t *bp = bipartite_new(n_regs, n_regs);
+ int *assignment = alloca(n_regs * sizeof(assignment[0]));
+ pmap *partners = pmap_create();
+ DEBUG_ONLY(firm_dbg_module_t *dbg = alloc_env->constr_dbg;)
+
+ int i, n_alloc;
+ long col;
+ const ir_edge_t *edge;
+ ir_node *perm = NULL;
+ int match_res, cost;
+
+ /*
+ prepare the constraint handling of this node.
+ Perms are constructed and Copies are created for constrained values
+ interfering with the instruction.
+ */
+ perm = pre_process_constraints(alloc_env, &insn);
+
+ /* find suitable in operands to the out operands of the node. */
+ pair_up_operands(alloc_env, insn);
+
+ /*
+ look at the in/out operands and add each operand (and its possible partner)
+ to a bipartite graph (left: nodes with partners, right: admissible colors).
+ */
+ for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
+ be_operand_t *op = &insn->ops[i];
+
+ /*
+ If the operand has no partner or the partner has not been marked
+ for allocation, determine the admissible registers and mark it
+ for allocation by associating the node and its partner with the
+ set of admissible registers via a bipartite graph.
+ */
+ if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
+
+ pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL);
+ alloc_nodes[n_alloc] = op->carrier;
+
+ DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, op->partner ? op->partner->carrier : NULL));
+
+ bitset_clear_all(bs);
+ get_decisive_partner_regs(bs, op, op->partner);
+
+ DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs));
+
+ bitset_foreach(bs, col)
+ hungarian_add(bp, n_alloc, col, 1);
+// bipartite_add(bp, n_alloc, col);
+
+ n_alloc++;
+ }
+ }
+
+ /*
+ Put all nodes which live through the constrained instruction also to the
+ allocation bipartite graph. They are considered unconstrained.
+ */
+ if(perm) {
+ foreach_out_edge(perm, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+
+ assert(is_Proj(proj));
+
+ if(values_interfere(lv, proj, irn) && !pmap_contains(partners, proj)) {
+ assert(n_alloc < n_regs);
+ alloc_nodes[n_alloc] = proj;
+ pmap_insert(partners, proj, NULL);
+
+ bitset_clear_all(bs);
+ arch_put_non_ignore_regs(aenv, env->cls, bs);
+ bitset_andnot(bs, env->ignore_colors);
+ bitset_foreach(bs, col)
+ hungarian_add(bp, n_alloc, col, 1);
+// bipartite_add(bp, n_alloc, col);
+
+ n_alloc++;
+ }