+ if (req == NULL || req->type == arch_register_req_type_none) {
+ fprintf(F, "n/a");
+ return;
+ }
+
+ fprintf(F, "%s", req->cls->name);
+
+ if (arch_register_req_is(req, limited)) {
+ unsigned n_regs = req->cls->n_regs;
+ unsigned i;
+
+ fprintf(F, " limited to");
+ for (i = 0; i < n_regs; ++i) {
+ if (rbitset_is_set(req->limited, i)) {
+ const arch_register_t *reg = &req->cls->regs[i];
+ fprintf(F, " %s", reg->name);
+ }
+ }
+ }
+
+ if (arch_register_req_is(req, should_be_same)) {
+ const unsigned other = req->other_same;
+ int i;
+
+ fprintf(F, " same as");
+ for (i = 0; 1U << i <= other; ++i) {
+ if (other & (1U << i)) {
+ ir_fprintf(F, " #%d (%+F)", i, get_irn_n(skip_Proj_const(node), i));
+ }
+ }
+ }
+
+ if (arch_register_req_is(req, must_be_different)) {
+ const unsigned other = req->other_different;
+ int i;
+
+ fprintf(F, " different from");
+ for (i = 0; 1U << i <= other; ++i) {
+ if (other & (1U << i)) {
+ ir_fprintf(F, " #%d (%+F)", i, get_irn_n(skip_Proj_const(node), i));
+ }
+ }
+ }
+
+ if (req->width != 1) {
+ fprintf(F, " width:%d", req->width);
+ }
+ if (arch_register_req_is(req, aligned)) {
+ fprintf(F, " aligned");
+ }
+ if (arch_register_req_is(req, ignore)) {
+ fprintf(F, " ignore");
+ }
+ if (arch_register_req_is(req, produces_sp)) {
+ fprintf(F, " produces_sp");
+ }
+}
+
+void arch_dump_reqs_and_registers(FILE *F, const ir_node *node)
+{
+ backend_info_t *const info = be_get_info(node);
+ int const n_ins = get_irn_arity(node);
+ /* don't fail on invalid graphs */
+ if (!info || (!info->in_reqs && n_ins != 0) || !info->out_infos) {
+ fprintf(F, "invalid register requirements!!!\n");
+ return;
+ }
+
+ for (int i = 0; i < n_ins; ++i) {
+ const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
+ fprintf(F, "inreq #%d = ", i);
+ arch_dump_register_req(F, req, node);
+ fputs("\n", F);
+ }
+ be_foreach_out(node, o) {
+ const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
+ fprintf(F, "outreq #%u = ", o);
+ arch_dump_register_req(F, req, node);
+ const arch_register_t *reg = arch_get_irn_register_out(node, o);
+ fprintf(F, " [%s]\n", reg != NULL ? reg->name : "n/a");
+ }
+
+ fprintf(F, "flags =");
+ arch_irn_flags_t flags = arch_get_irn_flags(node);
+ if (flags == arch_irn_flags_none) {
+ fprintf(F, " none");
+ } else {
+ if (flags & arch_irn_flags_dont_spill) {
+ fprintf(F, " unspillable");
+ }
+ if (flags & arch_irn_flags_rematerializable) {
+ fprintf(F, " remat");
+ }
+ if (flags & arch_irn_flags_modify_flags) {
+ fprintf(F, " modify_flags");
+ }
+ if (flags & arch_irn_flags_simple_jump) {
+ fprintf(F, " simple_jump");
+ }
+ if (flags & arch_irn_flags_not_scheduled) {
+ fprintf(F, " not_scheduled");
+ }
+ }
+ fprintf(F, " (0x%x)\n", (unsigned)flags);