int timing; /**< time the backend phases */
int opt_profile; /**< instrument code for profiling */
int omit_fp; /**< try to omit the frame pointer */
int timing; /**< time the backend phases */
int opt_profile; /**< instrument code for profiling */
int omit_fp; /**< try to omit the frame pointer */
char ilp_server[128]; /**< the ilp server name */
char ilp_solver[128]; /**< the ilp solver name */
int statev; /**< enable stat event dumping */
char ilp_server[128]; /**< the ilp server name */
char ilp_solver[128]; /**< the ilp solver name */
int statev; /**< enable stat event dumping */
- arch_irn_handler_t *phi_handler;
- dbg_handle *db_handle;
- const char *cup_name;
+ const char *cup_name; /**< name of the compilation unit */
+ pmap *ent_trampoline_map; /**< A map containing PIC trampolines for methods. */
+ ir_type *pic_trampolines_type; /**< Class type containing all trampolines */
+ pmap *ent_pic_symbol_map;
+ ir_type *pic_symbols_type;
-* Put the registers to be ignored in this IRG into a bitset.
-* @param birg The backend IRG data structure.
-* @param cls The register class.
-* @param bs The bitset (may be NULL).
-* @return The number of registers to be ignored.
-*/
+ * Put the registers to be ignored in this IRG into a bitset.
+ * @param birg The backend IRG data structure.
+ * @param cls The register class.
+ * @param bs The bitset (may be NULL).
+ * @return The number of registers to be ignored.
+ */
unsigned be_put_ignore_regs(const be_irg_t *birg,
const arch_register_class_t *cls, bitset_t *bs);
unsigned be_put_ignore_regs(const be_irg_t *birg,
const arch_register_class_t *cls, bitset_t *bs);
-extern lc_timer_t *t_abi;
-extern lc_timer_t *t_codegen;
-extern lc_timer_t *t_sched;
-extern lc_timer_t *t_constr;
-extern lc_timer_t *t_finish;
-extern lc_timer_t *t_emit;
-extern lc_timer_t *t_other;
-extern lc_timer_t *t_execfreq;
-extern lc_timer_t *t_verify;
-extern lc_timer_t *t_heights;
-extern lc_timer_t *t_live; /**< timer for liveness calculation */
-extern lc_timer_t *t_ssa_constr; /**< timer for ssa reconstruction */
-extern lc_timer_t *t_ra_prolog; /**< timer for prolog */
-extern lc_timer_t *t_ra_epilog; /**< timer for epilog */
-extern lc_timer_t *t_ra_constr; /**< timer for spill constraints */
-extern lc_timer_t *t_ra_spill; /**< timer for spilling */
-extern lc_timer_t *t_ra_spill_apply;
-extern lc_timer_t *t_ra_color; /**< timer for graph coloring */
-extern lc_timer_t *t_ra_ifg; /**< timer for building interference graph */
-extern lc_timer_t *t_ra_copymin; /**< timer for copy minimization */
-extern lc_timer_t *t_ra_ssa; /**< timer for ssa destruction */
-extern lc_timer_t *t_ra_other; /**< timer for remaining stuff */
+extern ir_timer_t *t_abi;
+extern ir_timer_t *t_codegen;
+extern ir_timer_t *t_sched;
+extern ir_timer_t *t_constr;
+extern ir_timer_t *t_finish;
+extern ir_timer_t *t_emit;
+extern ir_timer_t *t_other;
+extern ir_timer_t *t_execfreq;
+extern ir_timer_t *t_verify;
+extern ir_timer_t *t_heights;
+extern ir_timer_t *t_live; /**< timer for liveness calculation */
+extern ir_timer_t *t_ssa_constr; /**< timer for ssa reconstruction */
+extern ir_timer_t *t_ra_prolog; /**< timer for prolog */
+extern ir_timer_t *t_ra_epilog; /**< timer for epilog */
+extern ir_timer_t *t_ra_constr; /**< timer for spill constraints */
+extern ir_timer_t *t_ra_spill; /**< timer for spilling */
+extern ir_timer_t *t_ra_spill_apply;
+extern ir_timer_t *t_ra_color; /**< timer for graph coloring */
+extern ir_timer_t *t_ra_ifg; /**< timer for building interference graph */
+extern ir_timer_t *t_ra_copymin; /**< timer for copy minimization */
+extern ir_timer_t *t_ra_ssa; /**< timer for ssa destruction */
+extern ir_timer_t *t_ra_other; /**< timer for remaining stuff */
+