- arm_abi_env_t *env = xmalloc(sizeof(env[0]));
- be_abi_call_flags_t fl = be_abi_call_get_flags(call);
- env->flags = fl.bits;
- env->irg = irg;
- env->arch_env = arch_env;
- return env;
-}
-
-/**
- * Put all registers which are saved by the prologue/epilogue in a set.
- *
- * @param self The callback object.
- * @param s The result set.
- */
-static void arm_abi_dont_save_regs(void *self, pset *s)
-{
- arm_abi_env_t *env = self;
- if (env->flags.try_omit_fp)
- pset_insert_ptr(s, env->arch_env->bp);
-}
-
-/**
- * Generate the routine prologue.
- *
- * @param self The callback object.
- * @param mem A pointer to the mem node. Update this if you define new memory.
- * @param reg_map A map mapping all callee_save/ignore/parameter registers to their defining nodes.
- * @param stack_bias Points to the current stack bias, can be modified if needed.
- *
- * @return The register which shall be used as a stack frame base.
- *
- * All nodes which define registers in @p reg_map must keep @p reg_map current.
- */
-static const arch_register_t *arm_abi_prologue(void *self, ir_node **mem, pmap *reg_map, int *stack_bias) {
- arm_abi_env_t *env = self;
- ir_node *keep, *store;
- ir_graph *irg;
- ir_node *block;
- arch_register_class_t *gp;
-
- ir_node *fp, *ip, *lr, *pc;
- ir_node *sp = be_abi_reg_map_get(reg_map, env->arch_env->sp);
-
- (void) stack_bias;
-
- if (env->flags.try_omit_fp)
- return env->arch_env->sp;
-
- fp = be_abi_reg_map_get(reg_map, env->arch_env->bp);
- ip = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_R12]);
- lr = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_LR]);
- pc = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_PC]);
-
- gp = &arm_reg_classes[CLASS_arm_gp];
- irg = env->irg;
- block = get_irg_start_block(irg);
-
- ip = be_new_Copy(gp, irg, block, sp);
- arch_set_irn_register(env->arch_env, ip, &arm_gp_regs[REG_R12]);
- be_set_constr_single_reg(ip, BE_OUT_POS(0), &arm_gp_regs[REG_R12] );
-
- store = new_rd_arm_StoreStackM4Inc(NULL, irg, block, sp, fp, ip, lr, pc, *mem);
-
- sp = new_r_Proj(irg, block, store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
- arch_set_irn_register(env->arch_env, sp, env->arch_env->sp);
- *mem = new_r_Proj(irg, block, store, mode_M, pn_arm_StoreStackM4Inc_M);
-
- keep = be_new_CopyKeep_single(gp, irg, block, ip, sp, get_irn_mode(ip));
- be_node_set_reg_class(keep, 1, gp);
- arch_set_irn_register(env->arch_env, keep, &arm_gp_regs[REG_R12]);
- be_set_constr_single_reg(keep, BE_OUT_POS(0), &arm_gp_regs[REG_R12] );
-
- fp = new_rd_arm_Sub_i(NULL, irg, block, keep, get_irn_mode(fp), 4);
- arch_set_irn_register(env->arch_env, fp, env->arch_env->bp);
- fp = be_new_Copy(gp, irg, block, fp); // XXX Gammelfix: only be_ nodes can have the ignore flag set
- arch_set_irn_register(env->arch_env, fp, env->arch_env->bp);
- be_node_set_flags(fp, BE_OUT_POS(0), arch_irn_flags_ignore);
-
- be_abi_reg_map_set(reg_map, env->arch_env->bp, fp);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_R12], keep);
- be_abi_reg_map_set(reg_map, env->arch_env->sp, sp);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_LR], lr);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_PC], pc);
-
- return env->arch_env->bp;
-}
-
-/**
- * Builds the ARM epilogue
- */
-static void arm_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map) {
- arm_abi_env_t *env = self;
- ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->arch_env->sp);
- ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->arch_env->bp);
- ir_node *curr_pc = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_PC]);
- ir_node *curr_lr = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_LR]);
-
- // TODO: Activate Omit fp in epilogue
- if (env->flags.try_omit_fp) {
- curr_sp = be_new_IncSP(env->arch_env->sp, env->irg, bl, curr_sp, BE_STACK_FRAME_SIZE_SHRINK, 0);
- add_irn_dep(curr_sp, *mem);
-
- curr_lr = be_new_CopyKeep_single(&arm_reg_classes[CLASS_arm_gp], env->irg, bl, curr_lr, curr_sp, get_irn_mode(curr_lr));
- be_node_set_reg_class(curr_lr, 1, &arm_reg_classes[CLASS_arm_gp]);
- arch_set_irn_register(env->arch_env, curr_lr, &arm_gp_regs[REG_LR]);
- be_set_constr_single_reg(curr_lr, BE_OUT_POS(0), &arm_gp_regs[REG_LR] );
-
- curr_pc = be_new_Copy(&arm_reg_classes[CLASS_arm_gp], env->irg, bl, curr_lr );
- arch_set_irn_register(env->arch_env, curr_pc, &arm_gp_regs[REG_PC]);
- be_set_constr_single_reg(curr_pc, BE_OUT_POS(0), &arm_gp_regs[REG_PC] );
- be_node_set_flags(curr_pc, BE_OUT_POS(0), arch_irn_flags_ignore);
- } else {
- ir_node *sub12_node;
- ir_node *load_node;
- sub12_node = new_rd_arm_Sub_i(NULL, env->irg, bl, curr_bp, mode_Iu, 12);
- // FIXME
- //set_arm_req_out_all(sub12_node, sub12_req);
- arch_set_irn_register(env->arch_env, sub12_node, env->arch_env->sp);
- load_node = new_rd_arm_LoadStackM3( NULL, env->irg, bl, sub12_node, *mem );
- // FIXME
- //set_arm_req_out(load_node, &arm_default_req_arm_gp_r11, 0);
- //set_arm_req_out(load_node, &arm_default_req_arm_gp_sp, 1);
- //set_arm_req_out(load_node, &arm_default_req_arm_gp_pc, 2);
- curr_bp = new_r_Proj(env->irg, bl, load_node, env->arch_env->bp->reg_class->mode, pn_arm_LoadStackM3_res0);
- curr_sp = new_r_Proj(env->irg, bl, load_node, env->arch_env->sp->reg_class->mode, pn_arm_LoadStackM3_res1);
- curr_pc = new_r_Proj(env->irg, bl, load_node, mode_Iu, pn_arm_LoadStackM3_res2);
- *mem = new_r_Proj(env->irg, bl, load_node, mode_M, pn_arm_LoadStackM3_M);
- arch_set_irn_register(env->arch_env, curr_bp, env->arch_env->bp);
- arch_set_irn_register(env->arch_env, curr_sp, env->arch_env->sp);
- arch_set_irn_register(env->arch_env, curr_pc, &arm_gp_regs[REG_PC]);
- }
- be_abi_reg_map_set(reg_map, env->arch_env->sp, curr_sp);
- be_abi_reg_map_set(reg_map, env->arch_env->bp, curr_bp);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_LR], curr_lr);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_PC], curr_pc);
-}
-
-static const be_abi_callbacks_t arm_abi_callbacks = {
- arm_abi_init,
- free,
- arm_get_between_type,
- arm_abi_dont_save_regs,
- arm_abi_prologue,
- arm_abi_epilogue,
-};
-
-
-/**
- * Get the ABI restrictions for procedure calls.
- * @param self The this pointer.
- * @param method_type The type of the method (procedure) in question.
- * @param abi The abi object to be modified
- */
-void arm_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) {
- ir_type *tp;
- ir_mode *mode;
- int i;
- int n = get_method_n_params(method_type);
- be_abi_call_flags_t call_flags = be_abi_call_get_flags(abi);
- (void) self;
-
- /* set abi flags for calls */
- call_flags.bits.left_to_right = 0;
- call_flags.bits.store_args_sequential = 0;
- /* call_flags.bits.try_omit_fp don't change this we can handle both */
- call_flags.bits.fp_free = 0;
- call_flags.bits.call_has_imm = 1; /* IA32 calls can have immediate address */
-
- /* set stack parameter passing style */
- be_abi_call_set_flags(abi, call_flags, &arm_abi_callbacks);
-
- for (i = 0; i < n; i++) {
- /* reg = get reg for param i; */
- /* be_abi_call_param_reg(abi, i, reg); */
- if (i < 4) {
- be_abi_call_param_reg(abi, i, arm_get_RegParam_reg(i));
- } else {
- tp = get_method_param_type(method_type, i);
- mode = get_type_mode(tp);
- be_abi_call_param_stack(abi, i, mode, 4, 0, 0);
- }
- }
-
- /* set return registers */
- n = get_method_n_ress(method_type);
-
- assert(n <= 2 && "more than two results not supported");
-
- /* In case of 64bit returns, we will have two 32bit values */
- if (n == 2) {
- tp = get_method_res_type(method_type, 0);
- mode = get_type_mode(tp);
-
- assert(!mode_is_float(mode) && "two FP results not supported");
-
- tp = get_method_res_type(method_type, 1);
- mode = get_type_mode(tp);
-
- assert(!mode_is_float(mode) && "mixed INT, FP results not supported");
-
- be_abi_call_res_reg(abi, 0, &arm_gp_regs[REG_R0]);
- be_abi_call_res_reg(abi, 1, &arm_gp_regs[REG_R1]);
- } else if (n == 1) {
- const arch_register_t *reg;
-
- tp = get_method_res_type(method_type, 0);
- assert(is_atomic_type(tp));
- mode = get_type_mode(tp);
-
- reg = mode_is_float(mode) ? &arm_fpa_regs[REG_F0] : &arm_gp_regs[REG_R0];
- be_abi_call_res_reg(abi, 0, reg);
- }
-}
-
-int arm_to_appear_in_schedule(void *block_env, const ir_node *irn) {