- arm_abi_env_t *env = self;
- ir_node *store;
- ir_graph *irg;
- ir_node *block;
- arch_register_class_t *gp;
-
- ir_node *fp, *ip, *lr, *pc;
- ir_node *sp = be_abi_reg_map_get(reg_map, env->arch_env->sp);
-
- (void) stack_bias;
-
- if (env->flags.try_omit_fp)
- return env->arch_env->sp;
-
- fp = be_abi_reg_map_get(reg_map, env->arch_env->bp);
- ip = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_R12]);
- lr = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_LR]);
- pc = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_PC]);
-
- gp = &arm_reg_classes[CLASS_arm_gp];
- irg = env->irg;
- block = get_irg_start_block(irg);
-
- /* mark bp register as ignore */
- be_set_constr_single_reg_out(get_Proj_pred(fp),
- get_Proj_proj(fp), env->arch_env->bp,
- arch_register_req_type_ignore);
-
- /* copy SP to IP (so we can spill it */
- ip = be_new_Copy(gp, block, sp);
- be_set_constr_single_reg_out(ip, 0, &arm_gp_regs[REG_R12], 0);
-
- /* spill stuff */
- store = new_bd_arm_StoreStackM4Inc(NULL, block, sp, fp, ip, lr, pc, *mem);
-
- sp = new_r_Proj(store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
- arch_set_irn_register(sp, env->arch_env->sp);
- *mem = new_r_Proj(store, mode_M, pn_arm_StoreStackM4Inc_M);
-
- /* frame pointer is ip-4 (because ip is our old sp value) */
- fp = new_bd_arm_Sub_imm(NULL, block, ip, 4, 0);
- arch_set_irn_register(fp, env->arch_env->bp);
-
- /* beware: we change the fp but the StoreStackM4Inc above wants the old
- * fp value. We are not allowed to spill or anything in the prolog, so we
- * have to enforce some order here. (scheduler/regalloc are too stupid
- * to extract this order from register requirements) */
- add_irn_dep(fp, store);
-
- fp = be_new_Copy(gp, block, fp); // XXX Gammelfix: only be_ have custom register requirements
- be_set_constr_single_reg_out(fp, 0, env->arch_env->bp,
- arch_register_req_type_ignore);
- arch_set_irn_register(fp, env->arch_env->bp);
-
- be_abi_reg_map_set(reg_map, env->arch_env->bp, fp);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_R12], ip);
- be_abi_reg_map_set(reg_map, env->arch_env->sp, sp);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_LR], lr);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_PC], pc);
-
- return env->arch_env->bp;
-}
-
-/**
- * Builds the ARM epilogue
- */
-static void arm_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map)
-{
- arm_abi_env_t *env = self;
- ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->arch_env->sp);
- ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->arch_env->bp);
- ir_node *curr_pc = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_PC]);
- ir_node *curr_lr = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_LR]);
-
- // TODO: Activate Omit fp in epilogue
- if (env->flags.try_omit_fp) {
- ir_node *incsp = be_new_IncSP(env->arch_env->sp, bl, curr_sp, BE_STACK_FRAME_SIZE_SHRINK, 0);
- curr_sp = incsp;
- } else {
- ir_node *load_node;
-
- load_node = new_bd_arm_LoadStackM3Epilogue(NULL, bl, curr_bp, *mem);
-
- curr_bp = new_r_Proj(load_node, env->arch_env->bp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res0);
- curr_sp = new_r_Proj(load_node, env->arch_env->sp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res1);
- curr_pc = new_r_Proj(load_node, mode_Iu, pn_arm_LoadStackM3Epilogue_res2);
- *mem = new_r_Proj(load_node, mode_M, pn_arm_LoadStackM3Epilogue_M);
- arch_set_irn_register(curr_bp, env->arch_env->bp);
- arch_set_irn_register(curr_sp, env->arch_env->sp);
- arch_set_irn_register(curr_pc, &arm_gp_regs[REG_PC]);
- }
- be_abi_reg_map_set(reg_map, env->arch_env->sp, curr_sp);
- be_abi_reg_map_set(reg_map, env->arch_env->bp, curr_bp);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_LR], curr_lr);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_PC], curr_pc);