- arm_handle_intrinsics();
-
- be_gas_emit_types = false;
-
- /* needed for the debug support */
- be_gas_emit_switch_section(GAS_SECTION_TEXT);
- be_emit_irprintf("%stext0:\n", be_gas_get_private_prefix());
- be_emit_write_line();
-
- inited = 1;
- return &isa->arch_env;
-}
-
-
-
-/**
- * Closes the output file and frees the ISA structure.
- */
-static void arm_done(void *self)
-{
- arm_isa_t *isa = self;
-
- be_gas_emit_decls(isa->arch_env.main_env);
-
- be_emit_exit();
- free(self);
-}
-
-
-/**
- * Report the number of register classes.
- * If we don't have fp instructions, report only GP
- * here to speed up register allocation (and makes dumps
- * smaller and more readable).
- */
-static unsigned arm_get_n_reg_class(void)
-{
- return N_CLASSES;
-}
-
-/**
- * Return the register class with requested index.
- */
-static const arch_register_class_t *arm_get_reg_class(unsigned i)
-{
- assert(i < N_CLASSES);
- return &arm_reg_classes[i];
-}
-
-/**
- * Get the register class which shall be used to store a value of a given mode.
- * @param self The this pointer.
- * @param mode The mode in question.
- * @return A register class which can hold values of the given mode.
- */
-const arch_register_class_t *arm_get_reg_class_for_mode(const ir_mode *mode)
-{
- if (mode_is_float(mode))
- return &arm_reg_classes[CLASS_arm_fpa];
- else
- return &arm_reg_classes[CLASS_arm_gp];
-}
-
-/**
- * Produces the type which sits between the stack args and the locals on the stack.
- * it will contain the return address and space to store the old base pointer.
- * @return The Firm type modeling the ABI between type.
- */
-static ir_type *arm_get_between_type(void *self)
-{
- static ir_type *between_type = NULL;
- (void) self;
-
- if (between_type == NULL) {
- between_type = new_type_class(new_id_from_str("arm_between_type"));
- set_type_size_bytes(between_type, 0);
- }
-
- return between_type;
-}
-
-
-typedef struct {
- be_abi_call_flags_bits_t flags;
- const arch_env_t *arch_env;
- ir_graph *irg;
-} arm_abi_env_t;
-
-static void *arm_abi_init(const be_abi_call_t *call, const arch_env_t *arch_env, ir_graph *irg)
-{
- arm_abi_env_t *env = XMALLOC(arm_abi_env_t);
- be_abi_call_flags_t fl = be_abi_call_get_flags(call);
- env->flags = fl.bits;
- env->irg = irg;
- env->arch_env = arch_env;
- return env;
-}
-
-/**
- * Generate the routine prologue.
- *
- * @param self The callback object.
- * @param mem A pointer to the mem node. Update this if you define new memory.
- * @param reg_map A map mapping all callee_save/ignore/parameter registers to their defining nodes.
- * @param stack_bias Points to the current stack bias, can be modified if needed.
- *
- * @return The register which shall be used as a stack frame base.
- *
- * All nodes which define registers in @p reg_map must keep @p reg_map current.
- */
-static const arch_register_t *arm_abi_prologue(void *self, ir_node **mem, pmap *reg_map, int *stack_bias)
-{
- arm_abi_env_t *env = self;
- ir_node *store;
- ir_graph *irg;
- ir_node *block;
- arch_register_class_t *gp;
-
- ir_node *fp, *ip, *lr, *pc;
- ir_node *sp = be_abi_reg_map_get(reg_map, env->arch_env->sp);
-
- (void) stack_bias;
-
- if (env->flags.try_omit_fp)
- return env->arch_env->sp;
-
- fp = be_abi_reg_map_get(reg_map, env->arch_env->bp);
- ip = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_R12]);
- lr = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_LR]);
- pc = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_PC]);
-
- gp = &arm_reg_classes[CLASS_arm_gp];
- irg = env->irg;
- block = get_irg_start_block(irg);
-
- /* mark bp register as ignore */
- be_set_constr_single_reg_out(get_Proj_pred(fp),
- get_Proj_proj(fp), env->arch_env->bp,
- arch_register_req_type_ignore);
-
- /* copy SP to IP (so we can spill it */
- ip = be_new_Copy(gp, block, sp);
- be_set_constr_single_reg_out(ip, 0, &arm_gp_regs[REG_R12], 0);
-
- /* spill stuff */
- store = new_bd_arm_StoreStackM4Inc(NULL, block, sp, fp, ip, lr, pc, *mem);
-
- sp = new_r_Proj(block, store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
- arch_set_irn_register(sp, env->arch_env->sp);
- *mem = new_r_Proj(block, store, mode_M, pn_arm_StoreStackM4Inc_M);
-
- /* frame pointer is ip-4 (because ip is our old sp value) */
- fp = new_bd_arm_Sub_imm(NULL, block, ip, 4, 0);
- arch_set_irn_register(fp, env->arch_env->bp);
-
- /* beware: we change the fp but the StoreStackM4Inc above wants the old
- * fp value. We are not allowed to spill or anything in the prolog, so we
- * have to enforce some order here. (scheduler/regalloc are too stupid
- * to extract this order from register requirements) */
- add_irn_dep(fp, store);
-
- fp = be_new_Copy(gp, block, fp); // XXX Gammelfix: only be_ have custom register requirements
- be_set_constr_single_reg_out(fp, 0, env->arch_env->bp,
- arch_register_req_type_ignore);
- arch_set_irn_register(fp, env->arch_env->bp);
-
- be_abi_reg_map_set(reg_map, env->arch_env->bp, fp);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_R12], ip);
- be_abi_reg_map_set(reg_map, env->arch_env->sp, sp);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_LR], lr);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_PC], pc);
-
- return env->arch_env->bp;
-}
-
-/**
- * Builds the ARM epilogue
- */
-static void arm_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map)
-{
- arm_abi_env_t *env = self;
- ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->arch_env->sp);
- ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->arch_env->bp);
- ir_node *curr_pc = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_PC]);
- ir_node *curr_lr = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_LR]);
-
- // TODO: Activate Omit fp in epilogue
- if (env->flags.try_omit_fp) {
- ir_node *incsp = be_new_IncSP(env->arch_env->sp, bl, curr_sp, BE_STACK_FRAME_SIZE_SHRINK, 0);
- curr_sp = incsp;
- } else {
- ir_node *load_node;
-
- load_node = new_bd_arm_LoadStackM3Epilogue(NULL, bl, curr_bp, *mem);
-
- curr_bp = new_r_Proj(bl, load_node, env->arch_env->bp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res0);
- curr_sp = new_r_Proj(bl, load_node, env->arch_env->sp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res1);
- curr_pc = new_r_Proj(bl, load_node, mode_Iu, pn_arm_LoadStackM3Epilogue_res2);
- *mem = new_r_Proj(bl, load_node, mode_M, pn_arm_LoadStackM3Epilogue_M);
- arch_set_irn_register(curr_bp, env->arch_env->bp);
- arch_set_irn_register(curr_sp, env->arch_env->sp);
- arch_set_irn_register(curr_pc, &arm_gp_regs[REG_PC]);
- }
- be_abi_reg_map_set(reg_map, env->arch_env->sp, curr_sp);
- be_abi_reg_map_set(reg_map, env->arch_env->bp, curr_bp);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_LR], curr_lr);
- be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_PC], curr_pc);
-}
-
-static const be_abi_callbacks_t arm_abi_callbacks = {
- arm_abi_init,
- free,
- arm_get_between_type,
- arm_abi_prologue,
- arm_abi_epilogue,
-};
-
-
-/**
- * Get the ABI restrictions for procedure calls.
- * @param self The this pointer.
- * @param method_type The type of the method (procedure) in question.
- * @param abi The abi object to be modified
- */
-void arm_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi)
-{
- ir_type *tp;
- ir_mode *mode;
- int i;
- int n = get_method_n_params(method_type);
- be_abi_call_flags_t call_flags = be_abi_call_get_flags(abi);
- (void) self;
-
- /* set abi flags for calls */
- call_flags.bits.left_to_right = 0;
- call_flags.bits.store_args_sequential = 0;
- /* call_flags.bits.try_omit_fp don't change this we can handle both */
- call_flags.bits.fp_free = 0;
- call_flags.bits.call_has_imm = 1; /* IA32 calls can have immediate address */
-
- /* set stack parameter passing style */
- be_abi_call_set_flags(abi, call_flags, &arm_abi_callbacks);
-
- for (i = 0; i < n; i++) {
- /* reg = get reg for param i; */
- /* be_abi_call_param_reg(abi, i, reg); */
- if (i < 4) {
- be_abi_call_param_reg(abi, i, arm_get_RegParam_reg(i));
- } else {
- tp = get_method_param_type(method_type, i);
- mode = get_type_mode(tp);
- be_abi_call_param_stack(abi, i, mode, 4, 0, 0);
- }
- }
-
- /* set return registers */
- n = get_method_n_ress(method_type);
-
- assert(n <= 2 && "more than two results not supported");
-
- /* In case of 64bit returns, we will have two 32bit values */
- if (n == 2) {
- tp = get_method_res_type(method_type, 0);
- mode = get_type_mode(tp);
-
- assert(!mode_is_float(mode) && "two FP results not supported");
-
- tp = get_method_res_type(method_type, 1);
- mode = get_type_mode(tp);
-
- assert(!mode_is_float(mode) && "mixed INT, FP results not supported");
-
- be_abi_call_res_reg(abi, 0, &arm_gp_regs[REG_R0]);
- be_abi_call_res_reg(abi, 1, &arm_gp_regs[REG_R1]);
- } else if (n == 1) {
- const arch_register_t *reg;
-
- tp = get_method_res_type(method_type, 0);
- assert(is_atomic_type(tp));
- mode = get_type_mode(tp);
-
- reg = mode_is_float(mode) ? &arm_fpa_regs[REG_F0] : &arm_gp_regs[REG_R0];
- be_abi_call_res_reg(abi, 0, reg);
- }