+ if (env->flags.try_omit_fp)
+ return env->arch_env->sp;
+
+ fp = be_abi_reg_map_get(reg_map, env->arch_env->bp);
+ ip = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_R12]);
+ lr = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_LR]);
+ pc = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_PC]);
+
+ gp = &arm_reg_classes[CLASS_arm_gp];
+ irg = env->irg;
+ block = get_irg_start_block(irg);
+
+ /* mark bp register as ignore */
+ be_set_constr_single_reg_out(get_Proj_pred(fp),
+ get_Proj_proj(fp), env->arch_env->bp,
+ arch_register_req_type_ignore);
+
+ /* copy SP to IP (so we can spill it */
+ ip = be_new_Copy(gp, block, sp);
+ be_set_constr_single_reg_out(ip, 0, &arm_gp_regs[REG_R12], 0);
+
+ /* spill stuff */
+ store = new_bd_arm_StoreStackM4Inc(NULL, block, sp, fp, ip, lr, pc, *mem);
+
+ sp = new_r_Proj(block, store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
+ arch_set_irn_register(sp, env->arch_env->sp);
+ *mem = new_r_Proj(block, store, mode_M, pn_arm_StoreStackM4Inc_M);
+
+ /* frame pointer is ip-4 (because ip is our old sp value) */
+ fp = new_bd_arm_Sub_i(NULL, block, ip, get_irn_mode(fp), 4);
+ arch_set_irn_register(fp, env->arch_env->bp);
+
+ /* beware: we change the fp but the StoreStackM4Inc above wants the old
+ * fp value. We are not allowed to spill or anything in the prolog, so we
+ * have to enforce some order here. (scheduler/regalloc are too stupid
+ * to extract this order from register requirements) */
+ add_irn_dep(fp, store);
+
+ fp = be_new_Copy(gp, block, fp); // XXX Gammelfix: only be_ have custom register requirements
+ be_set_constr_single_reg_out(fp, 0, env->arch_env->bp,
+ arch_register_req_type_ignore);
+ arch_set_irn_register(fp, env->arch_env->bp);
+
+ be_abi_reg_map_set(reg_map, env->arch_env->bp, fp);
+ be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_R12], ip);
+ be_abi_reg_map_set(reg_map, env->arch_env->sp, sp);