-"Add" => {
- "op_flags" => "C",
- "irn_flags" => "R",
- "comment" => "construct Add: Add(a, b) = Add(b, a) = a + b",
- "attr" => "arm_shift_modifier mod, tarval *shf",
- "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
- "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
- "emit" => '. ADD %D1, %S1, %S2%X0 /* Add(%S1, %S2) -> %D1, (%A1, %A2) */'
-},
-
-"Add_i" => {
- "irn_flags" => "R",
- "comment" => "construct Add: Add(a, const) = Add(const, a) = a + const",
- "attr" => "tarval *tv",
- "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
- "cmp_attr" => 'return attr_a->value != attr_b->value;',
- "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
- "emit" => '. ADD %D1, %S1, %C /* Add(%C, %S1) -> %D1, (%A1, const) */'
-},
-
-"Mul" => {
- #"op_flags" => "C",
- "irn_flags" => "R",
- "comment" => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
- "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "!in_r1" ] },
- "emit" =>'. MUL %D1, %S1, %S2 /* Mul(%S1, %S2) -> %D1, (%A1, %A2) */'
-},
-
-"Mla" => {
- #"op_flags" => "C",
- "irn_flags" => "R",
- "comment" => "construct Mla: Mla(a, b, c) = a * b + c",
- "reg_req" => { "in" => [ "gp", "gp", "gp" ], "out" => [ "!in_r1" ] },
- "emit" =>'. MLA %D1, %S1, %S2, %S3 /* Mla(%S1, %S2, %S3) -> %D1, (%A1, %A2, %A3) */'
-},
-
-"And" => {
- "op_flags" => "C",
- "irn_flags" => "R",
- "comment" => "construct And: And(a, b) = And(b, a) = a AND b",
- "attr" => "arm_shift_modifier mod, tarval *shf",
- "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
- "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
- "emit" => '. AND %D1, %S1, %S2%X0 /* And(%S1, %S2) -> %D1, (%A1, %A2) */'
-},
-
-"And_i" => {
- "irn_flags" => "R",
- "comment" => "construct And: And(a, const) = And(const, a) = a AND const",
- "attr" => "tarval *tv",
- "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
- "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
- "emit" => '. AND %D1, %S1, %C /* And(%C, %S1) -> %D1, (%A1, const) */',
- "cmp_attr" => 'return attr_a->value != attr_b->value;'
-},
-
-"Or" => {
- "op_flags" => "C",
- "irn_flags" => "R",
- "comment" => "construct Or: Or(a, b) = Or(b, a) = a OR b",
- "attr" => "arm_shift_modifier mod, tarval *shf",
- "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
- "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
- "emit" => '. ORR %D1, %S1, %S2%X0 /* Or(%S1, %S2) -> %D1, (%A1, %A2) */'
-},
-
-"Or_i" => {
- "irn_flags" => "R",
- "comment" => "construct Or: Or(a, const) = Or(const, a) = a OR const",
- "attr" => "tarval *tv",
- "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
- "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
- "cmp_attr" => 'return attr_a->value != attr_b->value;',
- "emit" => '. ORR %D1, %S1, %C /* Or(%C, %S1) -> %D1, (%A1, const) */'
-},
-
-"Eor" => {
- "op_flags" => "C",
- "irn_flags" => "R",
- "comment" => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b",
- "attr" => "arm_shift_modifier mod, tarval *shf",
- "init_attr" => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- "cmp_attr" => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
- "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
- "emit" => '. EOR %D1, %S1, %S2%X0 /* Xor(%S1, %S2) -> %D1, (%A1, %A2) */'
-},
-
-"Eor_i" => {
- "irn_flags" => "R",
- "comment" => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const",
- "attr" => "tarval *tv",
- "init_attr" => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
- "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
- "cmp_attr" => 'return attr_a->value != attr_b->value;',
- "emit" => '. EOR %D1, %S1, %C /* Xor(%C, %S1) -> %D1, (%A1, const) */'
+Add => {
+ op_flags => "C",
+ irn_flags => "R",
+ comment => "construct Add: Add(a, b) = Add(b, a) = a + b",
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
+ reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
+ emit => '. add %D0, %S0, %S1%X'
+},
+
+Add_i => {
+ irn_flags => "R",
+ comment => "construct Add: Add(a, const) = Add(const, a) = a + const",
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
+ reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
+ emit => '. add %D0, %S0, %C'
+},
+
+Mul => {
+ #op_flags => "C",
+ irn_flags => "R",
+ comment => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
+ reg_req => { "in" => [ "gp", "gp" ], "out" => [ "!in_r1" ] },
+ emit =>'. mul %D0, %S0, %S1'
+},
+
+Smull => {
+ #op_flags => "C",
+ irn_flags => "R",
+ comment => "construct signed 64bit Mul: Mul(a, b) = Mul(b, a) = a * b",
+ reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp", "gp" ] },
+ emit =>'. smull %D0, %D1, %S0, %S1',
+ outs => [ "low", "high" ],
+},
+
+Umull => {
+ #op_flags => "C",
+ irn_flags => "R",
+ comment => "construct unsigned 64bit Mul: Mul(a, b) = Mul(b, a) = a * b",
+ reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp", "gp" ] },
+ emit =>'. umull %D0, %D1, %S0, %S1',
+ outs => [ "low", "high" ],
+},
+
+Mla => {
+ #op_flags => "C",
+ irn_flags => "R",
+ comment => "construct Mla: Mla(a, b, c) = a * b + c",
+ reg_req => { "in" => [ "gp", "gp", "gp" ], "out" => [ "!in_r1" ] },
+ emit =>'. mla %D0, %S0, %S1, %S2'
+},
+
+And => {
+ op_flags => "C",
+ irn_flags => "R",
+ comment => "construct And: And(a, b) = And(b, a) = a AND b",
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
+ reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
+ emit => '. and %D0, %S0, %S1%X'
+},
+
+And_i => {
+ irn_flags => "R",
+ comment => "construct And: And(a, const) = And(const, a) = a AND const",
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+ reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
+ emit => '. and %D0, %S0, %C',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
+},
+
+Or => {
+ op_flags => "C",
+ irn_flags => "R",
+ comment => "construct Or: Or(a, b) = Or(b, a) = a OR b",
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
+ reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
+ emit => '. orr %D0, %S0, %S1%X'
+},
+
+Or_i => {
+ irn_flags => "R",
+ comment => "construct Or: Or(a, const) = Or(const, a) = a OR const",
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+ reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
+ emit => '. orr %D0, %S0, %C'
+},
+
+Eor => {
+ op_flags => "C",
+ irn_flags => "R",
+ comment => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b",
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
+ reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
+ emit => '. eor %D0, %S0, %S1%X'
+},
+
+Eor_i => {
+ irn_flags => "R",
+ comment => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const",
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+ reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
+ emit => '. eor %D0, %S0, %C'