-typedef enum _arm_condition {
- ARM_COND_EQ = 0, /**< Equal, Z set. */
- ARM_COND_NE = 1, /**< Not Equal, Z clear */
- ARM_COND_CS = 2, /**< Carry set, unsigned >=, C set */
- ARM_COND_CC = 3, /**< Carry clear, unsigned <, C clear */
- ARM_COND_MI = 4, /**< Minus/Negativ, N set */
- ARM_COND_PL = 5, /**< Plus/Positiv or Zero, N clear */
- ARM_COND_VS = 6, /**< Overflow, V set */
- ARM_COND_VC = 7, /**< No overflow, V clear */
- ARM_COND_HI = 8, /**< unsigned >, C set and Z clear */
- ARM_COND_LS = 9, /**< unsigned <=, C clear or Z set */
- ARM_COND_GE = 10, /**< signed >=, N == V */
- ARM_COND_LT = 11, /**< signed <, N != V */
- ARM_COND_GT = 12, /**< signed >, Z clear and N == V */
- ARM_COND_LE = 13, /**< signed <=, Z set or N != V */
- ARM_COND_AL = 14, /**< Always (unconditional) */
- ARM_COND_NV = 15 /**< forbidden */
-} arm_condition;
-
-/** Get the condition code from flags */
-#define ARM_GET_COND(attr) (((attr)->instr_fl >> 3) & 15)
-
-/** Set the condition code to flags */
-#define ARM_SET_COND(attr, code) ((attr)->instr_fl = (((attr)->instr_fl & ~(15 << 3)) | ((code) << 3)))
-
-typedef struct _arm_attr_t {
- arch_irn_flags_t flags; /**< indicating if spillable, rematerializeable ... etc. */
- int n_res; /**< number of results for this node */
-
- const arm_register_req_t **in_req; /**< register requirements for arguments */
- const arm_register_req_t **out_req; /**< register requirements for results */
-
- const arch_register_t **slots; /**< register slots for assigned registers */
-
- unsigned instr_fl; /**< condition code, shift modifier */
- tarval *value; /**< immediate */
- const char *symconst_label;
- int proj_num;
- int n_projs;
- long default_proj_num;
+typedef enum arm_shift_modifier_t {
+ ARM_SHF_INVALID, /**< invalid shift */
+ ARM_SHF_REG, /**< simple register operand */
+ ARM_SHF_IMM, /**< immediate operand with implicit ROR */
+ ARM_SHF_ASR_IMM, /**< arithmetic shift right */
+ ARM_SHF_ASR_REG, /**< arithmetic shift right */
+ ARM_SHF_LSL_IMM, /**< logical shift left */
+ ARM_SHF_LSL_REG, /**< logical shift left */
+ ARM_SHF_LSR_IMM, /**< logical shift right */
+ ARM_SHF_LSR_REG, /**< logical shift right */
+ ARM_SHF_ROR_IMM, /**< rotate right */
+ ARM_SHF_ROR_REG, /**< rotate right */
+ ARM_SHF_RRX, /**< rotate right through carry bits */
+} arm_shift_modifier_t;
+
+/** Encoding for fpa immediates */
+enum fpa_immediates {
+ fpa_null = 0,
+ fpa_one,
+ fpa_two,
+ fpa_three,
+ fpa_four,
+ fpa_five,
+ fpa_ten,
+ fpa_half,
+ fpa_max
+};
+
+/** Generic ARM node attributes. */
+typedef struct arm_attr_t {
+ except_attr exc; /**< the exception attribute. MUST be the first one. */
+ bool is_load_store : 1; /**< if set, this is a load or store instruction */