- attr->value = NULL;
-
- attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
- memset((arch_register_t **)attr->slots, 0, n_res * sizeof(attr->slots[0]));
-}
-
-/***************************************************************************************
- * _ _ _
- * | | | | | |
- * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
- * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
- * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
- * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
- *
- ***************************************************************************************/
-
-#ifdef BIT
-#undef BIT
-#endif
-#define BIT(x) (1 << (x % 32))
-
-static unsigned arm_req_sp_limited[] = { BIT(REG_SP) };
-static const arch_register_req_t _arm_req_sp = {
- arch_register_req_type_limited,
- &arm_reg_classes[CLASS_arm_gp],
- arm_req_sp_limited,
- -1,
- -1
-};
-
-/* construct Store: Store(ptr, val, mem) = ST ptr,val */
-ir_node *new_r_arm_StoreStackMInc(ir_graph *irg, ir_node *block, ir_node *mem,
- ir_node *sp, int n_regs, ir_node **regs,
- ir_mode *mode) {
- ir_node *res;
- ir_node *in[16];
- int flags = 0;
- static const arch_register_req_t *_in_req_arm_StoreStackM4Inc[] =
- {
- &arm_StoreStackM4Inc_reg_req_in_0,
- &arm_StoreStackM4Inc_reg_req_in_1,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- &arm_StoreStackM4Inc_reg_req_in_2,
- };
-
- assert(n_regs <= 15);