-/***************************************************************************************
- * _ _ _
- * | | | | | |
- * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
- * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
- * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
- * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
- *
- ***************************************************************************************/
-
-/* limit the possible registers for sp in arm_StoreStackM4Inc */
-static void limit_reg_arm_StoreStackM4Inc_sp(void *_unused, bitset_t *bs) {
- bs = bitset_clear_all(bs); /* disallow all register (positive constraints given) */
- bitset_set(bs, 14); /* allow r13 */
- bitset_clear(bs, 13); /* disallow ignore reg r12 */
- bitset_clear(bs, 14); /* disallow ignore reg r13 */
- bitset_clear(bs, 15); /* disallow ignore reg r15 */
- bitset_clear(bs, 16); /* disallow ignore reg rxx */
- bitset_clear(bs, 17); /* disallow ignore reg MURX */
-}
-
-static const arm_register_req_t _arm_req_sp = {
- {
- arch_register_req_type_limited,
- &arm_reg_classes[CLASS_arm_general_purpose],
- limit_reg_arm_StoreStackM4Inc_sp,
- NULL, /* limit environment */
- NULL, /* same node */
- NULL /* different node */
- },
- 0,
- 0
-};
-
-/* construct Store: Store(ptr, val, mem) = ST ptr,val */
-ir_node *new_r_arm_StoreStackMInc(ir_graph *irg, ir_node *block, ir_node *mem, ir_node *sp,
- int n_regs, ir_node **regs, ir_mode *mode) {
- ir_node *res;
- ir_node *in[16];
- int flags = 0;
- static const arm_register_req_t *_in_req_arm_StoreStackM4Inc[] =
- {
- &arm_default_req_none,
- &_arm_req_sp,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- &arm_default_req_arm_general_purpose,
- };
-
- assert(n_regs <= 15);
-
- in[0] = mem;
- in[1] = sp;
- memcpy(&in[2], regs, n_regs * sizeof(in[0]));
- res = new_ir_node(NULL, irg, block, op_arm_StoreStackM4Inc, mode, 2 + n_regs, in);
- flags |= arch_irn_flags_rematerializable; /* op can be easily recalculated */
-
- /* init node attributes */
- init_arm_attributes(res, flags, _in_req_arm_StoreStackM4Inc, NULL, 0);
-
- res = optimize_node(res);
- irn_vrfy_irg(res, irg);
-
- return res;
-}
-
-/**
- * Register additional opcodes here.
- */
-static void arm_register_additional_opcodes(int cur_opcode) {
+/** copies the ARM attributes of a node. */
+static void arm_copy_attr(const ir_node *old_node, ir_node *new_node) {
+ ir_graph *irg = get_irn_irg(new_node);
+ struct obstack *obst = get_irg_obstack(irg);
+ const arm_attr_t *attr_old = get_arm_attr_const(old_node);
+ arm_attr_t *attr_new = get_arm_attr(new_node);
+
+ /* copy the attributes */
+ memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
+
+ /* copy out flags */
+ attr_new->out_flags =
+ DUP_ARR_D(int, obst, attr_old->out_flags);
+ /* copy register assignments */
+ attr_new->slots =
+ DUP_ARR_D(arch_register_t*, obst, attr_old->slots);