-/***************************************************************************************
- * _ _ _
- * | | | | | |
- * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
- * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
- * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
- * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
- *
- ***************************************************************************************/
-
-/* limit the possible registers for sp in arm_StoreStackM4Inc */
-static void limit_reg_arm_StoreStackM4Inc_sp(void *_unused, bitset_t *bs) {
- bs = bitset_clear_all(bs); /* disallow all register (positive constraints given) */
- bitset_set(bs, 14); /* allow r13 */
- bitset_clear(bs, 13); /* disallow ignore reg r12 */
- bitset_clear(bs, 14); /* disallow ignore reg r13 */
- bitset_clear(bs, 15); /* disallow ignore reg r15 */
- bitset_clear(bs, 16); /* disallow ignore reg rxx */
-}
-
-static const arm_register_req_t _arm_req_sp = {
- {
- arch_register_req_type_limited,
- &arm_reg_classes[CLASS_arm_gp],
- limit_reg_arm_StoreStackM4Inc_sp,
- NULL, /* limit environment */
- NULL, /* same node */
- NULL /* different node */
- },
- 0,
- 0
-};
-
-/* construct Store: Store(ptr, val, mem) = ST ptr,val */
-ir_node *new_r_arm_StoreStackMInc(ir_graph *irg, ir_node *block, ir_node *mem, ir_node *sp,
- int n_regs, ir_node **regs, ir_mode *mode) {
- ir_node *res;
- ir_node *in[16];
- int flags = 0;
- static const arm_register_req_t *_in_req_arm_StoreStackM4Inc[] =
- {
- &arm_default_req_none,
- &_arm_req_sp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- &arm_default_req_arm_gp,
- };
-
- assert(n_regs <= 15);
-
- in[0] = mem;
- in[1] = sp;
- memcpy(&in[2], regs, n_regs * sizeof(in[0]));
- res = new_ir_node(NULL, irg, block, op_arm_StoreStackM4Inc, mode, 2 + n_regs, in);
- flags |= arch_irn_flags_rematerializable; /* op can be easily recalculated */
-
- /* init node attributes */
- init_arm_attributes(res, flags, _in_req_arm_StoreStackM4Inc, NULL, NULL, 0, 1);
-
- res = optimize_node(res);
- irn_vrfy_irg(res, irg);
-
- return res;
-}
-
-/************************************************
- * ___ _ _ _ *
- * / _ \ _ __ | |_(_)_ __ ___ (_)_______ _ __ *
- * | | | | '_ \| __| | '_ ` _ \| |_ / _ \ '__| *
- * | |_| | |_) | |_| | | | | | | |/ / __/ | *
- * \___/| .__/ \__|_|_| |_| |_|_/___\___|_| *
- * |_| *
- ************************************************/
-
-typedef struct _opt_tuple {
- ir_op *op_imm_left; /**< immediate is left */
- ir_op *op_imm_right; /**< immediate is right */
- ir_op *op_shf_left; /**< shift operand on left */
- ir_op *op_shf_right; /**< shift operand on right */
-} opt_tuple;
-
-static const opt_tuple *opt_ops[iro_arm_last];
-
-void arm_set_optimizers(void) {
- /*
-#define STD(op) p_##op = { op_arm_##op##_i, op_arm_##op##_i, op_arm_##op, op_arm_##op }
-#define LEFT(op) p_##op = { op_arm_##op##_i, NULL, op_arm_##op, NULL }
-#define SET(op) opt_ops[iro_arm_##op] = &p_##op;
-
- static const opt_tuple
- STD(Add),
- STD(And),
- STD(Or),
- STD(Eor),
- LEFT(Bic),
- LEFT(Shl),
- LEFT(Shr),
- LEFT(Shrs),
- p_Sub = { op_arm_Sub_i, op_arm_Rsb_i, op_arm_Sub, op_arm_Rsb },
-
- memset(opt_ops, 0, sizeof(opt_ops));
- SET(Add);
- SET(And);
- SET(Or);
- SET(Eor);
- SET(Sub);
- SET(Bic);
- SET(Shl);
- SET(Shr);
- SET(Shrs);
- */