- ir_graph *rem = current_ir_graph;
- int n_blocks, used, i, j;
- tmp_dom_info *tdi_list; /* Ein Golf? */
-
- current_ir_graph = irg;
-
- /* Update graph state */
- assert(get_irg_phase_state(current_ir_graph) != phase_building);
- current_ir_graph->dom_state = dom_consistent;
-
- /* Count the number of blocks in the graph. */
- n_blocks = 0;
- irg_block_walk(get_irg_end(current_ir_graph), count_and_init_blocks_dom, NULL, &n_blocks);
-
- /* Memory for temporary information. */
- tdi_list = xcalloc(n_blocks, sizeof(tdi_list[0]));
-
- /* We need the out data structure. */
- if (current_ir_graph->outs_state != outs_consistent)
- compute_irg_outs(current_ir_graph);
-
- /* this with a standard walker as passing the parent to the sons isn't
- simple. */
- used = 0;
- inc_irg_block_visited(current_ir_graph);
- init_tmp_dom_info(get_irg_start_block(current_ir_graph), NULL, tdi_list, &used);
- /* If not all blocks are reachable from Start by out edges this assertion
- fails.
- assert(used == n_blocks && "Precondition for dom construction violated"); */
- n_blocks = used;
-
-
- for (i = n_blocks-1; i > 0; i--) { /* Don't iterate the root, it's done. */
- int irn_arity;
- tmp_dom_info *w = &tdi_list[i];
- tmp_dom_info *v;
-
- /* Step 2 */
- irn_arity = get_irn_arity(w->block);
- for (j = 0; j < irn_arity; j++) {
- ir_node *pred = get_Block_cfgpred_block(w->block, j);
- tmp_dom_info *u;
-
- if (is_Bad(pred) || (get_Block_dom_pre_num (pred) == -1))
- continue; /* control-dead */
-
- u = dom_eval (&tdi_list[get_Block_dom_pre_num(pred)]);
- if (u->semi < w->semi) w->semi = u->semi;
- }
- /* Add w to w->semi's bucket. w is in exactly one bucket, so
- buckets can been implemented as linked lists. */
- w->bucket = w->semi->bucket;
- w->semi->bucket = w;
-
- dom_link (w->parent, w);
-
- /* Step 3 */
- while (w->parent->bucket) {
- tmp_dom_info *u;
- v = w->parent->bucket;
- /* remove v from w->parent->bucket */
- w->parent->bucket = v->bucket;
- v->bucket = NULL;
-
- u = dom_eval (v);
- if (u->semi < v->semi)
- v->dom = u;
- else
- v->dom = w->parent;
- }
- }
- /* Step 4 */
- tdi_list[0].dom = NULL;
- set_Block_idom(tdi_list[0].block, NULL);
- set_Block_dom_depth(tdi_list[0].block, 1);
- for (i = 1; i < n_blocks; i++) {
- tmp_dom_info *w = &tdi_list[i];
-
- if (w->dom != w->semi) w->dom = w->dom->dom;
- set_Block_idom(w->block, w->dom->block);
- set_Block_dom_depth(w->block, get_Block_dom_depth(w->dom->block) + 1);
- }
-
- /* clean up */
- free(tdi_list);
- current_ir_graph = rem;
-
- /* Do a walk over the tree and assign the tree pre orders. */
- {
- unsigned tree_pre_order = 0;
- dom_tree_walk_irg(irg, assign_tree_dom_pre_order,
- assign_tree_dom_pre_order_max, &tree_pre_order);
- }
+ ir_graph *rem = current_ir_graph;
+ int n_blocks, used, i, j;
+ tmp_dom_info *tdi_list; /* Ein Golf? */
+
+ current_ir_graph = irg;
+
+ /* Update graph state */
+ assert(get_irg_phase_state(irg) != phase_building);
+ irg->dom_state = dom_consistent;
+
+ /* Count the number of blocks in the graph. */
+ n_blocks = init_construction(irg, count_and_init_blocks_dom);
+
+ /* Memory for temporary information. */
+ tdi_list = xcalloc(n_blocks, sizeof(tdi_list[0]));
+
+ /* We need the out data structure. */
+ assure_irg_outs(irg);
+
+ /* this with a standard walker as passing the parent to the sons isn't
+ simple. */
+ used = 0;
+ inc_irg_block_visited(irg);
+ init_tmp_dom_info(get_irg_start_block(irg), NULL, tdi_list, &used, n_blocks);
+ /* If not all blocks are reachable from Start by out edges this assertion
+ fails.
+ assert(used == n_blocks && "Precondition for dom construction violated"); */
+ assert(used <= n_blocks && "Precondition for dom construction violated");
+ n_blocks = used;
+
+
+ for (i = n_blocks-1; i > 0; i--) { /* Don't iterate the root, it's done. */
+ int irn_arity;
+ tmp_dom_info *w = &tdi_list[i];
+ tmp_dom_info *v;
+
+ /* Step 2 */
+ irn_arity = get_irn_arity(w->block);
+ for (j = 0; j < irn_arity; j++) {
+ ir_node *pred = get_Block_cfgpred_block(w->block, j);
+ tmp_dom_info *u;
+
+ if (is_Bad(pred) || (get_Block_dom_pre_num (pred) == -1))
+ continue; /* control-dead */
+
+ u = dom_eval (&tdi_list[get_Block_dom_pre_num(pred)]);
+ if (u->semi < w->semi) w->semi = u->semi;
+ }
+
+ /* handle keep-alives if we are at the end block */
+ if (w->block == get_irg_end_block(irg)) {
+ ir_node *end = get_irg_end(irg);
+
+ irn_arity = get_irn_arity(end);
+ for (j = 0; j < irn_arity; j++) {
+ ir_node *pred = get_irn_n(end, j);
+ tmp_dom_info *u;
+
+ if (is_no_Block(pred) || get_Block_dom_pre_num(pred) == -1)
+ continue; /* control-dead */
+
+ u = dom_eval (&tdi_list[get_Block_dom_pre_num(pred)]);
+ if (u->semi < w->semi) w->semi = u->semi;
+ }
+ }
+
+ /* Add w to w->semi's bucket. w is in exactly one bucket, so
+ buckets can been implemented as linked lists. */
+ w->bucket = w->semi->bucket;
+ w->semi->bucket = w;
+
+ dom_link (w->parent, w);
+
+ /* Step 3 */
+ while (w->parent->bucket) {
+ tmp_dom_info *u;
+ v = w->parent->bucket;
+ /* remove v from w->parent->bucket */
+ w->parent->bucket = v->bucket;
+ v->bucket = NULL;
+
+ u = dom_eval (v);
+ if (u->semi < v->semi)
+ v->dom = u;
+ else
+ v->dom = w->parent;
+ }
+ }
+ /* Step 4 */
+ tdi_list[0].dom = NULL;
+ set_Block_idom(tdi_list[0].block, NULL);
+ set_Block_dom_depth(tdi_list[0].block, 1);
+ for (i = 1; i < n_blocks; i++) {
+ tmp_dom_info *w = &tdi_list[i];
+ int depth;
+
+ if (! w->dom)
+ continue; /* control dead */
+
+ if (w->dom != w->semi) w->dom = w->dom->dom;
+ set_Block_idom(w->block, w->dom->block);
+
+ /* blocks dominated by dead one's are still dead */
+ depth = get_Block_dom_depth(w->dom->block);
+ if (depth > 0)
+ ++depth;
+ set_Block_dom_depth(w->block, depth);
+ }
+
+ /* clean up */
+ free(tdi_list);
+
+ /* Do a walk over the tree and assign the tree pre orders. */
+ {
+ unsigned tree_pre_order = 0;
+ dom_tree_walk_irg(irg, assign_tree_dom_pre_order,
+ assign_tree_dom_pre_order_max, &tree_pre_order);
+ }
+ current_ir_graph = rem;
+}
+
+void assure_doms(ir_graph *irg) {
+ if (get_irg_dom_state(irg) != dom_consistent)
+ compute_doms(irg);