+ * MIPS32r6, an incompatible ISA, is supported as a variant "mipsr6"
+
+* MIPS64
+ * ABI is n64 (LP64) or n32 (ILP32)
+ * Big-endian default; little-endian variants also supported
+ * Default ABI variant uses FPU registers; alternate soft-float ABI
+ that does not use FPU registers or instructions is available