int offs = get_ia32_am_offs_int(node);
ir_node *base = get_irn_n(node, n_ia32_base);
int has_base = !is_ia32_NoReg_GP(base);
- ir_node *index = get_irn_n(node, n_ia32_index);
- int has_index = !is_ia32_NoReg_GP(index);
+ ir_node *idx = get_irn_n(node, n_ia32_index);
+ int has_index = !is_ia32_NoReg_GP(idx);
/* just to be sure... */
assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
end_of_mods:
switch (*fmt++) {
+ arch_register_t const *reg;
+ ir_node const *imm;
+
case '%':
be_emit_char('%');
break;
ia32_emit_am(node);
break;
- case 'R': {
- const arch_register_t *reg = va_arg(ap, const arch_register_t*);
+ case 'R':
+ reg = va_arg(ap, const arch_register_t*);
if (get_ia32_op_type(node) == ia32_AddrModeS) {
goto emit_AM;
} else {
- if (mod & EMIT_ALTERNATE_AM)
- be_emit_char('*');
- emit_register(reg, NULL);
+ goto emit_R;
}
- break;
- }
case 'S':
if (get_ia32_op_type(node) == ia32_AddrModeS) {
assert(get_ia32_op_type(node) == ia32_Normal);
goto emit_S;
}
- break;
default: goto unknown;
}
break;
}
- case 'D': {
- unsigned pos;
- const arch_register_t *reg;
-
+ case 'D':
if (*fmt < '0' || '9' <= *fmt)
goto unknown;
-
- pos = *fmt++ - '0';
- reg = get_out_reg(node, pos);
- emit_register(reg, mod & EMIT_RESPECT_LS ? get_ia32_ls_mode(node) : NULL);
- break;
- }
+ reg = get_out_reg(node, *fmt++ - '0');
+ goto emit_R;
case 'I':
+ imm = node;
+emit_I:
if (!(mod & EMIT_ALTERNATE_AM))
be_emit_char('$');
- emit_ia32_Immediate_no_prefix(node);
+ emit_ia32_Immediate_no_prefix(imm);
break;
case 'L':
ia32_emit_cfop_target(node);
break;
- case 'M': {
+ case 'M':
ia32_emit_mode_suffix_mode(get_ia32_ls_mode(node));
break;
- }
case 'P': {
ia32_condition_code_t cc = va_arg(ap, ia32_condition_code_t);
break;
}
- case 'R': {
- const arch_register_t *reg = va_arg(ap, const arch_register_t*);
+ case 'R':
+ reg = va_arg(ap, const arch_register_t*);
+emit_R:
+ if (mod & EMIT_ALTERNATE_AM)
+ be_emit_char('*');
if (mod & EMIT_HIGH_REG) {
emit_8bit_register_high(reg);
} else if (mod & EMIT_LOW_REG) {
emit_register(reg, mod & EMIT_RESPECT_LS ? get_ia32_ls_mode(node) : NULL);
}
break;
- }
emit_S:
case 'S': {
- unsigned pos;
- const ir_node *in;
+ unsigned pos;
if (*fmt < '0' || '9' <= *fmt)
goto unknown;
pos = *fmt++ - '0';
- in = get_irn_n(node, pos);
- if (is_ia32_Immediate(in)) {
- if (!(mod & EMIT_ALTERNATE_AM))
- be_emit_char('$');
- emit_ia32_Immediate_no_prefix(in);
+ imm = get_irn_n(node, pos);
+ if (is_ia32_Immediate(imm)) {
+ goto emit_I;
} else {
- const arch_register_t *reg;
-
- if (mod & EMIT_ALTERNATE_AM)
- be_emit_char('*');
reg = get_in_reg(node, pos);
- emit_register(reg, mod & EMIT_RESPECT_LS ? get_ia32_ls_mode(node) : NULL);
+ goto emit_R;
}
- break;
}
case 's': {
return find_original_value(get_irn_n(pred, get_Proj_proj(node) + 1));
} else if (is_ia32_Load(pred)) {
return find_original_value(get_irn_n(pred, n_ia32_Load_mem));
+ } else if (is_ia32_Store(pred)) {
+ return find_original_value(get_irn_n(pred, n_ia32_Store_val));
} else {
return node;
}
- } else if (is_ia32_Store(node)) {
- return find_original_value(get_irn_n(node, n_ia32_Store_val));
} else if (is_Phi(node)) {
int i, arity;
arity = get_irn_arity(node);
ir_entity *jump_table = get_ia32_am_sc(node);
long default_pn = get_ia32_default_pn(node);
- ia32_emitf(node, "\tjmp *%AM\n", node);
-
+ ia32_emitf(node, "\tjmp %*AM\n");
emit_jump_table(node, default_pn, jump_table, get_cfop_target_block);
}
*/
static void emit_ia32_Conv_I2I(const ir_node *node)
{
- ir_mode *smaller_mode = get_ia32_ls_mode(node);
- int signed_mode = mode_is_signed(smaller_mode);
+ ir_mode *smaller_mode = get_ia32_ls_mode(node);
+ int signed_mode = mode_is_signed(smaller_mode);
const char *sign_suffix;
assert(!mode_is_float(smaller_mode));
*/
static void ia32_emit_block_header(ir_node *block)
{
- ir_graph *irg = current_ir_graph;
+ ir_graph *irg = current_ir_graph;
int need_label = block_needs_label(block);
- int i, arity;
- ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg);
+ ir_exec_freq *exec_freq = be_get_irg_exec_freq(irg);
+ int arity;
if (block == get_irg_end_block(irg))
return;
if (arity <= 0) {
be_emit_cstring(" none");
} else {
+ int i;
for (i = 0; i < arity; ++i) {
ir_node *predblock = get_Block_cfgpred_block(block, i);
be_emit_irprintf(" %d", get_irn_node_nr(predblock));
Those are ascending with ascending addresses. */
qsort(exc_list, ARR_LEN(exc_list), sizeof(exc_list[0]), cmp_exc_entry);
{
- size_t i;
+ size_t e;
- for (i = 0; i < ARR_LEN(exc_list); ++i) {
+ for (e = 0; e < ARR_LEN(exc_list); ++e) {
be_emit_cstring("\t.long ");
- ia32_emit_exc_label(exc_list[i].exc_instr);
+ ia32_emit_exc_label(exc_list[e].exc_instr);
be_emit_char('\n');
be_emit_cstring("\t.long ");
- be_gas_emit_block_name(exc_list[i].block);
+ be_gas_emit_block_name(exc_list[e].block);
be_emit_char('\n');
}
}
int offs = get_ia32_am_offs_int(node);
ir_node *base = get_irn_n(node, n_ia32_base);
int has_base = !is_ia32_NoReg_GP(base);
- ir_node *index = get_irn_n(node, n_ia32_index);
- int has_index = !is_ia32_NoReg_GP(index);
+ ir_node *idx = get_irn_n(node, n_ia32_index);
+ int has_index = !is_ia32_NoReg_GP(idx);
unsigned modrm = 0;
unsigned sib = 0;
unsigned emitoffs = 0;
/* Determine if we need a SIB byte. */
if (has_index) {
- const arch_register_t *reg_index = arch_get_irn_register(index);
+ const arch_register_t *reg_index = arch_get_irn_register(idx);
int scale = get_ia32_am_scale(node);
assert(scale < 4);
/* R/M set to ESP means SIB in 32bit mode. */
if (out->index == REG_GP_EAX) {
ir_node *base = get_irn_n(node, n_ia32_base);
int has_base = !is_ia32_NoReg_GP(base);
- ir_node *index = get_irn_n(node, n_ia32_index);
- int has_index = !is_ia32_NoReg_GP(index);
+ ir_node *idx = get_irn_n(node, n_ia32_index);
+ int has_index = !is_ia32_NoReg_GP(idx);
if (!has_base && !has_index) {
ir_entity *ent = get_ia32_am_sc(node);
int offs = get_ia32_am_offs_int(node);
if (in->index == REG_GP_EAX) {
ir_node *base = get_irn_n(node, n_ia32_base);
int has_base = !is_ia32_NoReg_GP(base);
- ir_node *index = get_irn_n(node, n_ia32_index);
- int has_index = !is_ia32_NoReg_GP(index);
+ ir_node *idx = get_irn_n(node, n_ia32_index);
+ int has_index = !is_ia32_NoReg_GP(idx);
if (!has_base && !has_index) {
ir_entity *ent = get_ia32_am_sc(node);
int offs = get_ia32_am_offs_int(node);