const ir_asm_constraint *in_constraints;
const ir_asm_constraint *out_constraints;
ident **clobbers;
- int clobbers_flags = 0;
unsigned clobber_bits[N_IA32_CLASSES];
int out_size;
backend_info_t *info;
memset(&clobber_bits, 0, sizeof(clobber_bits));
- /* workaround for lots of buggy code out there as most people think volatile
- * asm is enough for everything and forget the flags (linux kernel, etc.)
- */
- if (get_irn_pinned(node) == op_pin_state_pinned) {
- clobbers_flags = 1;
- }
-
arity = get_irn_arity(node);
in = ALLOCANZ(ir_node*, arity);
if (strcmp(c, "memory") == 0)
continue;
if (strcmp(c, "cc") == 0) {
- clobbers_flags = 1;
continue;
}
for (out_idx = 0; out_idx < n_out_constraints; ++out_idx) {
const ir_asm_constraint *constraint = &out_constraints[out_idx];
const char *c = get_id_str(constraint->constraint);
- unsigned pos = constraint->pos;
+ unsigned pos = constraint->pos;
constraint_t parsed_constraint;
const arch_register_req_t *req;
out_reg_reqs, out_idx);
out_reg_reqs[out_idx] = req;
+ /* multiple constraints for same pos. This can happen for example when
+ * a =A constraint gets lowered to two constraints: =a and =d for the
+ * same pos */
+ if (register_map[pos].valid)
+ continue;
+
register_map[pos].use_input = 0;
register_map[pos].valid = 1;
register_map[pos].memory = 0;