/**
* Backend driver.
* @author Sebastian Hack
- * @date 25.11.2004
+ * @date 25.11.2004
+ * @cvsid $Id$
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#include "belower.h"
#include "beschedmris.h"
#include "bestat.h"
+#include "beverify.h"
#define DUMP_INITIAL (1 << 0)
#define DUMP_ABI (1 << 1)
#define DUMP_RA (1 << 4)
#define DUMP_FINAL (1 << 5)
+enum {
+ BE_VRFY_OFF,
+ BE_VRFY_WARN,
+ BE_VRFY_ASSERT
+};
+
/* options visible for anyone */
static be_options_t be_options = {
/* ilp server */
};
/* dump flags */
-static unsigned dump_flags = 2 * DUMP_FINAL - 1;
+static unsigned dump_flags = 0;
+
+/* verify options */
+static unsigned vrfy_option = BE_VRFY_WARN;
/* register allocator to use. */
static const be_ra_t *ra = &be_ra_chordal_allocator;
/* back end instruction set architecture to use */
static const arch_isa_if_t *isa_if = &ia32_isa_if;
+
+/* mris option */
+static int be_enable_mris = 0;
+
#ifdef WITH_LIBCORE
static lc_opt_entry_t *be_grp_root = NULL;
-static int be_disable_mris = 0;
-
/* possible dumping options */
static const lc_opt_enum_mask_items_t dump_items[] = {
{ "none", 0 },
/* instruction set architectures. */
static const lc_opt_enum_const_ptr_items_t isa_items[] = {
- { "firm", &firm_isa },
{ "ia32", &ia32_isa_if },
+#if 0
{ "arm", &arm_isa_if },
{ "ppc32", &ppc32_isa_if },
{ "mips", &mips_isa_if },
+#endif
{ NULL, NULL }
};
+/* verify options. */
+static const lc_opt_enum_int_items_t vrfy_items[] = {
+ { "off", BE_VRFY_OFF },
+ { "warn", BE_VRFY_WARN },
+ { "assert", BE_VRFY_ASSERT },
+ { NULL, 0 }
+};
static lc_opt_enum_mask_var_t dump_var = {
&dump_flags, dump_items
};
(const void **) &isa_if, isa_items
};
+static lc_opt_enum_int_var_t vrfy_var = {
+ &vrfy_option, vrfy_items
+};
+
static const lc_opt_table_entry_t be_main_options[] = {
LC_OPT_ENT_ENUM_MASK("dump", "dump irg on several occasions", &dump_var),
LC_OPT_ENT_ENUM_PTR ("ra", "register allocator", &ra_var),
LC_OPT_ENT_ENUM_PTR ("isa", "the instruction set architecture", &isa_var),
LC_OPT_ENT_NEGBOOL ("noomitfp", "do not omit frame pointer", &be_omit_fp),
- LC_OPT_ENT_NEGBOOL ("nomris", "disable mris schedule preparation", &be_disable_mris),
+ LC_OPT_ENT_BOOL ("mris", "enable mris schedule preparation", &be_enable_mris),
+ LC_OPT_ENT_ENUM_PTR ("vrfy", "verify the backend irg (off, warn, assert)", &vrfy_var),
#ifdef WITH_ILP
LC_OPT_ENT_STR ("ilp.server", "the ilp server name", be_options.ilp_server, sizeof(be_options.ilp_server)),
return -1;
}
return lc_opt_from_single_arg(be_grp_root, NULL, arg, NULL);
+#else
+ return 0;
#endif /* WITH_LIBCORE */
}
NULL,
};
+/* Perform schedule verification if requested. */
+static void be_sched_vrfy(ir_graph *irg, int vrfy_opt) {
+ if (vrfy_opt == BE_VRFY_WARN) {
+ be_verify_schedule(irg);
+ }
+ else if (vrfy_opt == BE_VRFY_ASSERT) {
+ assert(be_verify_schedule(irg) && "Schedule verification failed.");
+ }
+}
+
/* Initialize the Firm backend. Must be run BEFORE init_firm()! */
const backend_params *be_init(void)
{
ir_graph *irg = get_irp_irg(i);
const arch_code_generator_if_t *cg_if;
be_irg_t birg;
+ int save_optimize, save_normalize;
birg.irg = irg;
birg.main_env = &env;
DBG((env.dbg, LEVEL_2, "====> IRG: %F\n", irg));
dump(DUMP_INITIAL, irg, "-begin", dump_ir_block_graph);
+ be_stat_init_irg(env.arch_env, irg);
+ be_do_stat_nodes(irg, "01 Begin");
+
/* set the current graph (this is important for several firm functions) */
current_ir_graph = birg.irg;
birg.abi = be_abi_introduce(&birg);
dump(DUMP_ABI, irg, "-abi", dump_ir_block_graph);
+ be_do_stat_nodes(irg, "02 Abi");
+
/* generate code */
arch_code_generator_prepare_graph(birg.cg);
+ be_do_stat_nodes(irg, "03 Prepare");
+
/*
* Since the code generator made a lot of new nodes and skipped
* a lot of old ones, we should do dead node elimination here.
/* Schedule the graphs. */
arch_code_generator_before_sched(birg.cg);
- list_sched(&birg, be_disable_mris);
+ list_sched(&birg, be_enable_mris);
dump(DUMP_SCHED, irg, "-sched", dump_ir_block_graph_sched);
+ /* check schedule */
+ be_sched_vrfy(birg.irg, vrfy_option);
+
+ be_do_stat_nodes(irg, "04 Schedule");
+
+ /* we switch off optimizations here, because they might cause trouble */
+ save_optimize = get_optimize();
+ save_normalize = get_opt_normalize();
+ set_optimize(0);
+ set_opt_normalize(0);
+
/* add Keeps for should_be_different constrained nodes */
/* beware: needs schedule due to usage of be_ssa_constr */
assure_constraints(&birg);
- dump(DUMP_PREPARED, irg, "-assured", dump_ir_block_graph_sched);
+ dump(DUMP_SCHED, irg, "-assured", dump_ir_block_graph_sched);
+
+ be_do_stat_nodes(irg, "05 Constraints");
/* connect all stack modifying nodes together (see beabi.c) */
be_abi_fix_stack_nodes(birg.abi);
dump(DUMP_SCHED, irg, "-fix_stack", dump_ir_block_graph_sched);
- /* Verify the schedule */
- assert(sched_verify_irg(irg));
+ /* check schedule */
+ be_sched_vrfy(birg.irg, vrfy_option);
/* do some statistics */
be_do_stat_reg_pressure(&birg);
ra->allocate(&birg);
dump(DUMP_RA, irg, "-ra", dump_ir_block_graph_sched);
+ be_do_stat_nodes(irg, "06 Register Allocation");
+
arch_code_generator_after_ra(birg.cg);
be_abi_fix_stack_bias(birg.abi);
+ /* check schedule */
+ be_sched_vrfy(birg.irg, vrfy_option);
+
arch_code_generator_done(birg.cg);
dump(DUMP_FINAL, irg, "-end", dump_ir_extblock_graph_sched);
be_abi_free(birg.abi);
-// free_ir_graph(irg);
+ be_do_stat_nodes(irg, "07 Final");
+
+ /* reset the optimizations */
+ set_optimize(save_optimize);
+ set_opt_normalize(save_normalize);
+
+ /* switched off due to statistics (statistic module needs all irgs) */
+ // free_ir_graph(irg);
}
be_done_env(&env);
}