+/*
+ * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
+ *
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
+ *
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
+ */
+
/**
- * Backend driver.
- * @author Sebastian Hack
- * @date 25.11.2004
- * @cvsid $Id$
+ * @file
+ * @brief Main Backend driver.
+ * @author Sebastian Hack
+ * @date 25.11.2004
+ * @version $Id$
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#include "cfopt.h"
#include "execfreq.h"
-#include "bearch.h"
+#include "bearch_t.h"
#include "be_t.h"
#include "bemodule.h"
#include "beutil.h"
#include "belive_t.h"
#include "bespillbelady.h"
#include "bera.h"
-#include "beraextern.h"
#include "bechordal_t.h"
#include "beifg.h"
#include "beifg_impl.h"
#include "beverify.h"
#include "beprofile.h"
#include "be_dbgout.h"
+#include "beirg_t.h"
#ifdef WITH_ILP
#include "beilpsched.h"
BE_TIME_OFF, /* no timing */
0, /* no opt profile */
1, /* try to omit frame pointer */
- 0, /* always stabs debugging output */
+ 0, /* no stabs debugging output */
BE_VRFY_WARN, /* verification level: warn */
BE_SCHED_LIST, /* scheduler: list scheduler */
"i44pc52.info.uni-karlsruhe.de", /* ilp server */
- "cplex" /* ilp solver */
+ "cplex", /* ilp solver */
+ "", /* filename for statistic output */
};
/* config file. */
};
/* Perform schedule verification if requested. */
-static void be_sched_vrfy(ir_graph *irg, int vrfy_opt) {
+static void be_sched_vrfy(be_irg_t *birg, int vrfy_opt) {
if (vrfy_opt == BE_VRFY_WARN) {
- be_verify_schedule(irg);
+ be_verify_schedule(birg);
}
else if (vrfy_opt == BE_VRFY_ASSERT) {
- assert(be_verify_schedule(irg) && "Schedule verification failed.");
+ assert(be_verify_schedule(birg) && "Schedule verification failed.");
}
}
obstack_init(&env->obst);
env->arch_env = obstack_alloc(&env->obst, sizeof(env->arch_env[0]));
env->options = &be_options;
- FIRM_DBG_REGISTER(env->dbg, "be.main");
arch_env_init(env->arch_env, isa_if, file_handle, env);
edges_deactivate_kind(irg, EDGE_KIND_DEP);
edges_activate_kind(irg, EDGE_KIND_DEP);
- DBG((env->dbg, LEVEL_2, "====> IRG: %F\n", irg));
dump(DUMP_INITIAL, irg, "-begin", dump_ir_block_graph);
be_stat_init_irg(env->arch_env, irg);
char prof_filename[256];
static const char suffix[] = ".prof";
be_irg_t *birgs;
- unsigned num_birgs;
+ int num_birgs;
ir_graph **irg_list, **backend_irg_list;
lc_timer_t *t_abi = NULL;
/**
* Create execution frequencies from profile data or estimate some
*/
- if (be_profile_has_data()) {
+ if (be_profile_has_data())
birg->exec_freq = be_create_execfreqs_from_profile(irg);
- } else {
+ else
birg->exec_freq = compute_execfreq(irg, 10);
- }
+
+ be_live_chk_compare(birg);
/* let backend prepare scheduling */
BE_TIMER_PUSH(t_codegen);
break;
#ifdef WITH_ILP
case BE_SCHED_ILP:
- be_ilp_sched(birg);
- //fprintf(stderr, "Warning: ILP scheduler not yet fully implemented, falling back to list scheduler.\n");
- //list_sched(birg, &be_options);
+ be_ilp_sched(birg, &be_options);
break;
#endif /* WITH_ILP */
};
/* check schedule */
BE_TIMER_PUSH(t_verify);
- be_sched_vrfy(irg, be_options.vrfy_option);
+ be_sched_vrfy(birg, be_options.vrfy_option);
BE_TIMER_POP(t_verify);
be_do_stat_nodes(irg, "04 Schedule");
dump(DUMP_SCHED, irg, "-assured", dump_ir_block_graph_sched);
be_do_stat_nodes(irg, "05 Constraints");
+ /* stuff needs to be done after scheduling but before register allocation */
+ BE_TIMER_PUSH(t_codegen);
+ arch_code_generator_before_ra(birg->cg);
+ BE_TIMER_POP(t_codegen);
+
/* connect all stack modifying nodes together (see beabi.c) */
BE_TIMER_PUSH(t_abi);
- be_abi_fix_stack_nodes(birg->abi, NULL);
+ be_abi_fix_stack_nodes(birg->abi);
BE_TIMER_POP(t_abi);
dump(DUMP_SCHED, irg, "-fix_stack", dump_ir_block_graph_sched);
/* check schedule */
BE_TIMER_PUSH(t_verify);
- be_sched_vrfy(irg, be_options.vrfy_option);
+ be_sched_vrfy(birg, be_options.vrfy_option);
BE_TIMER_POP(t_verify);
/* do some statistics */
be_do_stat_reg_pressure(birg);
- /* stuff needs to be done after scheduling but before register allocation */
- BE_TIMER_PUSH(t_codegen);
- arch_code_generator_before_ra(birg->cg);
- BE_TIMER_POP(t_codegen);
-
#ifdef FIRM_STATISTICS
if(be_stat_ev_is_active()) {
be_stat_ev_l("costs_before_ra",
/* fix stack offsets */
BE_TIMER_PUSH(t_abi);
- be_abi_fix_stack_nodes(birg->abi, NULL);
+ be_abi_fix_stack_nodes(birg->abi);
be_remove_dead_nodes_from_schedule(irg);
be_abi_fix_stack_bias(birg->abi);
BE_TIMER_POP(t_abi);
irg_verify(irg, VRFY_ENFORCE_SSA);
be_check_dominance(irg);
be_verify_out_edges(irg);
- be_verify_schedule(irg);
+ be_verify_schedule(birg);
be_verify_register_allocation(env.arch_env, irg);
- be_verify_spillslots(env.arch_env, irg);
} else if (be_options.vrfy_option == BE_VRFY_ASSERT) {
assert(irg_verify(irg, VRFY_ENFORCE_SSA) && "irg verification failed");
assert(be_verify_out_edges(irg) && "out edge verification failed");
assert(be_check_dominance(irg) && "Dominance verification failed");
- assert(be_verify_schedule(irg) && "Schedule verification failed");
+ assert(be_verify_schedule(birg) && "Schedule verification failed");
assert(be_verify_register_allocation(env.arch_env, irg)
&& "register allocation verification failed");
- assert(be_verify_spillslots(env.arch_env, irg) && "Spillslot verification failed");
}
BE_TIMER_POP(t_verify);
return NULL;
}
-int be_put_ignore_regs(const be_irg_t *birg, const arch_register_class_t *cls, bitset_t *bs)
+unsigned be_put_ignore_regs(const be_irg_t *birg, const arch_register_class_t *cls, bitset_t *bs)
{
- if(bs == NULL)
+ if (bs == NULL)
bs = bitset_alloca(cls->n_regs);
else
bitset_clear_all(bs);
- assert(bitset_size(bs) == (unsigned) cls->n_regs);
+ assert(bitset_size(bs) == (unsigned)cls->n_regs);
arch_put_non_ignore_regs(birg->main_env->arch_env, cls, bs);
bitset_flip_all(bs);
be_abi_put_ignore_regs(birg->abi, cls, bs);