added output of arity, backedges
[libfirm] / testprograms / ref-results / IRR_LOOP_main-cfg.vcg
1 graph: { title: "ir graph of IRR_LOOP_main"
2 display_edge_labels: yes
3 layoutalgorithm: mindepth
4 manhattan_edges: yes
5 port_sharing: no
6 orientation: bottom_to_top
7 classname 1: "Data"
8 classname 2: "Block"
9 classname 3: "Entity type"
10 classname 4: "Entity owner"
11 classname 5: "Method Param"
12 classname 6: "Method Res"
13 classname 7: "Super"
14 classname 8: "Union"
15 classname 9: "Points-to"
16 classname 10: "Array Element Type"
17 classname 11: "Overwrites"
18 classname 12: "Member"
19
20 node: {title: "n60" label: "Block n60" }
21 edge: { sourcename: "n60" targetname: "n62"}
22 node: {title: "n62" label: "Block n62" }
23 edge: { sourcename: "n62" targetname: "n66"}
24 edge: { sourcename: "n62" targetname: "n64"}
25 node: {title: "n64" label: "Block n64" }
26 edge: { sourcename: "n64" targetname: "n77"}
27 edge: { sourcename: "n64" targetname: "n66"}
28 node: {title: "n66" label: "Block n66" }
29 edge: { sourcename: "n66" targetname: "n77"}
30 edge: { sourcename: "n66" targetname: "n64"}
31 node: {title: "n77" label: "Block n77" }
32 edge: { sourcename: "n77" targetname: "n72"}
33 node: {title: "n72" label: "Block n72" }
34 edge: { sourcename: "n72" targetname: "n72"}
35 node: {title: "n94" label: "Bad  94"  info1: "visited: 0
36 irg:     IRR_LOOP_main
37 arity: 0
38 "}
39 }