added one node in const_code_irg ==> new node numbers
[libfirm] / testprograms / ref-results / IRREGULAR_CF_main-cfg.vcg
1 graph: { title: "ir graph of IRREGULAR_CF_main"
2 display_edge_labels: yes
3 layoutalgorithm: mindepth
4 manhattan_edges: yes
5 port_sharing: no
6 orientation: bottom_to_top
7 classname 1:  "intrablock Data"
8 classname 16: "interblock Data"
9 classname 2:  "Block"
10 classname 13: "Control Flow"
11 classname 14: "intrablock Memory"
12 classname 17: "interblock Memory"
13 classname 15: "Dominators"
14 classname 3:  "Entity type"
15 classname 4:  "Entity owner"
16 classname 5:  "Method Param"
17 classname 6:  "Method Res"
18 classname 7:  "Super"
19 classname 8:  "Union"
20 classname 9:  "Points-to"
21 classname 10: "Array Element Type"
22 classname 11: "Overwrites"
23 classname 12: "Member"
24 infoname 1: "Attribute"
25 infoname 2: "Verification errors"
26
27 node: {title: "n64" label: "Block n64" }
28 edge: { sourcename: "n64" targetname: "n66"}
29 node: {title: "n66" label: "Block n66" }
30 edge: { sourcename: "n66" targetname: "n89"}
31 edge: { sourcename: "n66" targetname: "n68"}
32 node: {title: "n68" label: "Block n68" }
33 edge: { sourcename: "n68" targetname: "n82"}
34 edge: { sourcename: "n68" targetname: "n70"}
35 node: {title: "n70" label: "Block n70" }
36 edge: { sourcename: "n70" targetname: "n72"}
37 node: {title: "n72" label: "Block n72" }
38 edge: { sourcename: "n72" targetname: "n74"}
39 node: {title: "n74" label: "Block n74" }
40 edge: { sourcename: "n74" targetname: "n74"}
41 node: {title: "n82" label: "Block n82" }
42 edge: { sourcename: "n82" targetname: "n72"}
43 node: {title: "n89" label: "Block n89" }
44 edge: { sourcename: "n89" targetname: "n82"}
45 node: {title: "n63" label: "Bad  63"  info1: "mode:    T
46 visited: 0
47 irg:     IRREGULAR_CF_main
48 arity: 0
49 "}
50 }