2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower some High-level constructs, moved from the firmlower.
23 * @author Boris Boesler, Goetz Lindenmaier, Michael Beck
42 * Lower a Sel node. Do not touch Sels accessing entities on the frame type.
44 static void lower_sel(ir_node *sel)
46 ir_graph *irg = current_ir_graph;
48 ir_node *newn, *cnst, *index, *ptr, *bl;
50 ir_mode *basemode, *mode, *mode_Int;
51 ir_type *basetyp, *owner;
56 /* Do not lower frame type/global offset table access: must be lowered by the backend. */
57 ptr = get_Sel_ptr(sel);
58 if (ptr == get_irg_frame(current_ir_graph))
61 ent = get_Sel_entity(sel);
62 owner = get_entity_owner(ent);
65 * Cannot handle value param entities or frame type entities here.
66 * Must be lowered by the backend.
68 if (is_value_param_type(owner) || is_frame_type(owner))
71 dbg = get_irn_dbg_info(sel);
72 mode = get_irn_mode(sel);
74 mode_Int = get_reference_mode_signed_eq(mode);
76 /* TLS access, must be handled by the linker */
77 if (get_tls_type() == owner) {
81 bl = get_nodes_block(sel);
83 cnst = new_rd_SymConst(dbg, irg, mode, sym, symconst_addr_ent);
84 newn = new_rd_Add(dbg, bl, ptr, cnst, mode);
88 assert(get_type_state(get_entity_owner(ent)) == layout_fixed);
89 assert(get_type_state(get_entity_type(ent)) == layout_fixed);
91 bl = get_nodes_block(sel);
92 if (0 < get_Sel_n_indexs(sel)) {
94 basetyp = get_entity_type(ent);
95 if (is_Primitive_type(basetyp))
96 basemode = get_type_mode(basetyp);
98 basemode = mode_P_data;
100 assert(basemode && "no mode for lowering Sel");
101 assert((get_mode_size_bits(basemode) % 8 == 0) && "can not deal with unorthodox modes");
102 index = get_Sel_index(sel, 0);
104 if (is_Array_type(owner)) {
105 ir_type *arr_ty = owner;
106 int dims = get_array_n_dimensions(arr_ty);
107 int *map = ALLOCAN(int, dims);
111 assert(dims == get_Sel_n_indexs(sel)
112 && "array dimension must match number of indices of Sel node");
114 for (i = 0; i < dims; i++) {
115 int order = get_array_order(arr_ty, i);
117 assert(order < dims &&
118 "order of a dimension must be smaller than the arrays dim");
121 newn = get_Sel_ptr(sel);
123 /* Size of the array element */
124 tv = new_tarval_from_long(get_type_size_bytes(basetyp), mode_Int);
125 last_size = new_rd_Const(dbg, irg, tv);
128 * We compute the offset part of dimension d_i recursively
129 * with the the offset part of dimension d_{i-1}
131 * off_0 = sizeof(array_element_type);
132 * off_i = (u_i - l_i) * off_{i-1} ; i >= 1
134 * whereas u_i is the upper bound of the current dimension
135 * and l_i the lower bound of the current dimension.
137 for (i = dims - 1; i >= 0; i--) {
139 ir_node *lb, *ub, *elms, *n, *ind;
142 lb = get_array_lower_bound(arr_ty, dim);
143 ub = get_array_upper_bound(arr_ty, dim);
145 assert(irg == current_ir_graph);
146 if (! is_Unknown(lb))
147 lb = new_rd_Conv(dbg, bl, copy_const_value(get_irn_dbg_info(sel), lb), mode_Int);
151 if (! is_Unknown(ub))
152 ub = new_rd_Conv(dbg, bl, copy_const_value(get_irn_dbg_info(sel), ub), mode_Int);
157 * If the array has more than one dimension, lower and upper
158 * bounds have to be set in the non-last dimension.
161 assert(lb != NULL && "lower bound has to be set in multi-dim array");
162 assert(ub != NULL && "upper bound has to be set in multi-dim array");
164 /* Elements in one Dimension */
165 elms = new_rd_Sub(dbg, bl, ub, lb, mode_Int);
168 ind = new_rd_Conv(dbg, bl, get_Sel_index(sel, dim), mode_Int);
171 * Normalize index, id lower bound is set, also assume
175 ind = new_rd_Sub(dbg, bl, ind, lb, mode_Int);
177 n = new_rd_Mul(dbg, bl, ind, last_size, mode_Int);
183 last_size = new_rd_Mul(dbg, bl, last_size, elms, mode_Int);
185 newn = new_rd_Add(dbg, bl, newn, n, mode);
189 ir_mode *idx_mode = get_irn_mode(index);
190 tarval *tv = new_tarval_from_long(get_mode_size_bytes(basemode), idx_mode);
192 newn = new_rd_Add(dbg, bl, get_Sel_ptr(sel),
193 new_rd_Mul(dbg, bl, index,
194 new_r_Const(irg, tv),
198 } else if (is_Method_type(get_entity_type(ent)) &&
199 is_Class_type(owner) &&
200 (owner != get_glob_type()) &&
201 (!is_frame_type(owner))) {
203 ir_mode *ent_mode = get_type_mode(get_entity_type(ent));
205 /* We need an additional load when accessing methods from a dispatch table. */
206 tv = new_tarval_from_long(get_entity_offset(ent), mode_Int);
207 cnst = new_rd_Const(dbg, irg, tv);
208 add = new_rd_Add(dbg, bl, get_Sel_ptr(sel), cnst, mode);
209 #ifdef DO_CACHEOPT /* cacheopt version */
210 newn = new_rd_Load(dbg, bl, get_Sel_mem(sel), sel, ent_mode, 0);
211 cacheopt_map_addrs_register_node(newn);
212 set_Load_ptr(newn, add);
213 #else /* normal code */
214 newn = new_rd_Load(dbg, bl, get_Sel_mem(sel), add, ent_mode, 0);
216 newn = new_r_Proj(bl, newn, ent_mode, pn_Load_res);
218 } else if (get_entity_owner(ent) != get_glob_type()) {
221 /* replace Sel by add(obj, const(ent.offset)) */
222 newn = get_Sel_ptr(sel);
223 offset = get_entity_offset(ent);
225 ir_mode *mode_UInt = get_reference_mode_unsigned_eq(mode);
227 tv = new_tarval_from_long(offset, mode_UInt);
228 cnst = new_r_Const(irg, tv);
229 newn = new_rd_Add(dbg, bl, newn, cnst, mode);
233 newn = new_rd_SymConst_addr_ent(NULL, irg, mode, ent, firm_unknown_type);
243 * Lower a all possible SymConst nodes.
245 static void lower_symconst(ir_node *symc)
254 switch (get_SymConst_kind(symc)) {
255 case symconst_type_tag:
256 assert(!"SymConst kind symconst_type_tag not implemented");
258 case symconst_type_size:
259 /* rewrite the SymConst node by a Const node */
260 tp = get_SymConst_type(symc);
261 assert(get_type_state(tp) == layout_fixed);
262 mode = get_irn_mode(symc);
263 newn = new_Const_long(mode, get_type_size_bytes(tp));
267 exchange(symc, newn);
269 case symconst_type_align:
270 /* rewrite the SymConst node by a Const node */
271 tp = get_SymConst_type(symc);
272 assert(get_type_state(tp) == layout_fixed);
273 mode = get_irn_mode(symc);
274 newn = new_Const_long(mode, get_type_alignment_bytes(tp));
278 exchange(symc, newn);
280 case symconst_addr_ent:
283 case symconst_ofs_ent:
284 /* rewrite the SymConst node by a Const node */
285 ent = get_SymConst_entity(symc);
286 assert(get_type_state(get_entity_type(ent)) == layout_fixed);
287 mode = get_irn_mode(symc);
288 newn = new_Const_long(mode, get_entity_offset(ent));
292 exchange(symc, newn);
294 case symconst_enum_const:
295 /* rewrite the SymConst node by a Const node */
296 ec = get_SymConst_enum(symc);
297 assert(get_type_state(get_enumeration_owner(ec)) == layout_fixed);
298 tv = get_enumeration_value(ec);
299 newn = new_Const(tv);
303 exchange(symc, newn);
307 assert(!"unknown SymConst kind");
310 } /* lower_symconst */
313 * Checks, whether a size is an integral size
315 * @param size the size on bits
317 static int is_integral_size(int size)
322 /* must be at least byte size */
324 } /* is_integral_size */
327 * lower bitfield load access.
329 * @param proj the Proj(result) node
330 * @param load the Load node
332 static void lower_bitfields_loads(ir_node *proj, ir_node *load)
334 ir_node *sel = get_Load_ptr(load);
335 ir_node *block, *n_proj, *res, *ptr;
338 ir_mode *bf_mode, *mode;
339 int offset, bit_offset, bits, bf_bits, old_cse;
345 ent = get_Sel_entity(sel);
346 bf_type = get_entity_type(ent);
348 /* must be a bitfield type */
349 if (!is_Primitive_type(bf_type) || get_primitive_base_type(bf_type) == NULL)
352 /* We have a bitfield access, if either a bit offset is given, or
353 the size is not integral. */
354 bf_mode = get_type_mode(bf_type);
358 mode = get_irn_mode(proj);
359 block = get_nodes_block(proj);
360 bf_bits = get_mode_size_bits(bf_mode);
361 bit_offset = get_entity_offset_bits_remainder(ent);
363 if (bit_offset == 0 && is_integral_size(bf_bits) && bf_mode == get_Load_mode(load))
366 bits = get_mode_size_bits(mode);
367 offset = get_entity_offset(ent);
370 * ok, here we are: now convert the Proj_mode_bf(Load) into And(Shr(Proj_mode(Load)) for unsigned
371 * and Shr(Shl(Proj_mode(load)) for signed
374 /* abandon bitfield sel */
375 ptr = get_Sel_ptr(sel);
376 db = get_irn_dbg_info(sel);
377 ptr = new_rd_Add(db, block, ptr, new_Const_long(mode_Is, offset), get_irn_mode(ptr));
379 set_Load_ptr(load, ptr);
380 set_Load_mode(load, mode);
383 /* create new proj, switch off CSE or we may get the old one back */
384 old_cse = get_opt_cse();
386 res = n_proj = new_r_Proj(block, load, mode, pn_Load_res);
387 set_opt_cse(old_cse);
389 if (mode_is_signed(mode)) { /* signed */
390 int shift_count_up = bits - (bf_bits + bit_offset);
391 int shift_count_down = bits - bf_bits;
393 if (shift_count_up) {
394 res = new_r_Shl(block, res, new_Const_long(mode_Iu, shift_count_up), mode);
396 if (shift_count_down) {
397 res = new_r_Shrs(block, res, new_Const_long(mode_Iu, shift_count_down), mode);
399 } else { /* unsigned */
400 int shift_count_down = bit_offset;
401 unsigned mask = ((unsigned)-1) >> (bits - bf_bits);
403 if (shift_count_down) {
404 res = new_r_Shr(block, res, new_Const_long(mode_Iu, shift_count_down), mode);
406 if (bits != bf_bits) {
407 res = new_r_And(block, res, new_Const_long(mode, mask), mode);
412 } /* lower_bitfields_loads */
415 * lower bitfield store access.
417 * @todo: It adds a load which may produce an exception!
419 static void lower_bitfields_stores(ir_node *store)
421 ir_node *sel = get_Store_ptr(store);
422 ir_node *ptr, *value;
425 ir_mode *bf_mode, *mode;
426 ir_node *mem, *irn, *block;
427 unsigned mask, neg_mask;
428 int bf_bits, bits_mask, offset, bit_offset;
431 /* check bitfield access */
435 ent = get_Sel_entity(sel);
436 bf_type = get_entity_type(ent);
438 /* must be a bitfield type */
439 if (!is_Primitive_type(bf_type) || get_primitive_base_type(bf_type) == NULL)
442 /* We have a bitfield access, if either a bit offset is given, or
443 the size is not integral. */
444 bf_mode = get_type_mode(bf_type);
448 value = get_Store_value(store);
449 mode = get_irn_mode(value);
450 block = get_nodes_block(store);
452 bf_bits = get_mode_size_bits(bf_mode);
453 bit_offset = get_entity_offset_bits_remainder(ent);
455 if (bit_offset == 0 && is_integral_size(bf_bits) && bf_mode == get_irn_mode(value))
459 * ok, here we are: now convert the Store(Sel(), value) into Or(And(Load(Sel),c), And(Value,c))
461 mem = get_Store_mem(store);
462 offset = get_entity_offset(ent);
464 bits_mask = get_mode_size_bits(mode) - bf_bits;
465 mask = ((unsigned)-1) >> bits_mask;
469 /* abandon bitfield sel */
470 ptr = get_Sel_ptr(sel);
471 db = get_irn_dbg_info(sel);
472 ptr = new_rd_Add(db, block, ptr, new_Const_long(mode_Is, offset), get_irn_mode(ptr));
475 /* there are some bits, normal case */
476 irn = new_r_Load( block, mem, ptr, mode, 0);
477 mem = new_r_Proj( block, irn, mode_M, pn_Load_M);
478 irn = new_r_Proj( block, irn, mode, pn_Load_res);
480 irn = new_r_And(block, irn, new_Const_long(mode, neg_mask), mode);
482 if (bit_offset > 0) {
483 value = new_r_Shl(block, value, new_Const_long(mode_Iu, bit_offset), mode);
486 value = new_r_And(block, value, new_Const_long(mode, mask), mode);
488 value = new_r_Or(block, value, irn, mode);
491 set_Store_mem(store, mem);
492 set_Store_value(store, value);
493 set_Store_ptr(store, ptr);
494 } /* lower_bitfields_stores */
497 * Lowers unaligned Loads.
499 static void lower_unaligned_Load(ir_node *load)
506 * Lowers unaligned Stores
508 static void lower_unaligned_Store(ir_node *store)
515 * lowers IR-nodes, called from walker
517 static void lower_irnode(ir_node *irn, void *env)
520 switch (get_irn_opcode(irn)) {
528 if (env != NULL && get_Load_align(irn) == align_non_aligned)
529 lower_unaligned_Load(irn);
532 if (env != NULL && get_Store_align(irn) == align_non_aligned)
533 lower_unaligned_Store(irn);
536 exchange(irn, get_Cast_op(irn));
544 * Walker: lowers IR-nodes for bitfield access
546 static void lower_bf_access(ir_node *irn, void *env)
549 switch (get_irn_opcode(irn)) {
552 long proj = get_Proj_proj(irn);
553 ir_node *pred = get_Proj_pred(irn);
555 if (proj == pn_Load_res && is_Load(pred))
556 lower_bitfields_loads(irn, pred);
560 lower_bitfields_stores(irn);
569 * Replaces SymConsts by a real constant if possible.
570 * Replace Sel nodes by address computation. Also resolves array access.
571 * Handle Bitfields by added And/Or calculations.
573 void lower_highlevel_graph(ir_graph *irg, int lower_bitfields)
575 if (lower_bitfields) {
576 /* First step: lower bitfield access: must be run as long as Sels still
578 irg_walk_graph(irg, NULL, lower_bf_access, NULL);
581 /* Finally: lower SymConst-Size and Sel nodes, Casts, unaligned Load/Stores. */
582 irg_walk_graph(irg, NULL, lower_irnode, NULL);
584 set_irg_outs_inconsistent(irg);
588 ir_graph_pass_t pass;
593 * Wrapper for running lower_highlevel_graph() as an ir_graph pass.
595 static int lower_highlevel_graph_wrapper(ir_graph *irg, void *context)
597 struct pass_t *pass = context;
599 lower_highlevel_graph(irg, pass->lower_bitfields);
601 } /* lower_highlevel_graph_wrapper */
603 ir_graph_pass_t *lower_highlevel_graph_pass(const char *name, int lower_bitfields)
605 struct pass_t *pass = XMALLOCZ(struct pass_t);
607 pass->lower_bitfields = lower_bitfields;
608 return def_graph_pass_constructor(
609 &pass->pass, name ? name : "lower_hl", lower_highlevel_graph_wrapper);
610 } /* lower_highlevel_graph_pass */
613 * does the same as lower_highlevel() for all nodes on the const code irg
615 void lower_const_code(void)
617 walk_const_code(NULL, lower_irnode, NULL);
618 } /* lower_const_code */
620 ir_prog_pass_t *lower_const_code_pass(const char *name)
622 return def_prog_pass(name ? name : "lower_const_code", lower_const_code);
626 * Replaces SymConsts by a real constant if possible.
627 * Replace Sel nodes by address computation. Also resolves array access.
628 * Handle Bitfields by added And/Or calculations.
630 void lower_highlevel(int lower_bitfields)
634 n = get_irp_n_irgs();
635 for (i = 0; i < n; ++i) {
636 ir_graph *irg = get_irp_irg(i);
637 lower_highlevel_graph(irg, lower_bitfields);
640 } /* lower_highlevel */