nsz Git - libfirm/blob - ir/lower/lower_dw.c

   1 /*
   2  * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
   3  *
   4  * This file is part of libFirm.
   5  *
   6  * This file may be distributed and/or modified under the terms of the
   7  * GNU General Public License version 2 as published by the Free Software
   8  * Foundation and appearing in the file LICENSE.GPL included in the
   9  * packaging of this file.
  10  *
  11  * Licensees holding valid libFirm Professional Edition licenses may use
  12  * this file in accordance with the libFirm Commercial License.
  13  * Agreement provided with the Software.
  14  *
  15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
  16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE.
  18  */
  19
  20 /**
  21  * @file
  22  * @brief   Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
  23  * @date    8.10.2004
  24  * @author  Michael Beck
  25  * @version $Id$
  26  */
  27 #include "config.h"
  28
  29 #ifdef HAVE_STRING_H
  30 # include <string.h>
  31 #endif
  32 #include <stdlib.h>
  33 #include <assert.h>
  34
  35 #include "error.h"
  36 #include "lowering.h"
  37 #include "irnode_t.h"
  38 #include "irgraph_t.h"
  39 #include "irmode_t.h"
  40 #include "iropt_t.h"
  41 #include "irgmod.h"
  42 #include "tv_t.h"
  43 #include "dbginfo_t.h"
  44 #include "iropt_dbg.h"
  45 #include "irflag_t.h"
  46 #include "firmstat.h"
  47 #include "irgwalk.h"
  48 #include "ircons.h"
  49 #include "irflag.h"
  50 #include "irtools.h"
  51 #include "debug.h"
  52 #include "set.h"
  53 #include "pmap.h"
  54 #include "pdeq.h"
  55 #include "irdump.h"
  56 #include "array_t.h"
  57
  58 /** A map from mode to a primitive type. */
  59 static pmap *prim_types;
  60
  61 /** A map from (op, imode, omode) to Intrinsic functions entities. */
  62 static set *intrinsic_fkt;
  63
  64 /** A map from (imode, omode) to conv function types. */
  65 static set *conv_types;
  66
  67 /** A map from a method type to its lowered type. */
  68 static pmap *lowered_type;
  69
  70 /** The types for the binop and unop intrinsics. */
  71 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
  72
  73 /** the debug handle */
  74 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
  75
  76 /**
  77  * An entry in the (op, imode, omode) -> entity map.
  78  */
  79 typedef struct _op_mode_entry {
  80         const ir_op   *op;    /**< the op */
  81         const ir_mode *imode; /**< the input mode */
  82         const ir_mode *omode; /**< the output mode */
  83         ir_entity     *ent;   /**< the associated entity of this (op, imode, omode) triple */
  84 } op_mode_entry_t;
  85
  86 /**
  87  * An entry in the (imode, omode) -> tp map.
  88  */
  89 typedef struct _conv_tp_entry {
  90         const ir_mode *imode; /**< the input mode */
  91         const ir_mode *omode; /**< the output mode */
  92         ir_type       *mtd;   /**< the associated method type of this (imode, omode) pair */
  93 } conv_tp_entry_t;
  94
  95 /**
  96  * Every double word node will be replaced,
  97  * we need some store to hold the replacement:
  98  */
  99 typedef struct _node_entry_t {
 100         ir_node *low_word;    /**< the low word */
 101         ir_node *high_word;   /**< the high word */
 102 } node_entry_t;
 103
 104 enum lower_flags {
 105         MUST_BE_LOWERED = 1,  /**< graph must be lowered */
 106         CF_CHANGED      = 2,  /**< control flow was changed */
 107 };
 108
 109 /**
 110  * The lower environment.
 111  */
 112 typedef struct _lower_env_t {
 113         node_entry_t **entries;       /**< entries per node */
 114         struct obstack obst;          /**< an obstack holding the temporary data */
 115         tarval   *tv_mode_bytes;      /**< a tarval containing the number of bytes in the lowered modes */
 116         tarval   *tv_mode_bits;       /**< a tarval containing the number of bits in the lowered modes */
 117         pdeq     *waitq;              /**< a wait queue of all nodes that must be handled later */
 118         pmap     *proj_2_block;       /**< a map from ProjX to its destination blocks */
 119         const lwrdw_param_t *params;  /**< transformation parameter */
 120         unsigned flags;               /**< some flags */
 121         int      n_entries;           /**< number of entries */
 122 } lower_env_t;
 123
 124 /**
 125  * Get a primitive mode for a mode.
 126  */
 127 static ir_type *get_primitive_type(ir_mode *mode) {
 128         pmap_entry *entry = pmap_find(prim_types, mode);
 129         ir_type *tp;
 130         char buf[64];
 131
 132         if (entry)
 133                 return entry->value;
 134
 135         snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
 136         tp = new_type_primitive(new_id_from_str(buf), mode);
 137
 138         pmap_insert(prim_types, mode, tp);
 139         return tp;
 140 }  /* get_primitive_type */
 141
 142 /**
 143  * Create a method type for a Conv emulation from imode to omode.
 144  */
 145 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
 146         conv_tp_entry_t key, *entry;
 147         ir_type *mtd;
 148
 149         key.imode = imode;
 150         key.omode = omode;
 151         key.mtd   = NULL;
 152
 153         entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
 154         if (! entry->mtd) {
 155                 int n_param = 1, n_res = 1;
 156                 char buf[64];
 157
 158                 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
 159                         n_param = 2;
 160                 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
 161                         n_res = 2;
 162
 163                 /* create a new one */
 164                 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
 165                 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
 166
 167                 /* set param types and result types */
 168                 n_param = 0;
 169                 if (imode == env->params->high_signed) {
 170                         set_method_param_type(mtd, n_param++, tp_u);
 171                         set_method_param_type(mtd, n_param++, tp_s);
 172                 } else if (imode == env->params->high_unsigned) {
 173                         set_method_param_type(mtd, n_param++, tp_u);
 174                         set_method_param_type(mtd, n_param++, tp_u);
 175                 } else {
 176                         ir_type *tp = get_primitive_type(imode);
 177                         set_method_param_type(mtd, n_param++, tp);
 178                 }  /* if */
 179
 180                 n_res = 0;
 181                 if (omode == env->params->high_signed) {
 182                         set_method_res_type(mtd, n_res++, tp_u);
 183                         set_method_res_type(mtd, n_res++, tp_s);
 184                 } else if (omode == env->params->high_unsigned) {
 185                         set_method_res_type(mtd, n_res++, tp_u);
 186                         set_method_res_type(mtd, n_res++, tp_u);
 187                 } else {
 188                         ir_type *tp = get_primitive_type(omode);
 189                         set_method_res_type(mtd, n_res++, tp);
 190                 }  /* if */
 191                 entry->mtd = mtd;
 192         } else {
 193                 mtd = entry->mtd;
 194         }  /* if */
 195         return mtd;
 196 }  /* get_conv_type */
 197
 198 /**
 199  * Add an additional control flow input to a block.
 200  * Patch all Phi nodes. The new Phi inputs are copied from
 201  * old input number nr.
 202  */
 203 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
 204 {
 205         int i, arity = get_irn_arity(block);
 206         ir_node **in, *phi;
 207
 208         assert(nr < arity);
 209
 210         NEW_ARR_A(ir_node *, in, arity + 1);
 211         for (i = 0; i < arity; ++i)
 212                 in[i] = get_irn_n(block, i);
 213         in[i] = cf;
 214
 215         set_irn_in(block, i + 1, in);
 216
 217         for (phi = get_Block_phis(block); phi != NULL; phi = get_Phi_next(phi)) {
 218                 for (i = 0; i < arity; ++i)
 219                         in[i] = get_irn_n(phi, i);
 220                 in[i] = in[nr];
 221                 set_irn_in(phi, i + 1, in);
 222         }  /* for */
 223 }  /* add_block_cf_input_nr */
 224
 225 /**
 226  * Add an additional control flow input to a block.
 227  * Patch all Phi nodes. The new Phi inputs are copied from
 228  * old input from cf tmpl.
 229  */
 230 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
 231 {
 232         int i, arity = get_irn_arity(block);
 233         int nr = 0;
 234
 235         for (i = 0; i < arity; ++i) {
 236                 if (get_irn_n(block, i) == tmpl) {
 237                         nr = i;
 238                         break;
 239                 }  /* if */
 240         }  /* for */
 241         assert(i < arity);
 242         add_block_cf_input_nr(block, nr, cf);
 243 }  /* add_block_cf_input */
 244
 245 /**
 246  * Return the "operational" mode of a Firm node.
 247  */
 248 static ir_mode *get_irn_op_mode(ir_node *node)
 249 {
 250         switch (get_irn_opcode(node)) {
 251         case iro_Load:
 252                 return get_Load_mode(node);
 253         case iro_Store:
 254                 return get_irn_mode(get_Store_value(node));
 255         case iro_DivMod:
 256                 return get_irn_mode(get_DivMod_left(node));
 257         case iro_Div:
 258                 return get_irn_mode(get_Div_left(node));
 259         case iro_Mod:
 260                 return get_irn_mode(get_Mod_left(node));
 261         case iro_Cmp:
 262                 return get_irn_mode(get_Cmp_left(node));
 263         default:
 264                 return get_irn_mode(node);
 265         }  /* switch */
 266 }  /* get_irn_op_mode */
 267
 268 /**
 269  * Walker, prepare the node links.
 270  */
 271 static void prepare_links(ir_node *node, void *env)
 272 {
 273         lower_env_t  *lenv = env;
 274         ir_mode      *mode = get_irn_op_mode(node);
 275         node_entry_t *link;
 276         int          i, idx;
 277
 278         if (mode == lenv->params->high_signed ||
 279                 mode == lenv->params->high_unsigned) {
 280                 /* ok, found a node that will be lowered */
 281                 link = obstack_alloc(&lenv->obst, sizeof(*link));
 282
 283                 memset(link, 0, sizeof(*link));
 284
 285                 idx = get_irn_idx(node);
 286                 if (idx >= lenv->n_entries) {
 287                         /* enlarge: this happens only for Rotl nodes which is RARELY */
 288                         int old = lenv->n_entries;
 289                         int n_idx = idx + (idx >> 3);
 290
 291                         ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
 292                         memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
 293                         lenv->n_entries = n_idx;
 294                 }
 295                 lenv->entries[idx] = link;
 296                 lenv->flags |= MUST_BE_LOWERED;
 297         } else if (is_Conv(node)) {
 298                 /* Conv nodes have two modes */
 299                 ir_node *pred = get_Conv_op(node);
 300                 mode = get_irn_mode(pred);
 301
 302                 if (mode == lenv->params->high_signed ||
 303                         mode == lenv->params->high_unsigned) {
 304                         /* must lower this node either but don't need a link */
 305                         lenv->flags |= MUST_BE_LOWERED;
 306                 }  /* if */
 307                 return;
 308         }  /* if */
 309
 310         if (is_Proj(node)) {
 311                 /* link all Proj nodes to its predecessor:
 312                    Note that Tuple Proj's and its Projs are linked either. */
 313                 ir_node *pred = get_Proj_pred(node);
 314
 315                 set_irn_link(node, get_irn_link(pred));
 316                 set_irn_link(pred, node);
 317         } else if (is_Phi(node)) {
 318                 /* link all Phi nodes to its block */
 319                 ir_node *block = get_nodes_block(node);
 320                 add_Block_phi(block, node);
 321         } else if (is_Block(node)) {
 322                 /* fill the Proj -> Block map */
 323                 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
 324                         ir_node *pred = get_Block_cfgpred(node, i);
 325
 326                         if (is_Proj(pred))
 327                                 pmap_insert(lenv->proj_2_block, pred, node);
 328                 }  /* for */
 329         }  /* if */
 330 }  /* prepare_links */
 331
 332 /**
 333  * Translate a Constant: create two.
 334  */
 335 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
 336         tarval   *tv, *tv_l, *tv_h;
 337         ir_node  *low, *high;
 338         dbg_info *dbg = get_irn_dbg_info(node);
 339         int      idx;
 340         ir_graph *irg = current_ir_graph;
 341         ir_mode  *low_mode = env->params->low_unsigned;
 342
 343         tv   = get_Const_tarval(node);
 344
 345         tv_l = tarval_convert_to(tv, low_mode);
 346         low  = new_rd_Const(dbg, irg, tv_l);
 347
 348         tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
 349         high = new_rd_Const(dbg, irg, tv_h);
 350
 351         idx = get_irn_idx(node);
 352         assert(idx < env->n_entries);
 353         env->entries[idx]->low_word  = low;
 354         env->entries[idx]->high_word = high;
 355 }  /* lower_Const */
 356
 357 /**
 358  * Translate a Load: create two.
 359  */
 360 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
 361         ir_mode  *low_mode = env->params->low_unsigned;
 362         ir_graph *irg = current_ir_graph;
 363         ir_node  *adr = get_Load_ptr(node);
 364         ir_node  *mem = get_Load_mem(node);
 365         ir_node  *low, *high, *proj;
 366         dbg_info *dbg;
 367         ir_node  *block = get_nodes_block(node);
 368         int      idx;
 369
 370         if (env->params->little_endian) {
 371                 low  = adr;
 372                 high = new_r_Add(irg, block, adr,
 373                         new_r_Const(irg, env->tv_mode_bytes),
 374                         get_irn_mode(adr));
 375         } else {
 376                 low  = new_r_Add(irg, block, adr,
 377                         new_r_Const(irg, env->tv_mode_bytes),
 378                         get_irn_mode(adr));
 379                 high = adr;
 380         }  /* if */
 381
 382         /* create two loads */
 383         dbg  = get_irn_dbg_info(node);
 384         low  = new_rd_Load(dbg, irg, block, mem,  low,  low_mode);
 385         proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
 386         high = new_rd_Load(dbg, irg, block, proj, high, mode);
 387
 388         set_Load_volatility(low,  get_Load_volatility(node));
 389         set_Load_volatility(high, get_Load_volatility(node));
 390
 391         idx = get_irn_idx(node);
 392         assert(idx < env->n_entries);
 393         env->entries[idx]->low_word  = low;
 394         env->entries[idx]->high_word = high;
 395
 396         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 397                 idx = get_irn_idx(proj);
 398
 399                 switch (get_Proj_proj(proj)) {
 400                 case pn_Load_M:         /* Memory result. */
 401                         /* put it to the second one */
 402                         set_Proj_pred(proj, high);
 403                         break;
 404                 case pn_Load_X_except:  /* Execution result if exception occurred. */
 405                         /* put it to the first one */
 406                         set_Proj_pred(proj, low);
 407                         break;
 408                 case pn_Load_res:       /* Result of load operation. */
 409                         assert(idx < env->n_entries);
 410                         env->entries[idx]->low_word  = new_r_Proj(irg, block, low,  low_mode, pn_Load_res);
 411                         env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode,     pn_Load_res);
 412                         break;
 413                 default:
 414                         assert(0 && "unexpected Proj number");
 415                 }  /* switch */
 416                 /* mark this proj: we have handled it already, otherwise we might fall into
 417                  * out new nodes. */
 418                 mark_irn_visited(proj);
 419         }  /* for */
 420 }  /* lower_Load */
 421
 422 /**
 423  * Translate a Store: create two.
 424  */
 425 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
 426         ir_graph *irg;
 427         ir_node  *block, *adr, *mem;
 428         ir_node  *low, *high, *irn, *proj;
 429         dbg_info *dbg;
 430         int      idx;
 431         node_entry_t *entry;
 432         (void) node;
 433         (void) mode;
 434
 435         irn = get_Store_value(node);
 436         entry = env->entries[get_irn_idx(irn)];
 437         assert(entry);
 438
 439         if (! entry->low_word) {
 440                 /* not ready yet, wait */
 441                 pdeq_putr(env->waitq, node);
 442                 return;
 443         }  /* if */
 444
 445         irg = current_ir_graph;
 446         adr = get_Store_ptr(node);
 447         mem = get_Store_mem(node);
 448         block = get_nodes_block(node);
 449
 450         if (env->params->little_endian) {
 451                 low  = adr;
 452                 high = new_r_Add(irg, block, adr,
 453                         new_r_Const(irg, env->tv_mode_bytes),
 454                         get_irn_mode(adr));
 455         } else {
 456                 low  = new_r_Add(irg, block, adr,
 457                         new_r_Const(irg, env->tv_mode_bytes),
 458                         get_irn_mode(adr));
 459                 high = adr;
 460         }  /* if */
 461
 462         /* create two Stores */
 463         dbg = get_irn_dbg_info(node);
 464         low  = new_rd_Store(dbg, irg, block, mem, low,  entry->low_word);
 465         proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
 466         high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
 467
 468         set_Store_volatility(low,  get_Store_volatility(node));
 469         set_Store_volatility(high, get_Store_volatility(node));
 470
 471         idx = get_irn_idx(node);
 472         assert(idx < env->n_entries);
 473         env->entries[idx]->low_word  = low;
 474         env->entries[idx]->high_word = high;
 475
 476         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 477                 idx = get_irn_idx(proj);
 478
 479                 switch (get_Proj_proj(proj)) {
 480                 case pn_Store_M:         /* Memory result. */
 481                         /* put it to the second one */
 482                         set_Proj_pred(proj, high);
 483                         break;
 484                 case pn_Store_X_except:  /* Execution result if exception occurred. */
 485                         /* put it to the first one */
 486                         set_Proj_pred(proj, low);
 487                         break;
 488                 default:
 489                         assert(0 && "unexpected Proj number");
 490                 }  /* switch */
 491                 /* mark this proj: we have handled it already, otherwise we might fall into
 492                  * out new nodes. */
 493                 mark_irn_visited(proj);
 494         }  /* for */
 495 }  /* lower_Store */
 496
 497 /**
 498  * Return a node containing the address of the intrinsic emulation function.
 499  *
 500  * @param method  the method type of the emulation function
 501  * @param op      the emulated ir_op
 502  * @param imode   the input mode of the emulated opcode
 503  * @param omode   the output mode of the emulated opcode
 504  * @param block   where the new mode is created
 505  * @param env     the lower environment
 506  */
 507 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
 508                                       ir_mode *imode, ir_mode *omode,
 509                                       ir_node *block, lower_env_t *env) {
 510         symconst_symbol sym;
 511         ir_entity *ent;
 512         op_mode_entry_t key, *entry;
 513
 514         key.op    = op;
 515         key.imode = imode;
 516         key.omode = omode;
 517         key.ent   = NULL;
 518
 519         entry = set_insert(intrinsic_fkt, &key, sizeof(key),
 520                                 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
 521         if (! entry->ent) {
 522                 /* create a new one */
 523                 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
 524
 525                 assert(ent && "Intrinsic creator must return an entity");
 526                 entry->ent = ent;
 527         } else {
 528                 ent = entry->ent;
 529         }  /* if */
 530         sym.entity_p = ent;
 531         return new_r_SymConst(current_ir_graph, block, mode_P_code, sym, symconst_addr_ent);
 532 }  /* get_intrinsic_address */
 533
 534 /**
 535  * Translate a Div.
 536  *
 537  * Create an intrinsic Call.
 538  */
 539 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
 540         ir_node  *block, *irn, *call, *proj;
 541         ir_node  *in[4];
 542         ir_mode  *opmode;
 543         dbg_info *dbg;
 544         ir_type  *mtp;
 545         int      idx;
 546         ir_graph *irg;
 547         node_entry_t *entry;
 548
 549         irn   = get_Div_left(node);
 550         entry = env->entries[get_irn_idx(irn)];
 551         assert(entry);
 552
 553         if (! entry->low_word) {
 554                 /* not ready yet, wait */
 555                 pdeq_putr(env->waitq, node);
 556                 return;
 557         }  /* if */
 558
 559         in[0] = entry->low_word;
 560         in[1] = entry->high_word;
 561
 562         irn   = get_Div_right(node);
 563         entry = env->entries[get_irn_idx(irn)];
 564         assert(entry);
 565
 566         if (! entry->low_word) {
 567                 /* not ready yet, wait */
 568                 pdeq_putr(env->waitq, node);
 569                 return;
 570         }  /* if */
 571
 572         in[2] = entry->low_word;
 573         in[3] = entry->high_word;
 574
 575         dbg   = get_irn_dbg_info(node);
 576         block = get_nodes_block(node);
 577         irg   = current_ir_graph;
 578
 579         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 580         opmode = get_irn_op_mode(node);
 581         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
 582         call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
 583                 irn, 4, in, mtp);
 584         set_irn_pinned(call, get_irn_pinned(node));
 585         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
 586
 587         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 588                 switch (get_Proj_proj(proj)) {
 589                 case pn_Div_M:         /* Memory result. */
 590                         /* reroute to the call */
 591                         set_Proj_pred(proj, call);
 592                         set_Proj_proj(proj, pn_Call_M_except);
 593                         break;
 594                 case pn_Div_X_except:  /* Execution result if exception occurred. */
 595                         /* reroute to the call */
 596                         set_Proj_pred(proj, call);
 597                         set_Proj_proj(proj, pn_Call_X_except);
 598                         break;
 599                 case pn_Div_res:       /* Result of computation. */
 600                         idx = get_irn_idx(proj);
 601                         assert(idx < env->n_entries);
 602                         env->entries[idx]->low_word  = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
 603                         env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode,                      1);
 604                         break;
 605                 default:
 606                         assert(0 && "unexpected Proj number");
 607                 }  /* switch */
 608                 /* mark this proj: we have handled it already, otherwise we might fall into
 609                  * out new nodes. */
 610                 mark_irn_visited(proj);
 611         }  /* for */
 612 }  /* lower_Div */
 613
 614 /**
 615  * Translate a Mod.
 616  *
 617  * Create an intrinsic Call.
 618  */
 619 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
 620         ir_node  *block, *proj, *irn, *call;
 621         ir_node  *in[4];
 622         ir_mode  *opmode;
 623         dbg_info *dbg;
 624         ir_type  *mtp;
 625         int      idx;
 626         ir_graph *irg;
 627         node_entry_t *entry;
 628
 629         irn   = get_Mod_left(node);
 630         entry = env->entries[get_irn_idx(irn)];
 631         assert(entry);
 632
 633         if (! entry->low_word) {
 634                 /* not ready yet, wait */
 635                 pdeq_putr(env->waitq, node);
 636                 return;
 637         }  /* if */
 638
 639         in[0] = entry->low_word;
 640         in[1] = entry->high_word;
 641
 642         irn   = get_Mod_right(node);
 643         entry = env->entries[get_irn_idx(irn)];
 644         assert(entry);
 645
 646         if (! entry->low_word) {
 647                 /* not ready yet, wait */
 648                 pdeq_putr(env->waitq, node);
 649                 return;
 650         }  /* if */
 651
 652         in[2] = entry->low_word;
 653         in[3] = entry->high_word;
 654
 655         dbg   = get_irn_dbg_info(node);
 656         block = get_nodes_block(node);
 657         irg   = current_ir_graph;
 658
 659         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 660         opmode = get_irn_op_mode(node);
 661         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
 662         call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
 663                 irn, 4, in, mtp);
 664         set_irn_pinned(call, get_irn_pinned(node));
 665         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
 666
 667         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 668                 switch (get_Proj_proj(proj)) {
 669                 case pn_Mod_M:         /* Memory result. */
 670                         /* reroute to the call */
 671                         set_Proj_pred(proj, call);
 672                         set_Proj_proj(proj, pn_Call_M_except);
 673                         break;
 674                 case pn_Mod_X_except:  /* Execution result if exception occurred. */
 675                         /* reroute to the call */
 676                         set_Proj_pred(proj, call);
 677                         set_Proj_proj(proj, pn_Call_X_except);
 678                         break;
 679                 case pn_Mod_res:       /* Result of computation. */
 680                         idx = get_irn_idx(proj);
 681                         assert(idx < env->n_entries);
 682                         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 683                         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 684                         break;
 685                 default:
 686                         assert(0 && "unexpected Proj number");
 687                 }  /* switch */
 688                 /* mark this proj: we have handled it already, otherwise we might fall into
 689                  * out new nodes. */
 690                 mark_irn_visited(proj);
 691         }  /* for */
 692 }  /* lower_Mod */
 693
 694 /**
 695  * Translate a DivMod.
 696  *
 697  * Create two intrinsic Calls.
 698  */
 699 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
 700         ir_node  *block, *proj, *irn, *mem, *callDiv, *callMod;
 701         ir_node  *resDiv = NULL;
 702         ir_node  *resMod = NULL;
 703         ir_node  *in[4];
 704         ir_mode  *opmode;
 705         dbg_info *dbg;
 706         ir_type  *mtp;
 707         int      idx;
 708         node_entry_t *entry;
 709         unsigned flags = 0;
 710         ir_graph *irg;
 711
 712         /* check if both results are needed */
 713         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 714                 switch (get_Proj_proj(proj)) {
 715                 case pn_DivMod_res_div: flags |= 1; break;
 716                 case pn_DivMod_res_mod: flags |= 2; break;
 717                 default: break;
 718                 }  /* switch */
 719         }  /* for */
 720
 721         irn   = get_DivMod_left(node);
 722         entry = env->entries[get_irn_idx(irn)];
 723         assert(entry);
 724
 725         if (! entry->low_word) {
 726                 /* not ready yet, wait */
 727                 pdeq_putr(env->waitq, node);
 728                 return;
 729         }  /* if */
 730
 731         in[0] = entry->low_word;
 732         in[1] = entry->high_word;
 733
 734         irn   = get_DivMod_right(node);
 735         entry = env->entries[get_irn_idx(irn)];
 736         assert(entry);
 737
 738         if (! entry->low_word) {
 739                 /* not ready yet, wait */
 740                 pdeq_putr(env->waitq, node);
 741                 return;
 742         }  /* if */
 743
 744         in[2] = entry->low_word;
 745         in[3] = entry->high_word;
 746
 747         dbg   = get_irn_dbg_info(node);
 748         block = get_nodes_block(node);
 749         irg   = current_ir_graph;
 750
 751         mem = get_DivMod_mem(node);
 752
 753         callDiv = callMod = NULL;
 754         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 755         if (flags & 1) {
 756                 opmode = get_irn_op_mode(node);
 757                 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
 758                 callDiv = new_rd_Call(dbg, irg, block, mem,
 759                         irn, 4, in, mtp);
 760                 set_irn_pinned(callDiv, get_irn_pinned(node));
 761                 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
 762         }  /* if */
 763         if (flags & 2) {
 764                 if (flags & 1)
 765                         mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
 766                 opmode = get_irn_op_mode(node);
 767                 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
 768                 callMod = new_rd_Call(dbg, irg, block, mem,
 769                         irn, 4, in, mtp);
 770                 set_irn_pinned(callMod, get_irn_pinned(node));
 771                 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
 772         }  /* if */
 773
 774         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 775                 switch (get_Proj_proj(proj)) {
 776                 case pn_DivMod_M:         /* Memory result. */
 777                         /* reroute to the first call */
 778                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
 779                         set_Proj_proj(proj, pn_Call_M_except);
 780                         break;
 781                 case pn_DivMod_X_except:  /* Execution result if exception occurred. */
 782                         /* reroute to the first call */
 783                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
 784                         set_Proj_proj(proj, pn_Call_X_except);
 785                         break;
 786                 case pn_DivMod_res_div:   /* Result of Div. */
 787                         idx = get_irn_idx(proj);
 788                         assert(idx < env->n_entries);
 789                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
 790                         env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode,                      1);
 791                         break;
 792                 case pn_DivMod_res_mod:   /* Result of Mod. */
 793                         idx = get_irn_idx(proj);
 794                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
 795                         env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode,                      1);
 796                         break;
 797                 default:
 798                         assert(0 && "unexpected Proj number");
 799                 }  /* switch */
 800                 /* mark this proj: we have handled it already, otherwise we might fall into
 801                  * out new nodes. */
 802                 mark_irn_visited(proj);
 803         }  /* for */
 804 }  /* lower_DivMod */
 805
 806 /**
 807  * Translate a Binop.
 808  *
 809  * Create an intrinsic Call.
 810  */
 811 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
 812         ir_node  *block, *irn;
 813         ir_node  *in[4];
 814         dbg_info *dbg;
 815         ir_type  *mtp;
 816         int      idx;
 817         ir_graph *irg;
 818         node_entry_t *entry;
 819
 820         irn   = get_binop_left(node);
 821         entry = env->entries[get_irn_idx(irn)];
 822         assert(entry);
 823
 824         if (! entry->low_word) {
 825                 /* not ready yet, wait */
 826                 pdeq_putr(env->waitq, node);
 827                 return;
 828         }  /* if */
 829
 830         in[0] = entry->low_word;
 831         in[1] = entry->high_word;
 832
 833         irn   = get_binop_right(node);
 834         entry = env->entries[get_irn_idx(irn)];
 835         assert(entry);
 836
 837         if (! entry->low_word) {
 838                 /* not ready yet, wait */
 839                 pdeq_putr(env->waitq, node);
 840                 return;
 841         }  /* if */
 842
 843         in[2] = entry->low_word;
 844         in[3] = entry->high_word;
 845
 846         dbg   = get_irn_dbg_info(node);
 847         block = get_nodes_block(node);
 848         irg   = current_ir_graph;
 849
 850         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 851         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
 852         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
 853                 irn, 4, in, mtp);
 854         set_irn_pinned(irn, get_irn_pinned(node));
 855         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
 856
 857         idx = get_irn_idx(node);
 858         assert(idx < env->n_entries);
 859         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 860         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 861 }  /* lower_Binop */
 862
 863 /**
 864  * Translate a Shiftop.
 865  *
 866  * Create an intrinsic Call.
 867  */
 868 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
 869         ir_node  *block, *irn;
 870         ir_node  *in[3];
 871         dbg_info *dbg;
 872         ir_type  *mtp;
 873         int      idx;
 874         ir_graph *irg;
 875         node_entry_t *entry;
 876
 877         irn   = get_binop_left(node);
 878         entry = env->entries[get_irn_idx(irn)];
 879         assert(entry);
 880
 881         if (! entry->low_word) {
 882                 /* not ready yet, wait */
 883                 pdeq_putr(env->waitq, node);
 884                 return;
 885         }  /* if */
 886
 887         in[0] = entry->low_word;
 888         in[1] = entry->high_word;
 889
 890         /* The shift count is always mode_Iu in firm, so there is no need for lowering */
 891         in[2] = get_binop_right(node);
 892
 893         dbg   = get_irn_dbg_info(node);
 894         block = get_nodes_block(node);
 895         irg  = current_ir_graph;
 896
 897         mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
 898         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
 899         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
 900                 irn, 3, in, mtp);
 901         set_irn_pinned(irn, get_irn_pinned(node));
 902         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
 903
 904         idx = get_irn_idx(node);
 905         assert(idx < env->n_entries);
 906         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 907         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 908 }  /* lower_Shiftop */
 909
 910 /**
 911  * Translate a Shr and handle special cases.
 912  */
 913 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
 914         ir_node  *right = get_Shr_right(node);
 915         ir_graph *irg = current_ir_graph;
 916
 917         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 918                 tarval *tv = get_Const_tarval(right);
 919
 920                 if (tarval_is_long(tv) &&
 921                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 922                         ir_node *block = get_nodes_block(node);
 923                         ir_node *left = get_Shr_left(node);
 924                         ir_node *c;
 925                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 926                         int idx = get_irn_idx(left);
 927
 928                         left = env->entries[idx]->high_word;
 929                         idx = get_irn_idx(node);
 930
 931                         if (shf_cnt > 0) {
 932                                 c = new_r_Const_long(irg, env->params->low_unsigned, shf_cnt);
 933                                 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
 934                         } else {
 935                                 env->entries[idx]->low_word = left;
 936                         }  /* if */
 937                         env->entries[idx]->high_word = new_r_Const(irg, get_mode_null(mode));
 938
 939                         return;
 940                 }  /* if */
 941         }  /* if */
 942         lower_Shiftop(node, mode, env);
 943 }  /* lower_Shr */
 944
 945 /**
 946  * Translate a Shl and handle special cases.
 947  */
 948 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
 949         ir_node  *right = get_Shl_right(node);
 950         ir_graph *irg = current_ir_graph;
 951
 952         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 953                 tarval *tv = get_Const_tarval(right);
 954
 955                 if (tarval_is_long(tv) &&
 956                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 957                         ir_mode *mode_l;
 958                         ir_node *block = get_nodes_block(node);
 959                         ir_node *left = get_Shl_left(node);
 960                         ir_node *c;
 961                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 962                         int idx = get_irn_idx(left);
 963
 964                         left = new_r_Conv(irg, block, env->entries[idx]->low_word, mode);
 965                         idx = get_irn_idx(node);
 966
 967                         mode_l = env->params->low_unsigned;
 968                         if (shf_cnt > 0) {
 969                                 c = new_r_Const_long(irg, mode_l, shf_cnt);
 970                                 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
 971                         } else {
 972                                 env->entries[idx]->high_word = left;
 973                         }  /* if */
 974                         env->entries[idx]->low_word  = new_r_Const(irg, get_mode_null(mode_l));
 975
 976                         return;
 977                 }  /* if */
 978         }  /* if */
 979         lower_Shiftop(node, mode, env);
 980 }  /* lower_Shl */
 981
 982 /**
 983  * Translate a Shrs and handle special cases.
 984  */
 985 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
 986         ir_node  *right = get_Shrs_right(node);
 987         ir_graph *irg = current_ir_graph;
 988
 989         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 990                 tarval *tv = get_Const_tarval(right);
 991
 992                 if (tarval_is_long(tv) &&
 993                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 994                         ir_node *block   = get_nodes_block(node);
 995                         ir_node *left    = get_Shrs_left(node);
 996                         long     shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 997                         int      idx     = get_irn_idx(left);
 998                         ir_mode *mode_l;
 999                         ir_node *low;
1000                         ir_node *c;
1001
1002                         left = env->entries[idx]->high_word;
1003                         idx = get_irn_idx(node);
1004
1005                         mode_l = env->params->low_unsigned;
1006                         if (shf_cnt > 0) {
1007                                 c   = new_r_Const_long(irg, mode_l, shf_cnt);
1008                                 low = new_r_Shrs(irg, block, left, c, mode);
1009                         } else {
1010                                 low = left;
1011                         }  /* if */
1012                         /* low word is expected to have mode_l */
1013                         env->entries[idx]->low_word = new_r_Conv(irg, block, low, mode_l);
1014
1015                         c = new_r_Const_long(irg, mode_l, get_mode_size_bits(mode) - 1);
1016                         env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1017
1018                         return;
1019                 }  /* if */
1020         }  /* if */
1021         lower_Shiftop(node, mode, env);
1022 }  /* lower_Shrs */
1023
1024 /**
1025  * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1026  */
1027 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1028         lower_env_t *lenv = env;
1029
1030         if (is_Rotl(node)) {
1031                 ir_mode *mode = get_irn_op_mode(node);
1032                         if (mode == lenv->params->high_signed ||
1033                             mode == lenv->params->high_unsigned) {
1034                                 ir_node  *right = get_Rotl_right(node);
1035                                 ir_node  *left, *shl, *shr, *or, *block, *sub, *c;
1036                                 ir_mode  *omode, *rmode;
1037                                 ir_graph *irg;
1038                                 dbg_info *dbg;
1039                                 optimization_state_t state;
1040
1041                                 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1042                                         tarval *tv = get_Const_tarval(right);
1043
1044                                         if (tarval_is_long(tv) &&
1045                                             get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1046                                                 /* will be optimized in lower_Rotl() */
1047                                                 return;
1048                                         }
1049                                 }
1050
1051                                 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1052                                 dbg   = get_irn_dbg_info(node);
1053                                 omode = get_irn_mode(node);
1054                                 left  = get_Rotl_left(node);
1055                                 irg   = current_ir_graph;
1056                                 block = get_nodes_block(node);
1057                                 shl   = new_rd_Shl(dbg, irg, block, left, right, omode);
1058                                 rmode = get_irn_mode(right);
1059                                 c     = new_Const_long(rmode, get_mode_size_bits(omode));
1060                                 sub   = new_rd_Sub(dbg, irg, block, c, right, rmode);
1061                                 shr   = new_rd_Shr(dbg, irg, block, left, sub, omode);
1062
1063                                 /* optimization must be switched off here, or we will get the Rotl back */
1064                                 save_optimization_state(&state);
1065                                 set_opt_algebraic_simplification(0);
1066                                 or = new_rd_Or(dbg, irg, block, shl, shr, omode);
1067                                 restore_optimization_state(&state);
1068
1069                                 exchange(node, or);
1070
1071                                 /* do lowering on the new nodes */
1072                                 prepare_links(shl, env);
1073                                 prepare_links(c, env);
1074                                 prepare_links(sub, env);
1075                                 prepare_links(shr, env);
1076                                 prepare_links(or, env);
1077                         }
1078         } else {
1079                 prepare_links(node, env);
1080         }
1081 }
1082
1083 /**
1084  * Translate a special case Rotl(x, sizeof(w)).
1085  */
1086 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1087         ir_node *right = get_Rotl_right(node);
1088         ir_node *left = get_Rotl_left(node);
1089         ir_node *h, *l;
1090         int idx = get_irn_idx(left);
1091         (void) right;
1092         (void) mode;
1093
1094         assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1095                is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1096                get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1097
1098         l = env->entries[idx]->low_word;
1099         h = env->entries[idx]->high_word;
1100         idx = get_irn_idx(node);
1101
1102         env->entries[idx]->low_word  = h;
1103         env->entries[idx]->high_word = l;
1104 }  /* lower_Rotl */
1105
1106 /**
1107  * Translate an Unop.
1108  *
1109  * Create an intrinsic Call.
1110  */
1111 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1112         ir_node  *block, *irn;
1113         ir_node  *in[2];
1114         dbg_info *dbg;
1115         ir_type  *mtp;
1116         int      idx;
1117         ir_graph *irg;
1118         node_entry_t *entry;
1119
1120         irn   = get_unop_op(node);
1121         entry = env->entries[get_irn_idx(irn)];
1122         assert(entry);
1123
1124         if (! entry->low_word) {
1125                 /* not ready yet, wait */
1126                 pdeq_putr(env->waitq, node);
1127                 return;
1128         }  /* if */
1129
1130         in[0] = entry->low_word;
1131         in[1] = entry->high_word;
1132
1133         dbg   = get_irn_dbg_info(node);
1134         block = get_nodes_block(node);
1135         irg   = current_ir_graph;
1136
1137         mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1138         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1139         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1140                 irn, 2, in, mtp);
1141         set_irn_pinned(irn, get_irn_pinned(node));
1142         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1143
1144         idx = get_irn_idx(node);
1145         assert(idx < env->n_entries);
1146         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1147         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
1148 }  /* lower_Unop */
1149
1150 /**
1151  * Translate a logical Binop.
1152  *
1153  * Create two logical Binops.
1154  */
1155 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1156                                                                 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1157         ir_node  *block, *irn;
1158         ir_node  *lop_l, *lop_h, *rop_l, *rop_h;
1159         dbg_info *dbg;
1160         int      idx;
1161         ir_graph *irg;
1162         node_entry_t *entry;
1163
1164         irn   = get_binop_left(node);
1165         entry = env->entries[get_irn_idx(irn)];
1166         assert(entry);
1167
1168         if (! entry->low_word) {
1169                 /* not ready yet, wait */
1170                 pdeq_putr(env->waitq, node);
1171                 return;
1172         }  /* if */
1173
1174         lop_l = entry->low_word;
1175         lop_h = entry->high_word;
1176
1177         irn   = get_binop_right(node);
1178         entry = env->entries[get_irn_idx(irn)];
1179         assert(entry);
1180
1181         if (! entry->low_word) {
1182                 /* not ready yet, wait */
1183                 pdeq_putr(env->waitq, node);
1184                 return;
1185         }  /* if */
1186
1187         rop_l = entry->low_word;
1188         rop_h = entry->high_word;
1189
1190         dbg = get_irn_dbg_info(node);
1191         block = get_nodes_block(node);
1192
1193         idx = get_irn_idx(node);
1194         assert(idx < env->n_entries);
1195         irg = current_ir_graph;
1196         env->entries[idx]->low_word  = constr_rd(dbg, irg, block, lop_l, rop_l, env->params->low_unsigned);
1197         env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1198 }  /* lower_Binop_logical */
1199
1200 /** create a logical operation transformation */
1201 #define lower_logical(op)                                                \
1202 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1203         lower_Binop_logical(node, mode, env, new_rd_##op);                   \
1204 }
1205
1206 lower_logical(And)
1207 lower_logical(Or)
1208 lower_logical(Eor)
1209
1210 /**
1211  * Translate a Not.
1212  *
1213  * Create two logical Nots.
1214  */
1215 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1216         ir_node  *block, *irn;
1217         ir_node  *op_l, *op_h;
1218         dbg_info *dbg;
1219         int      idx;
1220         ir_graph *irg;
1221         node_entry_t *entry;
1222
1223         irn   = get_Not_op(node);
1224         entry = env->entries[get_irn_idx(irn)];
1225         assert(entry);
1226
1227         if (! entry->low_word) {
1228                 /* not ready yet, wait */
1229                 pdeq_putr(env->waitq, node);
1230                 return;
1231         }  /* if */
1232
1233         op_l = entry->low_word;
1234         op_h = entry->high_word;
1235
1236         dbg   = get_irn_dbg_info(node);
1237         block = get_nodes_block(node);
1238         irg   = current_ir_graph;
1239
1240         idx = get_irn_idx(node);
1241         assert(idx < env->n_entries);
1242         env->entries[idx]->low_word  = new_rd_Not(dbg, current_ir_graph, block, op_l, env->params->low_unsigned);
1243         env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1244 }  /* lower_Not */
1245
1246 /**
1247  * Translate a Cond.
1248  */
1249 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1250         ir_node *cmp, *left, *right, *block;
1251         ir_node *sel = get_Cond_selector(node);
1252         ir_mode *m = get_irn_mode(sel);
1253         int     idx;
1254         (void) mode;
1255
1256         if (m == mode_b) {
1257                 node_entry_t *lentry, *rentry;
1258                 ir_node  *proj, *projT = NULL, *projF = NULL;
1259                 ir_node  *new_bl, *cmpH, *cmpL, *irn;
1260                 ir_node  *projHF, *projHT;
1261                 ir_node  *dst_blk;
1262                 ir_graph *irg;
1263                 pn_Cmp   pnc;
1264                 dbg_info *dbg;
1265
1266                 if(!is_Proj(sel))
1267                         return;
1268
1269                 cmp   = get_Proj_pred(sel);
1270                 if(!is_Cmp(cmp))
1271                         return;
1272
1273                 left  = get_Cmp_left(cmp);
1274                 idx   = get_irn_idx(left);
1275                 lentry = env->entries[idx];
1276
1277                 if (! lentry) {
1278                         /* a normal Cmp */
1279                         return;
1280                 }  /* if */
1281
1282                 right = get_Cmp_right(cmp);
1283                 idx   = get_irn_idx(right);
1284                 rentry = env->entries[idx];
1285                 assert(rentry);
1286
1287                 if (! lentry->low_word || !rentry->low_word) {
1288                         /* not yet ready */
1289                         pdeq_putr(env->waitq, node);
1290                         return;
1291                 }  /* if */
1292
1293                 /* all right, build the code */
1294                 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1295                         long proj_nr = get_Proj_proj(proj);
1296
1297                         if (proj_nr == pn_Cond_true) {
1298                                 assert(projT == NULL && "more than one Proj(true)");
1299                                 projT = proj;
1300                         } else {
1301                                 assert(proj_nr == pn_Cond_false);
1302                                 assert(projF == NULL && "more than one Proj(false)");
1303                                 projF = proj;
1304                         }  /* if */
1305                         mark_irn_visited(proj);
1306                 }  /* for */
1307                 assert(projT && projF);
1308
1309                 /* create a new high compare */
1310                 block = get_nodes_block(node);
1311                 dbg   = get_irn_dbg_info(cmp);
1312                 irg   = current_ir_graph;
1313                 pnc   = get_Proj_proj(sel);
1314
1315                 if (is_Const(right) && is_Const_null(right)) {
1316                         if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1317                                 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1318                                 ir_mode *mode = env->params->low_unsigned;
1319                                 ir_node *low  = new_r_Conv(irg, block, lentry->low_word, mode);
1320                                 ir_node *high = new_r_Conv(irg, block, lentry->high_word, mode);
1321                                 ir_node *or   = new_rd_Or(dbg, irg, block, low, high, mode);
1322                                 ir_node *cmp  = new_rd_Cmp(dbg, irg, block, or, new_Const_long(mode, 0));
1323
1324                                 ir_node *proj = new_r_Proj(irg, block, cmp, mode_b, pnc);
1325                                 set_Cond_selector(node, proj);
1326                                 return;
1327                         }
1328                 }
1329
1330                 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1331
1332                 if (pnc == pn_Cmp_Eq) {
1333                         /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1334                         pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1335
1336                         assert(entry);
1337                         dst_blk = entry->value;
1338
1339                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1340                         dbg = get_irn_dbg_info(node);
1341                         irn = new_rd_Cond(dbg, irg, block, irn);
1342
1343                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1344                         mark_irn_visited(projHF);
1345                         exchange(projF, projHF);
1346
1347                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1348                         mark_irn_visited(projHT);
1349
1350                         new_bl = new_r_Block(irg, 1, &projHT);
1351
1352                         dbg   = get_irn_dbg_info(cmp);
1353                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1354                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1355                         dbg = get_irn_dbg_info(node);
1356                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1357
1358                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1359                         mark_irn_visited(proj);
1360                         add_block_cf_input(dst_blk, projHF, proj);
1361
1362                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1363                         mark_irn_visited(proj);
1364                         exchange(projT, proj);
1365                 } else if (pnc == pn_Cmp_Lg) {
1366                         /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1367                         pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1368
1369                         assert(entry);
1370                         dst_blk = entry->value;
1371
1372                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1373                         dbg = get_irn_dbg_info(node);
1374                         irn = new_rd_Cond(dbg, irg, block, irn);
1375
1376                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1377                         mark_irn_visited(projHT);
1378                         exchange(projT, projHT);
1379
1380                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1381                         mark_irn_visited(projHF);
1382
1383                         new_bl = new_r_Block(irg, 1, &projHF);
1384
1385                         dbg   = get_irn_dbg_info(cmp);
1386                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1387                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1388                         dbg = get_irn_dbg_info(node);
1389                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1390
1391                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1392                         mark_irn_visited(proj);
1393                         add_block_cf_input(dst_blk, projHT, proj);
1394
1395                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1396                         mark_irn_visited(proj);
1397                         exchange(projF, proj);
1398                 } else {
1399                         /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1400                         ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1401                         pmap_entry *entry;
1402
1403                         entry = pmap_find(env->proj_2_block, projT);
1404                         assert(entry);
1405                         dstT = entry->value;
1406
1407                         entry = pmap_find(env->proj_2_block, projF);
1408                         assert(entry);
1409                         dstF = entry->value;
1410
1411                         irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1412                         dbg = get_irn_dbg_info(node);
1413                         irn = new_rd_Cond(dbg, irg, block, irn);
1414
1415                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1416                         mark_irn_visited(projHT);
1417                         exchange(projT, projHT);
1418                         projT = projHT;
1419
1420                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1421                         mark_irn_visited(projHF);
1422
1423                         newbl_eq = new_r_Block(irg, 1, &projHF);
1424
1425                         irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1426                         irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1427
1428                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1429                         mark_irn_visited(proj);
1430                         exchange(projF, proj);
1431                         projF = proj;
1432
1433                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1434                         mark_irn_visited(proj);
1435
1436                         newbl_l = new_r_Block(irg, 1, &proj);
1437
1438                         dbg   = get_irn_dbg_info(cmp);
1439                         cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1440                         irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1441                         dbg = get_irn_dbg_info(node);
1442                         irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1443
1444                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1445                         mark_irn_visited(proj);
1446                         add_block_cf_input(dstT, projT, proj);
1447
1448                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1449                         mark_irn_visited(proj);
1450                         add_block_cf_input(dstF, projF, proj);
1451                 }  /* if */
1452
1453                 /* we have changed the control flow */
1454                 env->flags |= CF_CHANGED;
1455         } else {
1456                 idx = get_irn_idx(sel);
1457
1458                 if (env->entries[idx]) {
1459                         /*
1460                            Bad, a jump-table with double-word index.
1461                            This should not happen, but if it does we handle
1462                            it like a Conv were between (in other words, ignore
1463                            the high part.
1464                          */
1465
1466                         if (! env->entries[idx]->low_word) {
1467                                 /* not ready yet, wait */
1468                                 pdeq_putr(env->waitq, node);
1469                                 return;
1470                         }  /* if */
1471                         set_Cond_selector(node, env->entries[idx]->low_word);
1472                 }  /* if */
1473         }  /* if */
1474 }  /* lower_Cond */
1475
1476 /**
1477  * Translate a Conv to higher_signed
1478  */
1479 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1480         ir_node  *op    = get_Conv_op(node);
1481         ir_mode  *imode = get_irn_mode(op);
1482         ir_mode  *dst_mode_l = env->params->low_unsigned;
1483         ir_mode  *dst_mode_h = env->params->low_signed;
1484         int      idx = get_irn_idx(node);
1485         ir_graph *irg = current_ir_graph;
1486         ir_node  *block = get_nodes_block(node);
1487         dbg_info *dbg = get_irn_dbg_info(node);
1488
1489         assert(idx < env->n_entries);
1490
1491         if (mode_is_int(imode) || mode_is_reference(imode)) {
1492                 if (imode == env->params->high_unsigned) {
1493                         /* a Conv from Lu to Ls */
1494                         int op_idx = get_irn_idx(op);
1495
1496                         if (! env->entries[op_idx]->low_word) {
1497                                 /* not ready yet, wait */
1498                                 pdeq_putr(env->waitq, node);
1499                                 return;
1500                         }  /* if */
1501                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word,  dst_mode_l);
1502                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h);
1503                 } else {
1504                         /* simple case: create a high word */
1505                         if (imode != dst_mode_l)
1506                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l);
1507
1508                         env->entries[idx]->low_word  = op;
1509
1510                         if (mode_is_signed(imode)) {
1511                                 ir_node *op_conv = new_rd_Conv(dbg, irg, block, op, dst_mode_h);
1512                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op_conv,
1513                                         new_Const_long(dst_mode_l, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1514                         } else {
1515                                 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode_h));
1516                         }  /* if */
1517                 }  /* if */
1518         } else {
1519                 ir_node *irn, *call;
1520                 ir_mode *omode = env->params->high_signed;
1521                 ir_type *mtp = get_conv_type(imode, omode, env);
1522
1523                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1524                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1525                 set_irn_pinned(call, get_irn_pinned(node));
1526                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1527
1528                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1529                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1530         }  /* if */
1531 }  /* lower_Conv_to_Ls */
1532
1533 /**
1534  * Translate a Conv to higher_unsigned
1535  */
1536 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1537         ir_node  *op    = get_Conv_op(node);
1538         ir_mode  *imode = get_irn_mode(op);
1539         ir_mode  *dst_mode = env->params->low_unsigned;
1540         int      idx = get_irn_idx(node);
1541         ir_graph *irg = current_ir_graph;
1542         ir_node  *block = get_nodes_block(node);
1543         dbg_info *dbg = get_irn_dbg_info(node);
1544
1545         assert(idx < env->n_entries);
1546
1547         if (mode_is_int(imode) || mode_is_reference(imode)) {
1548                 if (imode == env->params->high_signed) {
1549                         /* a Conv from Ls to Lu */
1550                         int op_idx = get_irn_idx(op);
1551
1552                         if (! env->entries[op_idx]->low_word) {
1553                                 /* not ready yet, wait */
1554                                 pdeq_putr(env->waitq, node);
1555                                 return;
1556                         }  /* if */
1557                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1558                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1559                 } else {
1560                         /* simple case: create a high word */
1561                         if (imode != dst_mode)
1562                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1563
1564                         env->entries[idx]->low_word  = op;
1565
1566                         if (mode_is_signed(imode)) {
1567                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1568                                         new_Const_long(dst_mode, get_mode_size_bits(dst_mode) - 1), dst_mode);
1569                         } else {
1570                                 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode));
1571                         }  /* if */
1572                 }  /* if */
1573         } else {
1574                 ir_node *irn, *call;
1575                 ir_mode *omode = env->params->high_unsigned;
1576                 ir_type *mtp = get_conv_type(imode, omode, env);
1577
1578                 /* do an intrinsic call */
1579                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1580                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1581                 set_irn_pinned(call, get_irn_pinned(node));
1582                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1583
1584                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode, 0);
1585                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1586         }  /* if */
1587 }  /* lower_Conv_to_Lu */
1588
1589 /**
1590  * Translate a Conv from higher_signed
1591  */
1592 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1593         ir_node  *op    = get_Conv_op(node);
1594         ir_mode  *omode = get_irn_mode(node);
1595         ir_node  *block = get_nodes_block(node);
1596         dbg_info *dbg = get_irn_dbg_info(node);
1597         int      idx = get_irn_idx(op);
1598         ir_graph *irg = current_ir_graph;
1599
1600         assert(idx < env->n_entries);
1601
1602         if (! env->entries[idx]->low_word) {
1603                 /* not ready yet, wait */
1604                 pdeq_putr(env->waitq, node);
1605                 return;
1606         }  /* if */
1607
1608         if (mode_is_int(omode) || mode_is_reference(omode)) {
1609                 op = env->entries[idx]->low_word;
1610
1611                 /* simple case: create a high word */
1612                 if (omode != env->params->low_signed)
1613                         op = new_rd_Conv(dbg, irg, block, op, omode);
1614
1615                 set_Conv_op(node, op);
1616         } else {
1617                 ir_node *irn, *call, *in[2];
1618                 ir_mode *imode = env->params->high_signed;
1619                 ir_type *mtp = get_conv_type(imode, omode, env);
1620
1621                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1622                 in[0] = env->entries[idx]->low_word;
1623                 in[1] = env->entries[idx]->high_word;
1624
1625                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1626                 set_irn_pinned(call, get_irn_pinned(node));
1627                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1628
1629                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1630         }  /* if */
1631 }  /* lower_Conv_from_Ls */
1632
1633 /**
1634  * Translate a Conv from higher_unsigned
1635  */
1636 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1637         ir_node  *op    = get_Conv_op(node);
1638         ir_mode  *omode = get_irn_mode(node);
1639         ir_node  *block = get_nodes_block(node);
1640         dbg_info *dbg = get_irn_dbg_info(node);
1641         int      idx = get_irn_idx(op);
1642         ir_graph *irg = current_ir_graph;
1643
1644         assert(idx < env->n_entries);
1645
1646         if (! env->entries[idx]->low_word) {
1647                 /* not ready yet, wait */
1648                 pdeq_putr(env->waitq, node);
1649                 return;
1650         }  /* if */
1651
1652         if (mode_is_int(omode) || mode_is_reference(omode)) {
1653                 op = env->entries[idx]->low_word;
1654
1655                 /* simple case: create a high word */
1656                 if (omode != env->params->low_unsigned)
1657                         op = new_rd_Conv(dbg, irg, block, op, omode);
1658
1659                 set_Conv_op(node, op);
1660         } else {
1661                 ir_node *irn, *call, *in[2];
1662                 ir_mode *imode = env->params->high_unsigned;
1663                 ir_type *mtp = get_conv_type(imode, omode, env);
1664
1665                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1666                 in[0] = env->entries[idx]->low_word;
1667                 in[1] = env->entries[idx]->high_word;
1668
1669                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1670                 set_irn_pinned(call, get_irn_pinned(node));
1671                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1672
1673                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1674         }  /* if */
1675 }  /* lower_Conv_from_Lu */
1676
1677 /**
1678  * Translate a Conv.
1679  */
1680 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1681         mode = get_irn_mode(node);
1682
1683         if (mode == env->params->high_signed) {
1684                 lower_Conv_to_Ls(node, env);
1685         } else if (mode == env->params->high_unsigned) {
1686                 lower_Conv_to_Lu(node, env);
1687         } else {
1688                 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1689
1690                 if (mode == env->params->high_signed) {
1691                         lower_Conv_from_Ls(node, env);
1692                 } else if (mode == env->params->high_unsigned) {
1693                         lower_Conv_from_Lu(node, env);
1694                 }  /* if */
1695         }  /* if */
1696 }  /* lower_Conv */
1697
1698 /**
1699  * Lower the method type.
1700  */
1701 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1702         pmap_entry *entry;
1703         ident      *id;
1704         ir_type    *res;
1705
1706         if (is_lowered_type(mtp))
1707                 return mtp;
1708
1709         entry = pmap_find(lowered_type, mtp);
1710         if (! entry) {
1711                 int i, n, r, n_param, n_res;
1712
1713                 /* count new number of params */
1714                 n_param = n = get_method_n_params(mtp);
1715                 for (i = n_param - 1; i >= 0; --i) {
1716                         ir_type *tp = get_method_param_type(mtp, i);
1717
1718                         if (is_Primitive_type(tp)) {
1719                                 ir_mode *mode = get_type_mode(tp);
1720
1721                                 if (mode == env->params->high_signed ||
1722                                         mode == env->params->high_unsigned)
1723                                         ++n_param;
1724                         }  /* if */
1725                 }  /* for */
1726
1727                 /* count new number of results */
1728                 n_res = r = get_method_n_ress(mtp);
1729                 for (i = n_res - 1; i >= 0; --i) {
1730                         ir_type *tp = get_method_res_type(mtp, i);
1731
1732                         if (is_Primitive_type(tp)) {
1733                                 ir_mode *mode = get_type_mode(tp);
1734
1735                                 if (mode == env->params->high_signed ||
1736                                         mode == env->params->high_unsigned)
1737                                         ++n_res;
1738                         }  /* if */
1739                 }  /* for */
1740
1741                 id = id_mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1742                 res = new_type_method(id, n_param, n_res);
1743
1744                 /* set param types and result types */
1745                 for (i = n_param = 0; i < n; ++i) {
1746                         ir_type *tp = get_method_param_type(mtp, i);
1747
1748                         if (is_Primitive_type(tp)) {
1749                                 ir_mode *mode = get_type_mode(tp);
1750
1751                                 if (mode == env->params->high_signed) {
1752                                         set_method_param_type(res, n_param++, tp_u);
1753                                         set_method_param_type(res, n_param++, tp_s);
1754                                 } else if (mode == env->params->high_unsigned) {
1755                                         set_method_param_type(res, n_param++, tp_u);
1756                                         set_method_param_type(res, n_param++, tp_u);
1757                                 } else {
1758                                         set_method_param_type(res, n_param++, tp);
1759                                 }  /* if */
1760                         } else {
1761                                 set_method_param_type(res, n_param++, tp);
1762                         }  /* if */
1763                 }  /* for */
1764                 for (i = n_res = 0; i < r; ++i) {
1765                         ir_type *tp = get_method_res_type(mtp, i);
1766
1767                         if (is_Primitive_type(tp)) {
1768                                 ir_mode *mode = get_type_mode(tp);
1769
1770                                 if (mode == env->params->high_signed) {
1771                                         set_method_res_type(res, n_res++, tp_u);
1772                                         set_method_res_type(res, n_res++, tp_s);
1773                                 } else if (mode == env->params->high_unsigned) {
1774                                         set_method_res_type(res, n_res++, tp_u);
1775                                         set_method_res_type(res, n_res++, tp_u);
1776                                 } else {
1777                                         set_method_res_type(res, n_res++, tp);
1778                                 }  /* if */
1779                         } else {
1780                                 set_method_res_type(res, n_res++, tp);
1781                         }  /* if */
1782                 }  /* for */
1783                 set_lowered_type(mtp, res);
1784                 pmap_insert(lowered_type, mtp, res);
1785         } else {
1786                 res = entry->value;
1787         }  /* if */
1788         return res;
1789 }  /* lower_mtp */
1790
1791 /**
1792  * Translate a Return.
1793  */
1794 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1795         ir_graph  *irg = current_ir_graph;
1796         ir_entity *ent = get_irg_entity(irg);
1797         ir_type   *mtp = get_entity_type(ent);
1798         ir_node   **in;
1799         int       i, j, n, idx;
1800         int       need_conv = 0;
1801         (void) mode;
1802
1803         /* check if this return must be lowered */
1804         for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1805                 ir_node *pred = get_Return_res(node, i);
1806                 ir_mode *mode = get_irn_op_mode(pred);
1807
1808                 if (mode == env->params->high_signed ||
1809                         mode == env->params->high_unsigned) {
1810                         idx = get_irn_idx(pred);
1811                         if (! env->entries[idx]->low_word) {
1812                                 /* not ready yet, wait */
1813                                 pdeq_putr(env->waitq, node);
1814                                 return;
1815                         }  /* if */
1816                         need_conv = 1;
1817                 }  /* if */
1818         }  /* for */
1819         if (! need_conv)
1820                 return;
1821
1822         ent = get_irg_entity(irg);
1823         mtp = get_entity_type(ent);
1824
1825         mtp = lower_mtp(mtp, env);
1826         set_entity_type(ent, mtp);
1827
1828         /* create a new in array */
1829         NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1830         in[0] = get_Return_mem(node);
1831
1832         for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1833                 ir_node *pred = get_Return_res(node, i);
1834
1835                 idx = get_irn_idx(pred);
1836                 assert(idx < env->n_entries);
1837
1838                 if (env->entries[idx]) {
1839                         in[++j] = env->entries[idx]->low_word;
1840                         in[++j] = env->entries[idx]->high_word;
1841                 } else {
1842                         in[++j] = pred;
1843                 }  /* if */
1844         }  /* for */
1845
1846         set_irn_in(node, j+1, in);
1847 }  /* lower_Return */
1848
1849 /**
1850  * Translate the parameters.
1851  */
1852 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1853         ir_graph  *irg = current_ir_graph;
1854         ir_entity *ent = get_irg_entity(irg);
1855         ir_type   *tp  = get_entity_type(ent);
1856         ir_type   *mtp;
1857         long      *new_projs;
1858         int       i, j, n_params, rem;
1859         ir_node   *proj, *args;
1860         (void) mode;
1861
1862         if (is_lowered_type(tp)) {
1863                 mtp = get_associated_type(tp);
1864         } else {
1865                 mtp = tp;
1866         }  /* if */
1867         assert(! is_lowered_type(mtp));
1868
1869         n_params = get_method_n_params(mtp);
1870         if (n_params <= 0)
1871                 return;
1872
1873         NEW_ARR_A(long, new_projs, n_params);
1874
1875         /* first check if we have parameters that must be fixed */
1876         for (i = j = 0; i < n_params; ++i, ++j) {
1877                 ir_type *tp = get_method_param_type(mtp, i);
1878
1879                 new_projs[i] = j;
1880                 if (is_Primitive_type(tp)) {
1881                         ir_mode *mode = get_type_mode(tp);
1882
1883                         if (mode == env->params->high_signed ||
1884                                 mode == env->params->high_unsigned)
1885                                 ++j;
1886                 }  /* if */
1887         }  /* for */
1888         if (i == j)
1889                 return;
1890
1891         mtp = lower_mtp(mtp, env);
1892         set_entity_type(ent, mtp);
1893
1894         /* switch off optimization for new Proj nodes or they might be CSE'ed
1895            with not patched one's */
1896         rem = get_optimize();
1897         set_optimize(0);
1898
1899         /* ok, fix all Proj's and create new ones */
1900         args = get_irg_args(irg);
1901         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1902                 ir_node *pred = get_Proj_pred(proj);
1903                 long proj_nr;
1904                 int idx;
1905                 ir_mode *mode;
1906                 dbg_info *dbg;
1907
1908                 /* do not visit this node again */
1909                 mark_irn_visited(proj);
1910
1911                 if (pred != args)
1912                         continue;
1913
1914                 proj_nr = get_Proj_proj(proj);
1915                 set_Proj_proj(proj, new_projs[proj_nr]);
1916
1917                 idx = get_irn_idx(proj);
1918                 if (env->entries[idx]) {
1919                         ir_mode *low_mode = env->params->low_unsigned;
1920
1921                         mode = get_irn_mode(proj);
1922
1923                         if (mode == env->params->high_signed) {
1924                                 mode = env->params->low_signed;
1925                         } else {
1926                                 mode = env->params->low_unsigned;
1927                         }  /* if */
1928
1929                         dbg = get_irn_dbg_info(proj);
1930                         env->entries[idx]->low_word  =
1931                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1932                         env->entries[idx]->high_word =
1933                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1934                 }  /* if */
1935         }  /* for */
1936         set_optimize(rem);
1937 }  /* lower_Start */
1938
1939 /**
1940  * Translate a Call.
1941  */
1942 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1943         ir_graph *irg = current_ir_graph;
1944         ir_type  *tp = get_Call_type(node);
1945         ir_type  *call_tp;
1946         ir_node  **in, *proj, *results;
1947         int      n_params, n_res, need_lower = 0;
1948         int      i, j;
1949         long     *res_numbers = NULL;
1950         (void) mode;
1951
1952         if (is_lowered_type(tp)) {
1953                 call_tp = get_associated_type(tp);
1954         } else {
1955                 call_tp = tp;
1956         }  /* if */
1957
1958         assert(! is_lowered_type(call_tp));
1959
1960         n_params = get_method_n_params(call_tp);
1961         for (i = 0; i < n_params; ++i) {
1962                 ir_type *tp = get_method_param_type(call_tp, i);
1963
1964                 if (is_Primitive_type(tp)) {
1965                         ir_mode *mode = get_type_mode(tp);
1966
1967                         if (mode == env->params->high_signed ||
1968                                 mode == env->params->high_unsigned) {
1969                                 need_lower = 1;
1970                                 break;
1971                         }  /* if */
1972                 }  /* if */
1973         }  /* for */
1974         n_res = get_method_n_ress(call_tp);
1975         if (n_res > 0) {
1976                 NEW_ARR_A(long, res_numbers, n_res);
1977
1978                 for (i = j = 0; i < n_res; ++i, ++j) {
1979                         ir_type *tp = get_method_res_type(call_tp, i);
1980
1981                         res_numbers[i] = j;
1982                         if (is_Primitive_type(tp)) {
1983                                 ir_mode *mode = get_type_mode(tp);
1984
1985                                 if (mode == env->params->high_signed ||
1986                                         mode == env->params->high_unsigned) {
1987                                         need_lower = 1;
1988                                         ++j;
1989                                 }  /* if */
1990                         }  /* if */
1991                 }  /* for */
1992         }  /* if */
1993
1994         if (! need_lower)
1995                 return;
1996
1997         /* let's lower it */
1998         call_tp = lower_mtp(call_tp, env);
1999         set_Call_type(node, call_tp);
2000
2001         NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2002
2003         in[0] = get_Call_mem(node);
2004         in[1] = get_Call_ptr(node);
2005
2006         for (j = 2, i = 0; i < n_params; ++i) {
2007                 ir_node *pred = get_Call_param(node, i);
2008                 int     idx = get_irn_idx(pred);
2009
2010                 if (env->entries[idx]) {
2011                         if (! env->entries[idx]->low_word) {
2012                                 /* not ready yet, wait */
2013                                 pdeq_putr(env->waitq, node);
2014                                 return;
2015                         }
2016                         in[j++] = env->entries[idx]->low_word;
2017                         in[j++] = env->entries[idx]->high_word;
2018                 } else {
2019                         in[j++] = pred;
2020                 }  /* if */
2021         }  /* for */
2022
2023         set_irn_in(node, j, in);
2024
2025         /* fix the results */
2026         results = NULL;
2027         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2028                 long proj_nr = get_Proj_proj(proj);
2029
2030                 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2031                         /* found the result proj */
2032                         results = proj;
2033                         break;
2034                 }  /* if */
2035         }  /* for */
2036
2037         if (results) {          /* there are results */
2038                 int rem = get_optimize();
2039
2040                 /* switch off optimization for new Proj nodes or they might be CSE'ed
2041                    with not patched one's */
2042                 set_optimize(0);
2043                 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2044                         if (get_Proj_pred(proj) == results) {
2045                                 long proj_nr = get_Proj_proj(proj);
2046                                 int idx;
2047
2048                                 /* found a result */
2049                                 set_Proj_proj(proj, res_numbers[proj_nr]);
2050                                 idx = get_irn_idx(proj);
2051                                 if (env->entries[idx]) {
2052                                         ir_mode *mode = get_irn_mode(proj);
2053                                         ir_mode *low_mode = env->params->low_unsigned;
2054                                         dbg_info *dbg;
2055
2056                                         if (mode == env->params->high_signed) {
2057                                                 mode = env->params->low_signed;
2058                                         } else {
2059                                                 mode = env->params->low_unsigned;
2060                                         }  /* if */
2061
2062                                         dbg = get_irn_dbg_info(proj);
2063                                         env->entries[idx]->low_word  =
2064                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2065                                         env->entries[idx]->high_word =
2066                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2067                                 }  /* if */
2068                                 mark_irn_visited(proj);
2069                         }  /* if */
2070                 }  /* for */
2071                 set_optimize(rem);
2072         }
2073 }  /* lower_Call */
2074
2075 /**
2076  * Translate an Unknown into two.
2077  */
2078 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2079         int      idx = get_irn_idx(node);
2080         ir_graph *irg = current_ir_graph;
2081         ir_mode  *low_mode = env->params->low_unsigned;
2082
2083         env->entries[idx]->low_word  = new_r_Unknown(irg, low_mode);
2084         env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2085 }  /* lower_Unknown */
2086
2087 /**
2088  * Translate a Phi.
2089  *
2090  * First step: just create two templates
2091  */
2092 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2093         ir_mode  *mode_l = env->params->low_unsigned;
2094         ir_graph *irg = current_ir_graph;
2095         ir_node  *block, *unk_l, *unk_h, *phi_l, *phi_h;
2096         ir_node  **inl, **inh;
2097         dbg_info *dbg;
2098         int      idx, i, arity = get_Phi_n_preds(phi);
2099         int      enq = 0;
2100
2101         idx = get_irn_idx(phi);
2102         if (env->entries[idx]->low_word) {
2103                 /* Phi nodes already build, check for inputs */
2104                 ir_node *phil = env->entries[idx]->low_word;
2105                 ir_node *phih = env->entries[idx]->high_word;
2106
2107                 for (i = 0; i < arity; ++i) {
2108                         ir_node *pred = get_Phi_pred(phi, i);
2109                         int     idx = get_irn_idx(pred);
2110
2111                         if (env->entries[idx]->low_word) {
2112                                 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2113                                 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2114                         } else {
2115                                 /* still not ready */
2116                                 pdeq_putr(env->waitq, phi);
2117                                 return;
2118                         }  /* if */
2119                 }  /* for */
2120         }  /* if */
2121
2122         /* first create a new in array */
2123         NEW_ARR_A(ir_node *, inl, arity);
2124         NEW_ARR_A(ir_node *, inh, arity);
2125         unk_l = new_r_Unknown(irg, mode_l);
2126         unk_h = new_r_Unknown(irg, mode);
2127
2128         for (i = 0; i < arity; ++i) {
2129                 ir_node *pred = get_Phi_pred(phi, i);
2130                 int     idx = get_irn_idx(pred);
2131
2132                 if (env->entries[idx]->low_word) {
2133                         inl[i] = env->entries[idx]->low_word;
2134                         inh[i] = env->entries[idx]->high_word;
2135                 } else {
2136                         inl[i] = unk_l;
2137                         inh[i] = unk_h;
2138                         enq = 1;
2139                 }  /* if */
2140         }  /* for */
2141
2142         dbg   = get_irn_dbg_info(phi);
2143         block = get_nodes_block(phi);
2144
2145         idx = get_irn_idx(phi);
2146         assert(idx < env->n_entries);
2147         env->entries[idx]->low_word  = phi_l = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2148         env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2149
2150         /* Don't forget to link the new Phi nodes into the block.
2151          * Beware that some Phis might be optimized away. */
2152         if (is_Phi(phi_l))
2153                 add_Block_phi(block, phi_l);
2154         if (is_Phi(phi_h))
2155                 add_Block_phi(block, phi_h);
2156
2157         if (enq) {
2158                 /* not yet finished */
2159                 pdeq_putr(env->waitq, phi);
2160         }  /* if */
2161 }  /* lower_Phi */
2162
2163 /**
2164  * Translate a Mux.
2165  */
2166 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2167         ir_graph *irg = current_ir_graph;
2168         ir_node  *block, *val;
2169         ir_node  *true_l, *true_h, *false_l, *false_h, *sel;
2170         dbg_info *dbg;
2171         int      idx;
2172
2173         val = get_Mux_true(mux);
2174         idx = get_irn_idx(val);
2175         if (env->entries[idx]->low_word) {
2176                 /* Values already build */
2177                 true_l = env->entries[idx]->low_word;
2178                 true_h = env->entries[idx]->high_word;
2179         } else {
2180                 /* still not ready */
2181                 pdeq_putr(env->waitq, mux);
2182                 return;
2183         }  /* if */
2184
2185         val = get_Mux_false(mux);
2186         idx = get_irn_idx(val);
2187         if (env->entries[idx]->low_word) {
2188                 /* Values already build */
2189                 false_l = env->entries[idx]->low_word;
2190                 false_h = env->entries[idx]->high_word;
2191         } else {
2192                 /* still not ready */
2193                 pdeq_putr(env->waitq, mux);
2194                 return;
2195         }  /* if */
2196
2197
2198         sel = get_Mux_sel(mux);
2199
2200         dbg   = get_irn_dbg_info(mux);
2201         block = get_nodes_block(mux);
2202
2203         idx = get_irn_idx(mux);
2204         assert(idx < env->n_entries);
2205         env->entries[idx]->low_word  = new_rd_Mux(dbg, irg, block, sel, false_l, true_l, mode);
2206         env->entries[idx]->high_word = new_rd_Mux(dbg, irg, block, sel, false_h, true_h, mode);
2207 }  /* lower_Mux */
2208
2209 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env)
2210 {
2211         ir_mode *his = env->params->high_signed;
2212         ir_mode *hiu = env->params->high_unsigned;
2213         int      i;
2214         ir_node *n;
2215
2216         (void)mode;
2217
2218         for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2219                 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2220                 if (op_mode == his || op_mode == hiu) {
2221                         panic("lowering ASM unimplemented");
2222                 }
2223         }
2224
2225         for (n = asmn;;) {
2226                 ir_mode *proj_mode;
2227
2228                 n = get_irn_link(n);
2229                 if (n == NULL)
2230                         break;
2231
2232                 proj_mode = get_irn_mode(n);
2233                 if (proj_mode == his || proj_mode == hiu) {
2234                         panic("lowering ASM unimplemented");
2235                 }
2236         }
2237 }
2238
2239 /**
2240  * check for opcodes that must always be lowered.
2241  */
2242 static int always_lower(ir_opcode code) {
2243         switch (code) {
2244         case iro_ASM:
2245         case iro_Proj:
2246         case iro_Start:
2247         case iro_Call:
2248         case iro_Return:
2249         case iro_Cond:
2250         case iro_Conv:
2251                 return 1;
2252         default:
2253                 return 0;
2254         }  /* switch */
2255 }  /* always_lower */
2256
2257 /**
2258  * lower boolean Proj(Cmp)
2259  */
2260 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2261         int      lidx, ridx;
2262         ir_node  *l, *r, *low, *high, *t, *res;
2263         pn_Cmp   pnc;
2264         ir_node  *blk;
2265         ir_graph *irg = current_ir_graph;
2266         dbg_info *db;
2267
2268         l    = get_Cmp_left(cmp);
2269         lidx = get_irn_idx(l);
2270         if (! env->entries[lidx]->low_word) {
2271                 /* still not ready */
2272                 return NULL;
2273         }  /* if */
2274
2275         r    = get_Cmp_right(cmp);
2276         ridx = get_irn_idx(r);
2277         if (! env->entries[ridx]->low_word) {
2278                 /* still not ready */
2279                 return NULL;
2280         }  /* if */
2281
2282         pnc  = get_Proj_proj(proj);
2283         blk  = get_nodes_block(cmp);
2284         db   = get_irn_dbg_info(cmp);
2285         low  = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2286         high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2287
2288         if (pnc == pn_Cmp_Eq) {
2289                 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2290                 res = new_rd_And(db, irg, blk,
2291                         new_r_Proj(irg, blk, low, mode_b, pnc),
2292                         new_r_Proj(irg, blk, high, mode_b, pnc),
2293                         mode_b);
2294         } else if (pnc == pn_Cmp_Lg) {
2295                 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2296                 res = new_rd_Or(db, irg, blk,
2297                         new_r_Proj(irg, blk, low, mode_b, pnc),
2298                         new_r_Proj(irg, blk, high, mode_b, pnc),
2299                         mode_b);
2300         } else {
2301                 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2302                 t = new_rd_And(db, irg, blk,
2303                         new_r_Proj(irg, blk, low, mode_b, pnc),
2304                         new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2305                         mode_b);
2306                 res = new_rd_Or(db, irg, blk,
2307                         new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2308                         t,
2309                         mode_b);
2310         }  /* if */
2311         return res;
2312 }  /* lower_boolean_Proj_Cmp */
2313
2314 /**
2315  * The type of a lower function.
2316  *
2317  * @param node   the node to be lowered
2318  * @param mode   the low mode for the destination node
2319  * @param env    the lower environment
2320  */
2321 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2322
2323 /**
2324  * Lower a node.
2325  */
2326 static void lower_ops(ir_node *node, void *env)
2327 {
2328         lower_env_t  *lenv = env;
2329         node_entry_t *entry;
2330         int          idx = get_irn_idx(node);
2331         ir_mode      *mode = get_irn_mode(node);
2332
2333         if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2334                 int i;
2335
2336                 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2337                         ir_node *proj = get_irn_n(node, i);
2338
2339                         if (is_Proj(proj)) {
2340                                 ir_node *cmp = get_Proj_pred(proj);
2341
2342                                 if (is_Cmp(cmp)) {
2343                                         ir_node *arg = get_Cmp_left(cmp);
2344
2345                                         mode = get_irn_mode(arg);
2346                                         if (mode == lenv->params->high_signed ||
2347                                                 mode == lenv->params->high_unsigned) {
2348                                                 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2349
2350                                                 if (res == NULL) {
2351                                                         /* could not lower because predecessors not ready */
2352                                                         waitq_put(lenv->waitq, node);
2353                                                         return;
2354                                                 }  /* if */
2355                                                 set_irn_n(node, i, res);
2356                                         }  /* if */
2357                                 }  /* if */
2358                         }  /* if */
2359                 }  /* for */
2360         }  /* if */
2361
2362         entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2363         if (entry || always_lower(get_irn_opcode(node))) {
2364                 ir_op      *op = get_irn_op(node);
2365                 lower_func func = (lower_func)op->ops.generic;
2366
2367                 if (func) {
2368                         mode = get_irn_op_mode(node);
2369
2370                         if (mode == lenv->params->high_signed)
2371                                 mode = lenv->params->low_signed;
2372                         else
2373                                 mode = lenv->params->low_unsigned;
2374
2375                         DB((dbg, LEVEL_1, "  %+F\n", node));
2376                         func(node, mode, lenv);
2377                 }  /* if */
2378         }  /* if */
2379 }  /* lower_ops */
2380
2381 #define IDENT(s)  new_id_from_chars(s, sizeof(s)-1)
2382
2383 /**
2384  * Compare two op_mode_entry_t's.
2385  */
2386 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2387         const op_mode_entry_t *e1 = elt;
2388         const op_mode_entry_t *e2 = key;
2389         (void) size;
2390
2391         return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2392 }  /* cmp_op_mode */
2393
2394 /**
2395  * Compare two conv_tp_entry_t's.
2396  */
2397 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2398         const conv_tp_entry_t *e1 = elt;
2399         const conv_tp_entry_t *e2 = key;
2400         (void) size;
2401
2402         return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2403 }  /* static int cmp_conv_tp */
2404
2405 /**
2406  * Enter a lowering function into an ir_op.
2407  */
2408 static void enter_lower_func(ir_op *op, lower_func func) {
2409         op->ops.generic = (op_func)func;
2410 }
2411
2412 /*
2413  * Do the lowering.
2414  */
2415 void lower_dw_ops(const lwrdw_param_t *param)
2416 {
2417         lower_env_t lenv;
2418         int i;
2419         ir_graph *rem;
2420
2421         if (! param)
2422                 return;
2423
2424         if (! param->enable)
2425                 return;
2426
2427         FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2428
2429         assert(2 * get_mode_size_bits(param->low_signed)   == get_mode_size_bits(param->high_signed));
2430         assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2431         assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2432
2433         /* create the necessary maps */
2434         if (! prim_types)
2435                 prim_types = pmap_create();
2436         if (! intrinsic_fkt)
2437                 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2438         if (! conv_types)
2439                 conv_types = new_set(cmp_conv_tp, 16);
2440         if (! lowered_type)
2441                 lowered_type = pmap_create();
2442
2443         /* create a primitive unsigned and signed type */
2444         if (! tp_u)
2445                 tp_u = get_primitive_type(param->low_unsigned);
2446         if (! tp_s)
2447                 tp_s = get_primitive_type(param->low_signed);
2448
2449         /* create method types for the created binop calls */
2450         if (! binop_tp_u) {
2451                 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2452                 set_method_param_type(binop_tp_u, 0, tp_u);
2453                 set_method_param_type(binop_tp_u, 1, tp_u);
2454                 set_method_param_type(binop_tp_u, 2, tp_u);
2455                 set_method_param_type(binop_tp_u, 3, tp_u);
2456                 set_method_res_type(binop_tp_u, 0, tp_u);
2457                 set_method_res_type(binop_tp_u, 1, tp_u);
2458         }  /* if */
2459         if (! binop_tp_s) {
2460                 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2461                 set_method_param_type(binop_tp_s, 0, tp_u);
2462                 set_method_param_type(binop_tp_s, 1, tp_s);
2463                 set_method_param_type(binop_tp_s, 2, tp_u);
2464                 set_method_param_type(binop_tp_s, 3, tp_s);
2465                 set_method_res_type(binop_tp_s, 0, tp_u);
2466                 set_method_res_type(binop_tp_s, 1, tp_s);
2467         }  /* if */
2468         if (! shiftop_tp_u) {
2469                 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2470                 set_method_param_type(shiftop_tp_u, 0, tp_u);
2471                 set_method_param_type(shiftop_tp_u, 1, tp_u);
2472                 set_method_param_type(shiftop_tp_u, 2, tp_u);
2473                 set_method_res_type(shiftop_tp_u, 0, tp_u);
2474                 set_method_res_type(shiftop_tp_u, 1, tp_u);
2475         }  /* if */
2476         if (! shiftop_tp_s) {
2477                 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2478                 set_method_param_type(shiftop_tp_s, 0, tp_u);
2479                 set_method_param_type(shiftop_tp_s, 1, tp_s);
2480                 set_method_param_type(shiftop_tp_s, 2, tp_u);
2481                 set_method_res_type(shiftop_tp_s, 0, tp_u);
2482                 set_method_res_type(shiftop_tp_s, 1, tp_s);
2483         }  /* if */
2484         if (! unop_tp_u) {
2485                 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2486                 set_method_param_type(unop_tp_u, 0, tp_u);
2487                 set_method_param_type(unop_tp_u, 1, tp_u);
2488                 set_method_res_type(unop_tp_u, 0, tp_u);
2489                 set_method_res_type(unop_tp_u, 1, tp_u);
2490         }  /* if */
2491         if (! unop_tp_s) {
2492                 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2493                 set_method_param_type(unop_tp_s, 0, tp_u);
2494                 set_method_param_type(unop_tp_s, 1, tp_s);
2495                 set_method_res_type(unop_tp_s, 0, tp_u);
2496                 set_method_res_type(unop_tp_s, 1, tp_s);
2497         }  /* if */
2498
2499         lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), param->low_unsigned);
2500         lenv.tv_mode_bits  = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), param->low_unsigned);
2501         lenv.waitq         = new_pdeq();
2502         lenv.params        = param;
2503
2504         /* first clear the generic function pointer for all ops */
2505         clear_irp_opcodes_generic_func();
2506
2507 #define LOWER2(op, fkt)   enter_lower_func(op_##op, fkt)
2508 #define LOWER(op)         LOWER2(op, lower_##op)
2509 #define LOWER_BIN(op)     LOWER2(op, lower_Binop)
2510 #define LOWER_UN(op)      LOWER2(op, lower_Unop)
2511
2512         /* the table of all operations that must be lowered follows */
2513         LOWER(ASM);
2514         LOWER(Load);
2515         LOWER(Store);
2516         LOWER(Const);
2517         LOWER(And);
2518         LOWER(Or);
2519         LOWER(Eor);
2520         LOWER(Not);
2521         LOWER(Cond);
2522         LOWER(Return);
2523         LOWER(Call);
2524         LOWER(Unknown);
2525         LOWER(Phi);
2526         LOWER(Mux);
2527         LOWER(Start);
2528
2529         LOWER_BIN(Add);
2530         LOWER_BIN(Sub);
2531         LOWER_BIN(Mul);
2532         LOWER(Shl);
2533         LOWER(Shr);
2534         LOWER(Shrs);
2535         LOWER(Rotl);
2536         LOWER(DivMod);
2537         LOWER(Div);
2538         LOWER(Mod);
2539         LOWER_UN(Abs);
2540         LOWER_UN(Minus);
2541
2542         LOWER(Conv);
2543
2544 #undef LOWER_UN
2545 #undef LOWER_BIN
2546 #undef LOWER
2547 #undef LOWER2
2548
2549         /* transform all graphs */
2550         rem = current_ir_graph;
2551         for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2552                 ir_graph *irg = get_irp_irg(i);
2553                 int n_idx;
2554
2555                 obstack_init(&lenv.obst);
2556
2557                 n_idx = get_irg_last_idx(irg);
2558                 n_idx = n_idx + (n_idx >> 2);  /* add 25% */
2559                 lenv.n_entries = n_idx;
2560                 lenv.entries   = NEW_ARR_F(node_entry_t *, n_idx);
2561                 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2562
2563                 /* first step: link all nodes and allocate data */
2564                 lenv.flags = 0;
2565                 lenv.proj_2_block = pmap_create();
2566
2567                 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2568
2569                 irg_walk_graph(irg, firm_clear_node_and_phi_links, prepare_links_and_handle_rotl, &lenv);
2570
2571                 if (lenv.flags & MUST_BE_LOWERED) {
2572                         DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2573
2574                         /* must do some work */
2575                         irg_walk_graph(irg, NULL, lower_ops, &lenv);
2576
2577                         /* last step: all waiting nodes */
2578                         DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2579                         current_ir_graph = irg;
2580                         while (! pdeq_empty(lenv.waitq)) {
2581                                 ir_node *node = pdeq_getl(lenv.waitq);
2582
2583                                 lower_ops(node, &lenv);
2584                         }  /* while */
2585
2586                         ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2587
2588                         /* outs are invalid, we changed the graph */
2589                         set_irg_outs_inconsistent(irg);
2590
2591                         if (lenv.flags & CF_CHANGED) {
2592                                 /* control flow changed, dominance info is invalid */
2593                                 set_irg_doms_inconsistent(irg);
2594                                 set_irg_extblk_inconsistent(irg);
2595                                 set_irg_loopinfo_inconsistent(irg);
2596                         }  /* if */
2597                 } else {
2598                         ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2599                 }  /* if */
2600                 pmap_destroy(lenv.proj_2_block);
2601                 DEL_ARR_F(lenv.entries);
2602                 obstack_free(&lenv.obst, NULL);
2603         }  /* for */
2604         del_pdeq(lenv.waitq);
2605         current_ir_graph = rem;
2606 }  /* lower_dw_ops */
2607
2608 /* Default implementation. */
2609 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2610                                     const ir_mode *imode, const ir_mode *omode,
2611                                     void *context)
2612 {
2613         char buf[64];
2614         ident *id;
2615         ir_entity *ent;
2616         (void) context;
2617
2618         if (imode == omode) {
2619                 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2620         } else {
2621                 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2622                         get_mode_name(imode), get_mode_name(omode));
2623         }  /* if */
2624         id = new_id_from_str(buf);
2625
2626         ent = new_entity(get_glob_type(), id, method);
2627         set_entity_ld_ident(ent, get_entity_ident(ent));
2628         set_entity_visibility(ent, visibility_external_allocated);
2629         return ent;
2630 }  /* def_create_intrinsic_fkt */