nsz Git - libfirm/blob - ir/lower/lower_dw.c

   1 /*
   2  * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
   3  *
   4  * This file is part of libFirm.
   5  *
   6  * This file may be distributed and/or modified under the terms of the
   7  * GNU General Public License version 2 as published by the Free Software
   8  * Foundation and appearing in the file LICENSE.GPL included in the
   9  * packaging of this file.
  10  *
  11  * Licensees holding valid libFirm Professional Edition licenses may use
  12  * this file in accordance with the libFirm Commercial License.
  13  * Agreement provided with the Software.
  14  *
  15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
  16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE.
  18  */
  19
  20 /**
  21  * @file
  22  * @brief   Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
  23  * @date    8.10.2004
  24  * @author  Michael Beck
  25  * @version $Id$
  26  */
  27 #include "config.h"
  28
  29 #ifdef HAVE_STRING_H
  30 # include <string.h>
  31 #endif
  32 #ifdef HAVE_STDLIB_H
  33 # include <stdlib.h>
  34 #endif
  35
  36 #include <assert.h>
  37
  38 #include "error.h"
  39 #include "lowering.h"
  40 #include "irnode_t.h"
  41 #include "irgraph_t.h"
  42 #include "irmode_t.h"
  43 #include "iropt_t.h"
  44 #include "irgmod.h"
  45 #include "tv_t.h"
  46 #include "dbginfo_t.h"
  47 #include "iropt_dbg.h"
  48 #include "irflag_t.h"
  49 #include "firmstat.h"
  50 #include "irgwalk.h"
  51 #include "ircons.h"
  52 #include "irflag.h"
  53 #include "irtools.h"
  54 #include "debug.h"
  55 #include "set.h"
  56 #include "pmap.h"
  57 #include "pdeq.h"
  58 #include "irdump.h"
  59 #include "array_t.h"
  60
  61 /** A map from mode to a primitive type. */
  62 static pmap *prim_types;
  63
  64 /** A map from (op, imode, omode) to Intrinsic functions entities. */
  65 static set *intrinsic_fkt;
  66
  67 /** A map from (imode, omode) to conv function types. */
  68 static set *conv_types;
  69
  70 /** A map from a method type to its lowered type. */
  71 static pmap *lowered_type;
  72
  73 /** The types for the binop and unop intrinsics. */
  74 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
  75
  76 /** the debug handle */
  77 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
  78
  79 /**
  80  * An entry in the (op, imode, omode) -> entity map.
  81  */
  82 typedef struct _op_mode_entry {
  83         const ir_op   *op;    /**< the op */
  84         const ir_mode *imode; /**< the input mode */
  85         const ir_mode *omode; /**< the output mode */
  86         ir_entity     *ent;   /**< the associated entity of this (op, imode, omode) triple */
  87 } op_mode_entry_t;
  88
  89 /**
  90  * An entry in the (imode, omode) -> tp map.
  91  */
  92 typedef struct _conv_tp_entry {
  93         const ir_mode *imode; /**< the input mode */
  94         const ir_mode *omode; /**< the output mode */
  95         ir_type       *mtd;   /**< the associated method type of this (imode, omode) pair */
  96 } conv_tp_entry_t;
  97
  98 /**
  99  * Every double word node will be replaced,
 100  * we need some store to hold the replacement:
 101  */
 102 typedef struct _node_entry_t {
 103         ir_node *low_word;    /**< the low word */
 104         ir_node *high_word;   /**< the high word */
 105 } node_entry_t;
 106
 107 enum lower_flags {
 108         MUST_BE_LOWERED = 1,  /**< graph must be lowered */
 109         CF_CHANGED      = 2,  /**< control flow was changed */
 110 };
 111
 112 /**
 113  * The lower environment.
 114  */
 115 typedef struct _lower_env_t {
 116         node_entry_t **entries;       /**< entries per node */
 117         struct obstack obst;          /**< an obstack holding the temporary data */
 118         tarval   *tv_mode_bytes;      /**< a tarval containing the number of bytes in the lowered modes */
 119         tarval   *tv_mode_bits;       /**< a tarval containing the number of bits in the lowered modes */
 120         pdeq     *waitq;              /**< a wait queue of all nodes that must be handled later */
 121         pmap     *proj_2_block;       /**< a map from ProjX to its destination blocks */
 122         const lwrdw_param_t *params;  /**< transformation parameter */
 123         unsigned flags;               /**< some flags */
 124         int      n_entries;           /**< number of entries */
 125 } lower_env_t;
 126
 127 /**
 128  * Get a primitive mode for a mode.
 129  */
 130 static ir_type *get_primitive_type(ir_mode *mode) {
 131         pmap_entry *entry = pmap_find(prim_types, mode);
 132         ir_type *tp;
 133         char buf[64];
 134
 135         if (entry)
 136                 return entry->value;
 137
 138         snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
 139         tp = new_type_primitive(new_id_from_str(buf), mode);
 140
 141         pmap_insert(prim_types, mode, tp);
 142         return tp;
 143 }  /* get_primitive_type */
 144
 145 /**
 146  * Create a method type for a Conv emulation from imode to omode.
 147  */
 148 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
 149         conv_tp_entry_t key, *entry;
 150         ir_type *mtd;
 151
 152         key.imode = imode;
 153         key.omode = omode;
 154         key.mtd   = NULL;
 155
 156         entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
 157         if (! entry->mtd) {
 158                 int n_param = 1, n_res = 1;
 159                 char buf[64];
 160
 161                 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
 162                         n_param = 2;
 163                 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
 164                         n_res = 2;
 165
 166                 /* create a new one */
 167                 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
 168                 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
 169
 170                 /* set param types and result types */
 171                 n_param = 0;
 172                 if (imode == env->params->high_signed) {
 173                         set_method_param_type(mtd, n_param++, tp_u);
 174                         set_method_param_type(mtd, n_param++, tp_s);
 175                 } else if (imode == env->params->high_unsigned) {
 176                         set_method_param_type(mtd, n_param++, tp_u);
 177                         set_method_param_type(mtd, n_param++, tp_u);
 178                 } else {
 179                         ir_type *tp = get_primitive_type(imode);
 180                         set_method_param_type(mtd, n_param++, tp);
 181                 }  /* if */
 182
 183                 n_res = 0;
 184                 if (omode == env->params->high_signed) {
 185                         set_method_res_type(mtd, n_res++, tp_u);
 186                         set_method_res_type(mtd, n_res++, tp_s);
 187                 } else if (omode == env->params->high_unsigned) {
 188                         set_method_res_type(mtd, n_res++, tp_u);
 189                         set_method_res_type(mtd, n_res++, tp_u);
 190                 } else {
 191                         ir_type *tp = get_primitive_type(omode);
 192                         set_method_res_type(mtd, n_res++, tp);
 193                 }  /* if */
 194                 entry->mtd = mtd;
 195         } else {
 196                 mtd = entry->mtd;
 197         }  /* if */
 198         return mtd;
 199 }  /* get_conv_type */
 200
 201 /**
 202  * Add an additional control flow input to a block.
 203  * Patch all Phi nodes. The new Phi inputs are copied from
 204  * old input number nr.
 205  */
 206 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
 207 {
 208         int i, arity = get_irn_arity(block);
 209         ir_node **in, *phi;
 210
 211         assert(nr < arity);
 212
 213         NEW_ARR_A(ir_node *, in, arity + 1);
 214         for (i = 0; i < arity; ++i)
 215                 in[i] = get_irn_n(block, i);
 216         in[i] = cf;
 217
 218         set_irn_in(block, i + 1, in);
 219
 220         for (phi = get_Block_phis(block); phi != NULL; phi = get_Phi_next(phi)) {
 221                 for (i = 0; i < arity; ++i)
 222                         in[i] = get_irn_n(phi, i);
 223                 in[i] = in[nr];
 224                 set_irn_in(phi, i + 1, in);
 225         }  /* for */
 226 }  /* add_block_cf_input_nr */
 227
 228 /**
 229  * Add an additional control flow input to a block.
 230  * Patch all Phi nodes. The new Phi inputs are copied from
 231  * old input from cf tmpl.
 232  */
 233 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
 234 {
 235         int i, arity = get_irn_arity(block);
 236         int nr = 0;
 237
 238         for (i = 0; i < arity; ++i) {
 239                 if (get_irn_n(block, i) == tmpl) {
 240                         nr = i;
 241                         break;
 242                 }  /* if */
 243         }  /* for */
 244         assert(i < arity);
 245         add_block_cf_input_nr(block, nr, cf);
 246 }  /* add_block_cf_input */
 247
 248 /**
 249  * Return the "operational" mode of a Firm node.
 250  */
 251 static ir_mode *get_irn_op_mode(ir_node *node)
 252 {
 253         switch (get_irn_opcode(node)) {
 254         case iro_Load:
 255                 return get_Load_mode(node);
 256         case iro_Store:
 257                 return get_irn_mode(get_Store_value(node));
 258         case iro_DivMod:
 259                 return get_irn_mode(get_DivMod_left(node));
 260         case iro_Div:
 261                 return get_irn_mode(get_Div_left(node));
 262         case iro_Mod:
 263                 return get_irn_mode(get_Mod_left(node));
 264         case iro_Cmp:
 265                 return get_irn_mode(get_Cmp_left(node));
 266         default:
 267                 return get_irn_mode(node);
 268         }  /* switch */
 269 }  /* get_irn_op_mode */
 270
 271 /**
 272  * Walker, prepare the node links.
 273  */
 274 static void prepare_links(ir_node *node, void *env)
 275 {
 276         lower_env_t  *lenv = env;
 277         ir_mode      *mode = get_irn_op_mode(node);
 278         node_entry_t *link;
 279         int          i, idx;
 280
 281         if (mode == lenv->params->high_signed ||
 282                 mode == lenv->params->high_unsigned) {
 283                 /* ok, found a node that will be lowered */
 284                 link = obstack_alloc(&lenv->obst, sizeof(*link));
 285
 286                 memset(link, 0, sizeof(*link));
 287
 288                 idx = get_irn_idx(node);
 289                 if (idx >= lenv->n_entries) {
 290                         /* enlarge: this happens only for Rotl nodes which is RARELY */
 291                         int old = lenv->n_entries;
 292                         int n_idx = idx + (idx >> 3);
 293
 294                         ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
 295                         memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
 296                         lenv->n_entries = n_idx;
 297                 }
 298                 lenv->entries[idx] = link;
 299                 lenv->flags |= MUST_BE_LOWERED;
 300         } else if (is_Conv(node)) {
 301                 /* Conv nodes have two modes */
 302                 ir_node *pred = get_Conv_op(node);
 303                 mode = get_irn_mode(pred);
 304
 305                 if (mode == lenv->params->high_signed ||
 306                         mode == lenv->params->high_unsigned) {
 307                         /* must lower this node either but don't need a link */
 308                         lenv->flags |= MUST_BE_LOWERED;
 309                 }  /* if */
 310                 return;
 311         }  /* if */
 312
 313         if (is_Proj(node)) {
 314                 /* link all Proj nodes to its predecessor:
 315                    Note that Tuple Proj's and its Projs are linked either. */
 316                 ir_node *pred = get_Proj_pred(node);
 317
 318                 set_irn_link(node, get_irn_link(pred));
 319                 set_irn_link(pred, node);
 320         } else if (is_Phi(node)) {
 321                 /* link all Phi nodes to its block */
 322                 ir_node *block = get_nodes_block(node);
 323                 add_Block_phi(block, node);
 324         } else if (is_Block(node)) {
 325                 /* fill the Proj -> Block map */
 326                 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
 327                         ir_node *pred = get_Block_cfgpred(node, i);
 328
 329                         if (is_Proj(pred))
 330                                 pmap_insert(lenv->proj_2_block, pred, node);
 331                 }  /* for */
 332         }  /* if */
 333 }  /* prepare_links */
 334
 335 /**
 336  * Translate a Constant: create two.
 337  */
 338 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
 339         tarval   *tv, *tv_l, *tv_h;
 340         ir_node  *low, *high;
 341         dbg_info *dbg = get_irn_dbg_info(node);
 342         int      idx;
 343         ir_graph *irg = current_ir_graph;
 344         ir_mode  *low_mode = env->params->low_unsigned;
 345
 346         tv   = get_Const_tarval(node);
 347
 348         tv_l = tarval_convert_to(tv, low_mode);
 349         low  = new_rd_Const(dbg, irg, low_mode, tv_l);
 350
 351         tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
 352         high = new_rd_Const(dbg, irg, mode, tv_h);
 353
 354         idx = get_irn_idx(node);
 355         assert(idx < env->n_entries);
 356         env->entries[idx]->low_word  = low;
 357         env->entries[idx]->high_word = high;
 358 }  /* lower_Const */
 359
 360 /**
 361  * Translate a Load: create two.
 362  */
 363 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
 364         ir_mode  *low_mode = env->params->low_unsigned;
 365         ir_graph *irg = current_ir_graph;
 366         ir_node  *adr = get_Load_ptr(node);
 367         ir_node  *mem = get_Load_mem(node);
 368         ir_node  *low, *high, *proj;
 369         dbg_info *dbg;
 370         ir_node  *block = get_nodes_block(node);
 371         int      idx;
 372
 373         if (env->params->little_endian) {
 374                 low  = adr;
 375                 high = new_r_Add(irg, block, adr,
 376                         new_r_Const(irg, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
 377                         get_irn_mode(adr));
 378         } else {
 379                 low  = new_r_Add(irg, block, adr,
 380                         new_r_Const(irg, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
 381                         get_irn_mode(adr));
 382                 high = adr;
 383         }  /* if */
 384
 385         /* create two loads */
 386         dbg  = get_irn_dbg_info(node);
 387         low  = new_rd_Load(dbg, irg, block, mem,  low,  low_mode);
 388         proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
 389         high = new_rd_Load(dbg, irg, block, proj, high, mode);
 390
 391         set_Load_volatility(low,  get_Load_volatility(node));
 392         set_Load_volatility(high, get_Load_volatility(node));
 393
 394         idx = get_irn_idx(node);
 395         assert(idx < env->n_entries);
 396         env->entries[idx]->low_word  = low;
 397         env->entries[idx]->high_word = high;
 398
 399         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 400                 idx = get_irn_idx(proj);
 401
 402                 switch (get_Proj_proj(proj)) {
 403                 case pn_Load_M:         /* Memory result. */
 404                         /* put it to the second one */
 405                         set_Proj_pred(proj, high);
 406                         break;
 407                 case pn_Load_X_except:  /* Execution result if exception occurred. */
 408                         /* put it to the first one */
 409                         set_Proj_pred(proj, low);
 410                         break;
 411                 case pn_Load_res:       /* Result of load operation. */
 412                         assert(idx < env->n_entries);
 413                         env->entries[idx]->low_word  = new_r_Proj(irg, block, low,  low_mode, pn_Load_res);
 414                         env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode,     pn_Load_res);
 415                         break;
 416                 default:
 417                         assert(0 && "unexpected Proj number");
 418                 }  /* switch */
 419                 /* mark this proj: we have handled it already, otherwise we might fall into
 420                  * out new nodes. */
 421                 mark_irn_visited(proj);
 422         }  /* for */
 423 }  /* lower_Load */
 424
 425 /**
 426  * Translate a Store: create two.
 427  */
 428 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
 429         ir_graph *irg;
 430         ir_node  *block, *adr, *mem;
 431         ir_node  *low, *high, *irn, *proj;
 432         dbg_info *dbg;
 433         int      idx;
 434         node_entry_t *entry;
 435         (void) node;
 436         (void) mode;
 437
 438         irn = get_Store_value(node);
 439         entry = env->entries[get_irn_idx(irn)];
 440         assert(entry);
 441
 442         if (! entry->low_word) {
 443                 /* not ready yet, wait */
 444                 pdeq_putr(env->waitq, node);
 445                 return;
 446         }  /* if */
 447
 448         irg = current_ir_graph;
 449         adr = get_Store_ptr(node);
 450         mem = get_Store_mem(node);
 451         block = get_nodes_block(node);
 452
 453         if (env->params->little_endian) {
 454                 low  = adr;
 455                 high = new_r_Add(irg, block, adr,
 456                         new_r_Const(irg, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
 457                         get_irn_mode(adr));
 458         } else {
 459                 low  = new_r_Add(irg, block, adr,
 460                         new_r_Const(irg, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
 461                         get_irn_mode(adr));
 462                 high = adr;
 463         }  /* if */
 464
 465         /* create two Stores */
 466         dbg = get_irn_dbg_info(node);
 467         low  = new_rd_Store(dbg, irg, block, mem, low,  entry->low_word);
 468         proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
 469         high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
 470
 471         set_Store_volatility(low,  get_Store_volatility(node));
 472         set_Store_volatility(high, get_Store_volatility(node));
 473
 474         idx = get_irn_idx(node);
 475         assert(idx < env->n_entries);
 476         env->entries[idx]->low_word  = low;
 477         env->entries[idx]->high_word = high;
 478
 479         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 480                 idx = get_irn_idx(proj);
 481
 482                 switch (get_Proj_proj(proj)) {
 483                 case pn_Store_M:         /* Memory result. */
 484                         /* put it to the second one */
 485                         set_Proj_pred(proj, high);
 486                         break;
 487                 case pn_Store_X_except:  /* Execution result if exception occurred. */
 488                         /* put it to the first one */
 489                         set_Proj_pred(proj, low);
 490                         break;
 491                 default:
 492                         assert(0 && "unexpected Proj number");
 493                 }  /* switch */
 494                 /* mark this proj: we have handled it already, otherwise we might fall into
 495                  * out new nodes. */
 496                 mark_irn_visited(proj);
 497         }  /* for */
 498 }  /* lower_Store */
 499
 500 /**
 501  * Return a node containing the address of the intrinsic emulation function.
 502  *
 503  * @param method  the method type of the emulation function
 504  * @param op      the emulated ir_op
 505  * @param imode   the input mode of the emulated opcode
 506  * @param omode   the output mode of the emulated opcode
 507  * @param block   where the new mode is created
 508  * @param env     the lower environment
 509  */
 510 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
 511                                       ir_mode *imode, ir_mode *omode,
 512                                       ir_node *block, lower_env_t *env) {
 513         symconst_symbol sym;
 514         ir_entity *ent;
 515         op_mode_entry_t key, *entry;
 516
 517         key.op    = op;
 518         key.imode = imode;
 519         key.omode = omode;
 520         key.ent   = NULL;
 521
 522         entry = set_insert(intrinsic_fkt, &key, sizeof(key),
 523                                 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
 524         if (! entry->ent) {
 525                 /* create a new one */
 526                 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
 527
 528                 assert(ent && "Intrinsic creator must return an entity");
 529                 entry->ent = ent;
 530         } else {
 531                 ent = entry->ent;
 532         }  /* if */
 533         sym.entity_p = ent;
 534         return new_r_SymConst(current_ir_graph, block, mode_P_code, sym, symconst_addr_ent);
 535 }  /* get_intrinsic_address */
 536
 537 /**
 538  * Translate a Div.
 539  *
 540  * Create an intrinsic Call.
 541  */
 542 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
 543         ir_node  *block, *irn, *call, *proj;
 544         ir_node  *in[4];
 545         ir_mode  *opmode;
 546         dbg_info *dbg;
 547         ir_type  *mtp;
 548         int      idx;
 549         ir_graph *irg;
 550         node_entry_t *entry;
 551
 552         irn   = get_Div_left(node);
 553         entry = env->entries[get_irn_idx(irn)];
 554         assert(entry);
 555
 556         if (! entry->low_word) {
 557                 /* not ready yet, wait */
 558                 pdeq_putr(env->waitq, node);
 559                 return;
 560         }  /* if */
 561
 562         in[0] = entry->low_word;
 563         in[1] = entry->high_word;
 564
 565         irn   = get_Div_right(node);
 566         entry = env->entries[get_irn_idx(irn)];
 567         assert(entry);
 568
 569         if (! entry->low_word) {
 570                 /* not ready yet, wait */
 571                 pdeq_putr(env->waitq, node);
 572                 return;
 573         }  /* if */
 574
 575         in[2] = entry->low_word;
 576         in[3] = entry->high_word;
 577
 578         dbg   = get_irn_dbg_info(node);
 579         block = get_nodes_block(node);
 580         irg   = current_ir_graph;
 581
 582         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 583         opmode = get_irn_op_mode(node);
 584         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
 585         call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
 586                 irn, 4, in, mtp);
 587         set_irn_pinned(call, get_irn_pinned(node));
 588         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
 589
 590         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 591                 switch (get_Proj_proj(proj)) {
 592                 case pn_Div_M:         /* Memory result. */
 593                         /* reroute to the call */
 594                         set_Proj_pred(proj, call);
 595                         set_Proj_proj(proj, pn_Call_M_except);
 596                         break;
 597                 case pn_Div_X_except:  /* Execution result if exception occurred. */
 598                         /* reroute to the call */
 599                         set_Proj_pred(proj, call);
 600                         set_Proj_proj(proj, pn_Call_X_except);
 601                         break;
 602                 case pn_Div_res:       /* Result of computation. */
 603                         idx = get_irn_idx(proj);
 604                         assert(idx < env->n_entries);
 605                         env->entries[idx]->low_word  = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
 606                         env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode,                      1);
 607                         break;
 608                 default:
 609                         assert(0 && "unexpected Proj number");
 610                 }  /* switch */
 611                 /* mark this proj: we have handled it already, otherwise we might fall into
 612                  * out new nodes. */
 613                 mark_irn_visited(proj);
 614         }  /* for */
 615 }  /* lower_Div */
 616
 617 /**
 618  * Translate a Mod.
 619  *
 620  * Create an intrinsic Call.
 621  */
 622 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
 623         ir_node  *block, *proj, *irn, *call;
 624         ir_node  *in[4];
 625         ir_mode  *opmode;
 626         dbg_info *dbg;
 627         ir_type  *mtp;
 628         int      idx;
 629         ir_graph *irg;
 630         node_entry_t *entry;
 631
 632         irn   = get_Mod_left(node);
 633         entry = env->entries[get_irn_idx(irn)];
 634         assert(entry);
 635
 636         if (! entry->low_word) {
 637                 /* not ready yet, wait */
 638                 pdeq_putr(env->waitq, node);
 639                 return;
 640         }  /* if */
 641
 642         in[0] = entry->low_word;
 643         in[1] = entry->high_word;
 644
 645         irn   = get_Mod_right(node);
 646         entry = env->entries[get_irn_idx(irn)];
 647         assert(entry);
 648
 649         if (! entry->low_word) {
 650                 /* not ready yet, wait */
 651                 pdeq_putr(env->waitq, node);
 652                 return;
 653         }  /* if */
 654
 655         in[2] = entry->low_word;
 656         in[3] = entry->high_word;
 657
 658         dbg   = get_irn_dbg_info(node);
 659         block = get_nodes_block(node);
 660         irg   = current_ir_graph;
 661
 662         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 663         opmode = get_irn_op_mode(node);
 664         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
 665         call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
 666                 irn, 4, in, mtp);
 667         set_irn_pinned(call, get_irn_pinned(node));
 668         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
 669
 670         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 671                 switch (get_Proj_proj(proj)) {
 672                 case pn_Mod_M:         /* Memory result. */
 673                         /* reroute to the call */
 674                         set_Proj_pred(proj, call);
 675                         set_Proj_proj(proj, pn_Call_M_except);
 676                         break;
 677                 case pn_Mod_X_except:  /* Execution result if exception occurred. */
 678                         /* reroute to the call */
 679                         set_Proj_pred(proj, call);
 680                         set_Proj_proj(proj, pn_Call_X_except);
 681                         break;
 682                 case pn_Mod_res:       /* Result of computation. */
 683                         idx = get_irn_idx(proj);
 684                         assert(idx < env->n_entries);
 685                         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 686                         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 687                         break;
 688                 default:
 689                         assert(0 && "unexpected Proj number");
 690                 }  /* switch */
 691                 /* mark this proj: we have handled it already, otherwise we might fall into
 692                  * out new nodes. */
 693                 mark_irn_visited(proj);
 694         }  /* for */
 695 }  /* lower_Mod */
 696
 697 /**
 698  * Translate a DivMod.
 699  *
 700  * Create two intrinsic Calls.
 701  */
 702 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
 703         ir_node  *block, *proj, *irn, *mem, *callDiv, *callMod;
 704         ir_node  *resDiv = NULL;
 705         ir_node  *resMod = NULL;
 706         ir_node  *in[4];
 707         ir_mode  *opmode;
 708         dbg_info *dbg;
 709         ir_type  *mtp;
 710         int      idx;
 711         node_entry_t *entry;
 712         unsigned flags = 0;
 713         ir_graph *irg;
 714
 715         /* check if both results are needed */
 716         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 717                 switch (get_Proj_proj(proj)) {
 718                 case pn_DivMod_res_div: flags |= 1; break;
 719                 case pn_DivMod_res_mod: flags |= 2; break;
 720                 default: break;
 721                 }  /* switch */
 722         }  /* for */
 723
 724         irn   = get_DivMod_left(node);
 725         entry = env->entries[get_irn_idx(irn)];
 726         assert(entry);
 727
 728         if (! entry->low_word) {
 729                 /* not ready yet, wait */
 730                 pdeq_putr(env->waitq, node);
 731                 return;
 732         }  /* if */
 733
 734         in[0] = entry->low_word;
 735         in[1] = entry->high_word;
 736
 737         irn   = get_DivMod_right(node);
 738         entry = env->entries[get_irn_idx(irn)];
 739         assert(entry);
 740
 741         if (! entry->low_word) {
 742                 /* not ready yet, wait */
 743                 pdeq_putr(env->waitq, node);
 744                 return;
 745         }  /* if */
 746
 747         in[2] = entry->low_word;
 748         in[3] = entry->high_word;
 749
 750         dbg   = get_irn_dbg_info(node);
 751         block = get_nodes_block(node);
 752         irg   = current_ir_graph;
 753
 754         mem = get_DivMod_mem(node);
 755
 756         callDiv = callMod = NULL;
 757         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 758         if (flags & 1) {
 759                 opmode = get_irn_op_mode(node);
 760                 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
 761                 callDiv = new_rd_Call(dbg, irg, block, mem,
 762                         irn, 4, in, mtp);
 763                 set_irn_pinned(callDiv, get_irn_pinned(node));
 764                 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
 765         }  /* if */
 766         if (flags & 2) {
 767                 if (flags & 1)
 768                         mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
 769                 opmode = get_irn_op_mode(node);
 770                 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
 771                 callMod = new_rd_Call(dbg, irg, block, mem,
 772                         irn, 4, in, mtp);
 773                 set_irn_pinned(callMod, get_irn_pinned(node));
 774                 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
 775         }  /* if */
 776
 777         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 778                 switch (get_Proj_proj(proj)) {
 779                 case pn_DivMod_M:         /* Memory result. */
 780                         /* reroute to the first call */
 781                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
 782                         set_Proj_proj(proj, pn_Call_M_except);
 783                         break;
 784                 case pn_DivMod_X_except:  /* Execution result if exception occurred. */
 785                         /* reroute to the first call */
 786                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
 787                         set_Proj_proj(proj, pn_Call_X_except);
 788                         break;
 789                 case pn_DivMod_res_div:   /* Result of Div. */
 790                         idx = get_irn_idx(proj);
 791                         assert(idx < env->n_entries);
 792                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
 793                         env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode,                      1);
 794                         break;
 795                 case pn_DivMod_res_mod:   /* Result of Mod. */
 796                         idx = get_irn_idx(proj);
 797                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
 798                         env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode,                      1);
 799                         break;
 800                 default:
 801                         assert(0 && "unexpected Proj number");
 802                 }  /* switch */
 803                 /* mark this proj: we have handled it already, otherwise we might fall into
 804                  * out new nodes. */
 805                 mark_irn_visited(proj);
 806         }  /* for */
 807 }  /* lower_DivMod */
 808
 809 /**
 810  * Translate a Binop.
 811  *
 812  * Create an intrinsic Call.
 813  */
 814 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
 815         ir_node  *block, *irn;
 816         ir_node  *in[4];
 817         dbg_info *dbg;
 818         ir_type  *mtp;
 819         int      idx;
 820         ir_graph *irg;
 821         node_entry_t *entry;
 822
 823         irn   = get_binop_left(node);
 824         entry = env->entries[get_irn_idx(irn)];
 825         assert(entry);
 826
 827         if (! entry->low_word) {
 828                 /* not ready yet, wait */
 829                 pdeq_putr(env->waitq, node);
 830                 return;
 831         }  /* if */
 832
 833         in[0] = entry->low_word;
 834         in[1] = entry->high_word;
 835
 836         irn   = get_binop_right(node);
 837         entry = env->entries[get_irn_idx(irn)];
 838         assert(entry);
 839
 840         if (! entry->low_word) {
 841                 /* not ready yet, wait */
 842                 pdeq_putr(env->waitq, node);
 843                 return;
 844         }  /* if */
 845
 846         in[2] = entry->low_word;
 847         in[3] = entry->high_word;
 848
 849         dbg   = get_irn_dbg_info(node);
 850         block = get_nodes_block(node);
 851         irg   = current_ir_graph;
 852
 853         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 854         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
 855         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
 856                 irn, 4, in, mtp);
 857         set_irn_pinned(irn, get_irn_pinned(node));
 858         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
 859
 860         idx = get_irn_idx(node);
 861         assert(idx < env->n_entries);
 862         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 863         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 864 }  /* lower_Binop */
 865
 866 /**
 867  * Translate a Shiftop.
 868  *
 869  * Create an intrinsic Call.
 870  */
 871 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
 872         ir_node  *block, *irn;
 873         ir_node  *in[3];
 874         dbg_info *dbg;
 875         ir_type  *mtp;
 876         int      idx;
 877         ir_graph *irg;
 878         node_entry_t *entry;
 879
 880         irn   = get_binop_left(node);
 881         entry = env->entries[get_irn_idx(irn)];
 882         assert(entry);
 883
 884         if (! entry->low_word) {
 885                 /* not ready yet, wait */
 886                 pdeq_putr(env->waitq, node);
 887                 return;
 888         }  /* if */
 889
 890         in[0] = entry->low_word;
 891         in[1] = entry->high_word;
 892
 893         /* The shift count is always mode_Iu in firm, so there is no need for lowering */
 894         in[2] = get_binop_right(node);
 895
 896         dbg   = get_irn_dbg_info(node);
 897         block = get_nodes_block(node);
 898         irg  = current_ir_graph;
 899
 900         mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
 901         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
 902         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
 903                 irn, 3, in, mtp);
 904         set_irn_pinned(irn, get_irn_pinned(node));
 905         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
 906
 907         idx = get_irn_idx(node);
 908         assert(idx < env->n_entries);
 909         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 910         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 911 }  /* lower_Shiftop */
 912
 913 /**
 914  * Translate a Shr and handle special cases.
 915  */
 916 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
 917         ir_node  *right = get_Shr_right(node);
 918         ir_graph *irg = current_ir_graph;
 919
 920         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 921                 tarval *tv = get_Const_tarval(right);
 922
 923                 if (tarval_is_long(tv) &&
 924                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 925                         ir_node *block = get_nodes_block(node);
 926                         ir_node *left = get_Shr_left(node);
 927                         ir_node *c;
 928                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 929                         int idx = get_irn_idx(left);
 930
 931                         left = env->entries[idx]->high_word;
 932                         idx = get_irn_idx(node);
 933
 934                         if (shf_cnt > 0) {
 935                                 c = new_r_Const_long(irg, env->params->low_unsigned, shf_cnt);
 936                                 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
 937                         } else {
 938                                 env->entries[idx]->low_word = left;
 939                         }  /* if */
 940                         env->entries[idx]->high_word = new_r_Const(irg, mode, get_mode_null(mode));
 941
 942                         return;
 943                 }  /* if */
 944         }  /* if */
 945         lower_Shiftop(node, mode, env);
 946 }  /* lower_Shr */
 947
 948 /**
 949  * Translate a Shl and handle special cases.
 950  */
 951 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
 952         ir_node  *right = get_Shl_right(node);
 953         ir_graph *irg = current_ir_graph;
 954
 955         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 956                 tarval *tv = get_Const_tarval(right);
 957
 958                 if (tarval_is_long(tv) &&
 959                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 960                         ir_mode *mode_l;
 961                         ir_node *block = get_nodes_block(node);
 962                         ir_node *left = get_Shl_left(node);
 963                         ir_node *c;
 964                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 965                         int idx = get_irn_idx(left);
 966
 967                         left = new_r_Conv(irg, block, env->entries[idx]->low_word, mode);
 968                         idx = get_irn_idx(node);
 969
 970                         mode_l = env->params->low_unsigned;
 971                         if (shf_cnt > 0) {
 972                                 c = new_r_Const_long(irg, mode_l, shf_cnt);
 973                                 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
 974                         } else {
 975                                 env->entries[idx]->high_word = left;
 976                         }  /* if */
 977                         env->entries[idx]->low_word  = new_r_Const(irg, mode_l, get_mode_null(mode_l));
 978
 979                         return;
 980                 }  /* if */
 981         }  /* if */
 982         lower_Shiftop(node, mode, env);
 983 }  /* lower_Shl */
 984
 985 /**
 986  * Translate a Shrs and handle special cases.
 987  */
 988 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
 989         ir_node  *right = get_Shrs_right(node);
 990         ir_graph *irg = current_ir_graph;
 991
 992         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 993                 tarval *tv = get_Const_tarval(right);
 994
 995                 if (tarval_is_long(tv) &&
 996                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 997                         ir_node *block   = get_nodes_block(node);
 998                         ir_node *left    = get_Shrs_left(node);
 999                         long     shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
1000                         int      idx     = get_irn_idx(left);
1001                         ir_mode *mode_l;
1002                         ir_node *low;
1003                         ir_node *c;
1004
1005                         left = env->entries[idx]->high_word;
1006                         idx = get_irn_idx(node);
1007
1008                         mode_l = env->params->low_unsigned;
1009                         if (shf_cnt > 0) {
1010                                 c   = new_r_Const_long(irg, mode_l, shf_cnt);
1011                                 low = new_r_Shrs(irg, block, left, c, mode);
1012                         } else {
1013                                 low = left;
1014                         }  /* if */
1015                         /* low word is expected to have mode_l */
1016                         env->entries[idx]->low_word = new_r_Conv(irg, block, low, mode_l);
1017
1018                         c = new_r_Const_long(irg, mode_l, get_mode_size_bits(mode) - 1);
1019                         env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1020
1021                         return;
1022                 }  /* if */
1023         }  /* if */
1024         lower_Shiftop(node, mode, env);
1025 }  /* lower_Shrs */
1026
1027 /**
1028  * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1029  */
1030 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1031         lower_env_t *lenv = env;
1032
1033         if (is_Rotl(node)) {
1034                 ir_mode *mode = get_irn_op_mode(node);
1035                         if (mode == lenv->params->high_signed ||
1036                             mode == lenv->params->high_unsigned) {
1037                                 ir_node  *right = get_Rotl_right(node);
1038                                 ir_node  *left, *shl, *shr, *or, *block, *sub, *c;
1039                                 ir_mode  *omode, *rmode;
1040                                 ir_graph *irg;
1041                                 dbg_info *dbg;
1042                                 optimization_state_t state;
1043
1044                                 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1045                                         tarval *tv = get_Const_tarval(right);
1046
1047                                         if (tarval_is_long(tv) &&
1048                                             get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1049                                                 /* will be optimized in lower_Rotl() */
1050                                                 return;
1051                                         }
1052                                 }
1053
1054                                 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1055                                 dbg   = get_irn_dbg_info(node);
1056                                 omode = get_irn_mode(node);
1057                                 left  = get_Rotl_left(node);
1058                                 irg   = current_ir_graph;
1059                                 block = get_nodes_block(node);
1060                                 shl   = new_rd_Shl(dbg, irg, block, left, right, omode);
1061                                 rmode = get_irn_mode(right);
1062                                 c     = new_Const_long(rmode, get_mode_size_bits(omode));
1063                                 sub   = new_rd_Sub(dbg, irg, block, c, right, rmode);
1064                                 shr   = new_rd_Shr(dbg, irg, block, left, sub, omode);
1065
1066                                 /* optimization must be switched off here, or we will get the Rotl back */
1067                                 save_optimization_state(&state);
1068                                 set_opt_algebraic_simplification(0);
1069                                 or = new_rd_Or(dbg, irg, block, shl, shr, omode);
1070                                 restore_optimization_state(&state);
1071
1072                                 exchange(node, or);
1073
1074                                 /* do lowering on the new nodes */
1075                                 prepare_links(shl, env);
1076                                 prepare_links(c, env);
1077                                 prepare_links(sub, env);
1078                                 prepare_links(shr, env);
1079                                 prepare_links(or, env);
1080                         }
1081         } else {
1082                 prepare_links(node, env);
1083         }
1084 }
1085
1086 /**
1087  * Translate a special case Rotl(x, sizeof(w)).
1088  */
1089 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1090         ir_node *right = get_Rotl_right(node);
1091         ir_node *left = get_Rotl_left(node);
1092         ir_node *h, *l;
1093         int idx = get_irn_idx(left);
1094         (void) right;
1095         (void) mode;
1096
1097         assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1098                is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1099                get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1100
1101         l = env->entries[idx]->low_word;
1102         h = env->entries[idx]->high_word;
1103         idx = get_irn_idx(node);
1104
1105         env->entries[idx]->low_word  = h;
1106         env->entries[idx]->high_word = l;
1107 }  /* lower_Rotl */
1108
1109 /**
1110  * Translate an Unop.
1111  *
1112  * Create an intrinsic Call.
1113  */
1114 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1115         ir_node  *block, *irn;
1116         ir_node  *in[2];
1117         dbg_info *dbg;
1118         ir_type  *mtp;
1119         int      idx;
1120         ir_graph *irg;
1121         node_entry_t *entry;
1122
1123         irn   = get_unop_op(node);
1124         entry = env->entries[get_irn_idx(irn)];
1125         assert(entry);
1126
1127         if (! entry->low_word) {
1128                 /* not ready yet, wait */
1129                 pdeq_putr(env->waitq, node);
1130                 return;
1131         }  /* if */
1132
1133         in[0] = entry->low_word;
1134         in[1] = entry->high_word;
1135
1136         dbg   = get_irn_dbg_info(node);
1137         block = get_nodes_block(node);
1138         irg   = current_ir_graph;
1139
1140         mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1141         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1142         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1143                 irn, 2, in, mtp);
1144         set_irn_pinned(irn, get_irn_pinned(node));
1145         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1146
1147         idx = get_irn_idx(node);
1148         assert(idx < env->n_entries);
1149         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1150         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
1151 }  /* lower_Unop */
1152
1153 /**
1154  * Translate a logical Binop.
1155  *
1156  * Create two logical Binops.
1157  */
1158 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1159                                                                 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1160         ir_node  *block, *irn;
1161         ir_node  *lop_l, *lop_h, *rop_l, *rop_h;
1162         dbg_info *dbg;
1163         int      idx;
1164         ir_graph *irg;
1165         node_entry_t *entry;
1166
1167         irn   = get_binop_left(node);
1168         entry = env->entries[get_irn_idx(irn)];
1169         assert(entry);
1170
1171         if (! entry->low_word) {
1172                 /* not ready yet, wait */
1173                 pdeq_putr(env->waitq, node);
1174                 return;
1175         }  /* if */
1176
1177         lop_l = entry->low_word;
1178         lop_h = entry->high_word;
1179
1180         irn   = get_binop_right(node);
1181         entry = env->entries[get_irn_idx(irn)];
1182         assert(entry);
1183
1184         if (! entry->low_word) {
1185                 /* not ready yet, wait */
1186                 pdeq_putr(env->waitq, node);
1187                 return;
1188         }  /* if */
1189
1190         rop_l = entry->low_word;
1191         rop_h = entry->high_word;
1192
1193         dbg = get_irn_dbg_info(node);
1194         block = get_nodes_block(node);
1195
1196         idx = get_irn_idx(node);
1197         assert(idx < env->n_entries);
1198         irg = current_ir_graph;
1199         env->entries[idx]->low_word  = constr_rd(dbg, irg, block, lop_l, rop_l, env->params->low_unsigned);
1200         env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1201 }  /* lower_Binop_logical */
1202
1203 /** create a logical operation transformation */
1204 #define lower_logical(op)                                                \
1205 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1206         lower_Binop_logical(node, mode, env, new_rd_##op);                   \
1207 }
1208
1209 lower_logical(And)
1210 lower_logical(Or)
1211 lower_logical(Eor)
1212
1213 /**
1214  * Translate a Not.
1215  *
1216  * Create two logical Nots.
1217  */
1218 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1219         ir_node  *block, *irn;
1220         ir_node  *op_l, *op_h;
1221         dbg_info *dbg;
1222         int      idx;
1223         ir_graph *irg;
1224         node_entry_t *entry;
1225
1226         irn   = get_Not_op(node);
1227         entry = env->entries[get_irn_idx(irn)];
1228         assert(entry);
1229
1230         if (! entry->low_word) {
1231                 /* not ready yet, wait */
1232                 pdeq_putr(env->waitq, node);
1233                 return;
1234         }  /* if */
1235
1236         op_l = entry->low_word;
1237         op_h = entry->high_word;
1238
1239         dbg   = get_irn_dbg_info(node);
1240         block = get_nodes_block(node);
1241         irg   = current_ir_graph;
1242
1243         idx = get_irn_idx(node);
1244         assert(idx < env->n_entries);
1245         env->entries[idx]->low_word  = new_rd_Not(dbg, current_ir_graph, block, op_l, env->params->low_unsigned);
1246         env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1247 }  /* lower_Not */
1248
1249 /**
1250  * Translate a Cond.
1251  */
1252 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1253         ir_node *cmp, *left, *right, *block;
1254         ir_node *sel = get_Cond_selector(node);
1255         ir_mode *m = get_irn_mode(sel);
1256         int     idx;
1257         (void) mode;
1258
1259         if (m == mode_b) {
1260                 node_entry_t *lentry, *rentry;
1261                 ir_node  *proj, *projT = NULL, *projF = NULL;
1262                 ir_node  *new_bl, *cmpH, *cmpL, *irn;
1263                 ir_node  *projHF, *projHT;
1264                 ir_node  *dst_blk;
1265                 ir_graph *irg;
1266                 pn_Cmp   pnc;
1267                 dbg_info *dbg;
1268
1269                 if(!is_Proj(sel))
1270                         return;
1271
1272                 cmp   = get_Proj_pred(sel);
1273                 if(!is_Cmp(cmp))
1274                         return;
1275
1276                 left  = get_Cmp_left(cmp);
1277                 idx   = get_irn_idx(left);
1278                 lentry = env->entries[idx];
1279
1280                 if (! lentry) {
1281                         /* a normal Cmp */
1282                         return;
1283                 }  /* if */
1284
1285                 right = get_Cmp_right(cmp);
1286                 idx   = get_irn_idx(right);
1287                 rentry = env->entries[idx];
1288                 assert(rentry);
1289
1290                 if (! lentry->low_word || !rentry->low_word) {
1291                         /* not yet ready */
1292                         pdeq_putr(env->waitq, node);
1293                         return;
1294                 }  /* if */
1295
1296                 /* all right, build the code */
1297                 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1298                         long proj_nr = get_Proj_proj(proj);
1299
1300                         if (proj_nr == pn_Cond_true) {
1301                                 assert(projT == NULL && "more than one Proj(true)");
1302                                 projT = proj;
1303                         } else {
1304                                 assert(proj_nr == pn_Cond_false);
1305                                 assert(projF == NULL && "more than one Proj(false)");
1306                                 projF = proj;
1307                         }  /* if */
1308                         mark_irn_visited(proj);
1309                 }  /* for */
1310                 assert(projT && projF);
1311
1312                 /* create a new high compare */
1313                 block = get_nodes_block(node);
1314                 dbg   = get_irn_dbg_info(cmp);
1315                 irg   = current_ir_graph;
1316                 pnc   = get_Proj_proj(sel);
1317
1318                 if (is_Const(right) && is_Const_null(right)) {
1319                         if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1320                                 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1321                                 ir_mode *mode = env->params->low_unsigned;
1322                                 ir_node *low  = new_r_Conv(irg, block, lentry->low_word, mode);
1323                                 ir_node *high = new_r_Conv(irg, block, lentry->high_word, mode);
1324                                 ir_node *or   = new_rd_Or(dbg, irg, block, low, high, mode);
1325                                 ir_node *cmp  = new_rd_Cmp(dbg, irg, block, or, new_Const_long(mode, 0));
1326
1327                                 ir_node *proj = new_r_Proj(irg, block, cmp, mode_b, pnc);
1328                                 set_Cond_selector(node, proj);
1329                                 return;
1330                         }
1331                 }
1332
1333                 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1334
1335                 if (pnc == pn_Cmp_Eq) {
1336                         /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1337                         pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1338
1339                         assert(entry);
1340                         dst_blk = entry->value;
1341
1342                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1343                         dbg = get_irn_dbg_info(node);
1344                         irn = new_rd_Cond(dbg, irg, block, irn);
1345
1346                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1347                         mark_irn_visited(projHF);
1348                         exchange(projF, projHF);
1349
1350                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1351                         mark_irn_visited(projHT);
1352
1353                         new_bl = new_r_Block(irg, 1, &projHT);
1354
1355                         dbg   = get_irn_dbg_info(cmp);
1356                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1357                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1358                         dbg = get_irn_dbg_info(node);
1359                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1360
1361                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1362                         mark_irn_visited(proj);
1363                         add_block_cf_input(dst_blk, projHF, proj);
1364
1365                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1366                         mark_irn_visited(proj);
1367                         exchange(projT, proj);
1368                 } else if (pnc == pn_Cmp_Lg) {
1369                         /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1370                         pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1371
1372                         assert(entry);
1373                         dst_blk = entry->value;
1374
1375                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1376                         dbg = get_irn_dbg_info(node);
1377                         irn = new_rd_Cond(dbg, irg, block, irn);
1378
1379                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1380                         mark_irn_visited(projHT);
1381                         exchange(projT, projHT);
1382
1383                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1384                         mark_irn_visited(projHF);
1385
1386                         new_bl = new_r_Block(irg, 1, &projHF);
1387
1388                         dbg   = get_irn_dbg_info(cmp);
1389                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1390                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1391                         dbg = get_irn_dbg_info(node);
1392                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1393
1394                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1395                         mark_irn_visited(proj);
1396                         add_block_cf_input(dst_blk, projHT, proj);
1397
1398                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1399                         mark_irn_visited(proj);
1400                         exchange(projF, proj);
1401                 } else {
1402                         /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1403                         ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1404                         pmap_entry *entry;
1405
1406                         entry = pmap_find(env->proj_2_block, projT);
1407                         assert(entry);
1408                         dstT = entry->value;
1409
1410                         entry = pmap_find(env->proj_2_block, projF);
1411                         assert(entry);
1412                         dstF = entry->value;
1413
1414                         irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1415                         dbg = get_irn_dbg_info(node);
1416                         irn = new_rd_Cond(dbg, irg, block, irn);
1417
1418                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1419                         mark_irn_visited(projHT);
1420                         exchange(projT, projHT);
1421                         projT = projHT;
1422
1423                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1424                         mark_irn_visited(projHF);
1425
1426                         newbl_eq = new_r_Block(irg, 1, &projHF);
1427
1428                         irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1429                         irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1430
1431                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1432                         mark_irn_visited(proj);
1433                         exchange(projF, proj);
1434                         projF = proj;
1435
1436                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1437                         mark_irn_visited(proj);
1438
1439                         newbl_l = new_r_Block(irg, 1, &proj);
1440
1441                         dbg   = get_irn_dbg_info(cmp);
1442                         cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1443                         irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1444                         dbg = get_irn_dbg_info(node);
1445                         irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1446
1447                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1448                         mark_irn_visited(proj);
1449                         add_block_cf_input(dstT, projT, proj);
1450
1451                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1452                         mark_irn_visited(proj);
1453                         add_block_cf_input(dstF, projF, proj);
1454                 }  /* if */
1455
1456                 /* we have changed the control flow */
1457                 env->flags |= CF_CHANGED;
1458         } else {
1459                 idx = get_irn_idx(sel);
1460
1461                 if (env->entries[idx]) {
1462                         /*
1463                            Bad, a jump-table with double-word index.
1464                            This should not happen, but if it does we handle
1465                            it like a Conv were between (in other words, ignore
1466                            the high part.
1467                          */
1468
1469                         if (! env->entries[idx]->low_word) {
1470                                 /* not ready yet, wait */
1471                                 pdeq_putr(env->waitq, node);
1472                                 return;
1473                         }  /* if */
1474                         set_Cond_selector(node, env->entries[idx]->low_word);
1475                 }  /* if */
1476         }  /* if */
1477 }  /* lower_Cond */
1478
1479 /**
1480  * Translate a Conv to higher_signed
1481  */
1482 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1483         ir_node  *op    = get_Conv_op(node);
1484         ir_mode  *imode = get_irn_mode(op);
1485         ir_mode  *dst_mode_l = env->params->low_unsigned;
1486         ir_mode  *dst_mode_h = env->params->low_signed;
1487         int      idx = get_irn_idx(node);
1488         ir_graph *irg = current_ir_graph;
1489         ir_node  *block = get_nodes_block(node);
1490         dbg_info *dbg = get_irn_dbg_info(node);
1491
1492         assert(idx < env->n_entries);
1493
1494         if (mode_is_int(imode) || mode_is_reference(imode)) {
1495                 if (imode == env->params->high_unsigned) {
1496                         /* a Conv from Lu to Ls */
1497                         int op_idx = get_irn_idx(op);
1498
1499                         if (! env->entries[op_idx]->low_word) {
1500                                 /* not ready yet, wait */
1501                                 pdeq_putr(env->waitq, node);
1502                                 return;
1503                         }  /* if */
1504                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word,  dst_mode_l);
1505                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h);
1506                 } else {
1507                         /* simple case: create a high word */
1508                         if (imode != dst_mode_l)
1509                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l);
1510
1511                         env->entries[idx]->low_word  = op;
1512
1513                         if (mode_is_signed(imode)) {
1514                                 ir_node *op_conv = new_rd_Conv(dbg, irg, block, op, dst_mode_h);
1515                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op_conv,
1516                                         new_Const_long(dst_mode_l, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1517                         } else {
1518                                 env->entries[idx]->high_word = new_Const(dst_mode_h, get_mode_null(dst_mode_h));
1519                         }  /* if */
1520                 }  /* if */
1521         } else {
1522                 ir_node *irn, *call;
1523                 ir_mode *omode = env->params->high_signed;
1524                 ir_type *mtp = get_conv_type(imode, omode, env);
1525
1526                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1527                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1528                 set_irn_pinned(call, get_irn_pinned(node));
1529                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1530
1531                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1532                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1533         }  /* if */
1534 }  /* lower_Conv_to_Ls */
1535
1536 /**
1537  * Translate a Conv to higher_unsigned
1538  */
1539 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1540         ir_node  *op    = get_Conv_op(node);
1541         ir_mode  *imode = get_irn_mode(op);
1542         ir_mode  *dst_mode = env->params->low_unsigned;
1543         int      idx = get_irn_idx(node);
1544         ir_graph *irg = current_ir_graph;
1545         ir_node  *block = get_nodes_block(node);
1546         dbg_info *dbg = get_irn_dbg_info(node);
1547
1548         assert(idx < env->n_entries);
1549
1550         if (mode_is_int(imode) || mode_is_reference(imode)) {
1551                 if (imode == env->params->high_signed) {
1552                         /* a Conv from Ls to Lu */
1553                         int op_idx = get_irn_idx(op);
1554
1555                         if (! env->entries[op_idx]->low_word) {
1556                                 /* not ready yet, wait */
1557                                 pdeq_putr(env->waitq, node);
1558                                 return;
1559                         }  /* if */
1560                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1561                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1562                 } else {
1563                         /* simple case: create a high word */
1564                         if (imode != dst_mode)
1565                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1566
1567                         env->entries[idx]->low_word  = op;
1568
1569                         if (mode_is_signed(imode)) {
1570                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1571                                         new_Const_long(dst_mode, get_mode_size_bits(dst_mode) - 1), dst_mode);
1572                         } else {
1573                                 env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
1574                         }  /* if */
1575                 }  /* if */
1576         } else {
1577                 ir_node *irn, *call;
1578                 ir_mode *omode = env->params->high_unsigned;
1579                 ir_type *mtp = get_conv_type(imode, omode, env);
1580
1581                 /* do an intrinsic call */
1582                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1583                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1584                 set_irn_pinned(call, get_irn_pinned(node));
1585                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1586
1587                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode, 0);
1588                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1589         }  /* if */
1590 }  /* lower_Conv_to_Lu */
1591
1592 /**
1593  * Translate a Conv from higher_signed
1594  */
1595 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1596         ir_node  *op    = get_Conv_op(node);
1597         ir_mode  *omode = get_irn_mode(node);
1598         ir_node  *block = get_nodes_block(node);
1599         dbg_info *dbg = get_irn_dbg_info(node);
1600         int      idx = get_irn_idx(op);
1601         ir_graph *irg = current_ir_graph;
1602
1603         assert(idx < env->n_entries);
1604
1605         if (! env->entries[idx]->low_word) {
1606                 /* not ready yet, wait */
1607                 pdeq_putr(env->waitq, node);
1608                 return;
1609         }  /* if */
1610
1611         if (mode_is_int(omode) || mode_is_reference(omode)) {
1612                 op = env->entries[idx]->low_word;
1613
1614                 /* simple case: create a high word */
1615                 if (omode != env->params->low_signed)
1616                         op = new_rd_Conv(dbg, irg, block, op, omode);
1617
1618                 set_Conv_op(node, op);
1619         } else {
1620                 ir_node *irn, *call, *in[2];
1621                 ir_mode *imode = env->params->high_signed;
1622                 ir_type *mtp = get_conv_type(imode, omode, env);
1623
1624                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1625                 in[0] = env->entries[idx]->low_word;
1626                 in[1] = env->entries[idx]->high_word;
1627
1628                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1629                 set_irn_pinned(call, get_irn_pinned(node));
1630                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1631
1632                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1633         }  /* if */
1634 }  /* lower_Conv_from_Ls */
1635
1636 /**
1637  * Translate a Conv from higher_unsigned
1638  */
1639 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1640         ir_node  *op    = get_Conv_op(node);
1641         ir_mode  *omode = get_irn_mode(node);
1642         ir_node  *block = get_nodes_block(node);
1643         dbg_info *dbg = get_irn_dbg_info(node);
1644         int      idx = get_irn_idx(op);
1645         ir_graph *irg = current_ir_graph;
1646
1647         assert(idx < env->n_entries);
1648
1649         if (! env->entries[idx]->low_word) {
1650                 /* not ready yet, wait */
1651                 pdeq_putr(env->waitq, node);
1652                 return;
1653         }  /* if */
1654
1655         if (mode_is_int(omode) || mode_is_reference(omode)) {
1656                 op = env->entries[idx]->low_word;
1657
1658                 /* simple case: create a high word */
1659                 if (omode != env->params->low_unsigned)
1660                         op = new_rd_Conv(dbg, irg, block, op, omode);
1661
1662                 set_Conv_op(node, op);
1663         } else {
1664                 ir_node *irn, *call, *in[2];
1665                 ir_mode *imode = env->params->high_unsigned;
1666                 ir_type *mtp = get_conv_type(imode, omode, env);
1667
1668                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1669                 in[0] = env->entries[idx]->low_word;
1670                 in[1] = env->entries[idx]->high_word;
1671
1672                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1673                 set_irn_pinned(call, get_irn_pinned(node));
1674                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1675
1676                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1677         }  /* if */
1678 }  /* lower_Conv_from_Lu */
1679
1680 /**
1681  * Translate a Conv.
1682  */
1683 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1684         mode = get_irn_mode(node);
1685
1686         if (mode == env->params->high_signed) {
1687                 lower_Conv_to_Ls(node, env);
1688         } else if (mode == env->params->high_unsigned) {
1689                 lower_Conv_to_Lu(node, env);
1690         } else {
1691                 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1692
1693                 if (mode == env->params->high_signed) {
1694                         lower_Conv_from_Ls(node, env);
1695                 } else if (mode == env->params->high_unsigned) {
1696                         lower_Conv_from_Lu(node, env);
1697                 }  /* if */
1698         }  /* if */
1699 }  /* lower_Conv */
1700
1701 /**
1702  * Lower the method type.
1703  */
1704 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1705         pmap_entry *entry;
1706         ident      *id;
1707         ir_type    *res;
1708
1709         if (is_lowered_type(mtp))
1710                 return mtp;
1711
1712         entry = pmap_find(lowered_type, mtp);
1713         if (! entry) {
1714                 int i, n, r, n_param, n_res;
1715
1716                 /* count new number of params */
1717                 n_param = n = get_method_n_params(mtp);
1718                 for (i = n_param - 1; i >= 0; --i) {
1719                         ir_type *tp = get_method_param_type(mtp, i);
1720
1721                         if (is_Primitive_type(tp)) {
1722                                 ir_mode *mode = get_type_mode(tp);
1723
1724                                 if (mode == env->params->high_signed ||
1725                                         mode == env->params->high_unsigned)
1726                                         ++n_param;
1727                         }  /* if */
1728                 }  /* for */
1729
1730                 /* count new number of results */
1731                 n_res = r = get_method_n_ress(mtp);
1732                 for (i = n_res - 1; i >= 0; --i) {
1733                         ir_type *tp = get_method_res_type(mtp, i);
1734
1735                         if (is_Primitive_type(tp)) {
1736                                 ir_mode *mode = get_type_mode(tp);
1737
1738                                 if (mode == env->params->high_signed ||
1739                                         mode == env->params->high_unsigned)
1740                                         ++n_res;
1741                         }  /* if */
1742                 }  /* for */
1743
1744                 id = id_mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1745                 res = new_type_method(id, n_param, n_res);
1746
1747                 /* set param types and result types */
1748                 for (i = n_param = 0; i < n; ++i) {
1749                         ir_type *tp = get_method_param_type(mtp, i);
1750
1751                         if (is_Primitive_type(tp)) {
1752                                 ir_mode *mode = get_type_mode(tp);
1753
1754                                 if (mode == env->params->high_signed) {
1755                                         set_method_param_type(res, n_param++, tp_u);
1756                                         set_method_param_type(res, n_param++, tp_s);
1757                                 } else if (mode == env->params->high_unsigned) {
1758                                         set_method_param_type(res, n_param++, tp_u);
1759                                         set_method_param_type(res, n_param++, tp_u);
1760                                 } else {
1761                                         set_method_param_type(res, n_param++, tp);
1762                                 }  /* if */
1763                         } else {
1764                                 set_method_param_type(res, n_param++, tp);
1765                         }  /* if */
1766                 }  /* for */
1767                 for (i = n_res = 0; i < r; ++i) {
1768                         ir_type *tp = get_method_res_type(mtp, i);
1769
1770                         if (is_Primitive_type(tp)) {
1771                                 ir_mode *mode = get_type_mode(tp);
1772
1773                                 if (mode == env->params->high_signed) {
1774                                         set_method_res_type(res, n_res++, tp_u);
1775                                         set_method_res_type(res, n_res++, tp_s);
1776                                 } else if (mode == env->params->high_unsigned) {
1777                                         set_method_res_type(res, n_res++, tp_u);
1778                                         set_method_res_type(res, n_res++, tp_u);
1779                                 } else {
1780                                         set_method_res_type(res, n_res++, tp);
1781                                 }  /* if */
1782                         } else {
1783                                 set_method_res_type(res, n_res++, tp);
1784                         }  /* if */
1785                 }  /* for */
1786                 set_lowered_type(mtp, res);
1787                 pmap_insert(lowered_type, mtp, res);
1788         } else {
1789                 res = entry->value;
1790         }  /* if */
1791         return res;
1792 }  /* lower_mtp */
1793
1794 /**
1795  * Translate a Return.
1796  */
1797 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1798         ir_graph  *irg = current_ir_graph;
1799         ir_entity *ent = get_irg_entity(irg);
1800         ir_type   *mtp = get_entity_type(ent);
1801         ir_node   **in;
1802         int       i, j, n, idx;
1803         int       need_conv = 0;
1804         (void) mode;
1805
1806         /* check if this return must be lowered */
1807         for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1808                 ir_node *pred = get_Return_res(node, i);
1809                 ir_mode *mode = get_irn_op_mode(pred);
1810
1811                 if (mode == env->params->high_signed ||
1812                         mode == env->params->high_unsigned) {
1813                         idx = get_irn_idx(pred);
1814                         if (! env->entries[idx]->low_word) {
1815                                 /* not ready yet, wait */
1816                                 pdeq_putr(env->waitq, node);
1817                                 return;
1818                         }  /* if */
1819                         need_conv = 1;
1820                 }  /* if */
1821         }  /* for */
1822         if (! need_conv)
1823                 return;
1824
1825         ent = get_irg_entity(irg);
1826         mtp = get_entity_type(ent);
1827
1828         mtp = lower_mtp(mtp, env);
1829         set_entity_type(ent, mtp);
1830
1831         /* create a new in array */
1832         NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1833         in[0] = get_Return_mem(node);
1834
1835         for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1836                 ir_node *pred = get_Return_res(node, i);
1837
1838                 idx = get_irn_idx(pred);
1839                 assert(idx < env->n_entries);
1840
1841                 if (env->entries[idx]) {
1842                         in[++j] = env->entries[idx]->low_word;
1843                         in[++j] = env->entries[idx]->high_word;
1844                 } else {
1845                         in[++j] = pred;
1846                 }  /* if */
1847         }  /* for */
1848
1849         set_irn_in(node, j+1, in);
1850 }  /* lower_Return */
1851
1852 /**
1853  * Translate the parameters.
1854  */
1855 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1856         ir_graph  *irg = current_ir_graph;
1857         ir_entity *ent = get_irg_entity(irg);
1858         ir_type   *tp  = get_entity_type(ent);
1859         ir_type   *mtp;
1860         long      *new_projs;
1861         int       i, j, n_params, rem;
1862         ir_node   *proj, *args;
1863         (void) mode;
1864
1865         if (is_lowered_type(tp)) {
1866                 mtp = get_associated_type(tp);
1867         } else {
1868                 mtp = tp;
1869         }  /* if */
1870         assert(! is_lowered_type(mtp));
1871
1872         n_params = get_method_n_params(mtp);
1873         if (n_params <= 0)
1874                 return;
1875
1876         NEW_ARR_A(long, new_projs, n_params);
1877
1878         /* first check if we have parameters that must be fixed */
1879         for (i = j = 0; i < n_params; ++i, ++j) {
1880                 ir_type *tp = get_method_param_type(mtp, i);
1881
1882                 new_projs[i] = j;
1883                 if (is_Primitive_type(tp)) {
1884                         ir_mode *mode = get_type_mode(tp);
1885
1886                         if (mode == env->params->high_signed ||
1887                                 mode == env->params->high_unsigned)
1888                                 ++j;
1889                 }  /* if */
1890         }  /* for */
1891         if (i == j)
1892                 return;
1893
1894         mtp = lower_mtp(mtp, env);
1895         set_entity_type(ent, mtp);
1896
1897         /* switch off optimization for new Proj nodes or they might be CSE'ed
1898            with not patched one's */
1899         rem = get_optimize();
1900         set_optimize(0);
1901
1902         /* ok, fix all Proj's and create new ones */
1903         args = get_irg_args(irg);
1904         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1905                 ir_node *pred = get_Proj_pred(proj);
1906                 long proj_nr;
1907                 int idx;
1908                 ir_mode *mode;
1909                 dbg_info *dbg;
1910
1911                 /* do not visit this node again */
1912                 mark_irn_visited(proj);
1913
1914                 if (pred != args)
1915                         continue;
1916
1917                 proj_nr = get_Proj_proj(proj);
1918                 set_Proj_proj(proj, new_projs[proj_nr]);
1919
1920                 idx = get_irn_idx(proj);
1921                 if (env->entries[idx]) {
1922                         ir_mode *low_mode = env->params->low_unsigned;
1923
1924                         mode = get_irn_mode(proj);
1925
1926                         if (mode == env->params->high_signed) {
1927                                 mode = env->params->low_signed;
1928                         } else {
1929                                 mode = env->params->low_unsigned;
1930                         }  /* if */
1931
1932                         dbg = get_irn_dbg_info(proj);
1933                         env->entries[idx]->low_word  =
1934                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1935                         env->entries[idx]->high_word =
1936                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1937                 }  /* if */
1938         }  /* for */
1939         set_optimize(rem);
1940 }  /* lower_Start */
1941
1942 /**
1943  * Translate a Call.
1944  */
1945 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1946         ir_graph *irg = current_ir_graph;
1947         ir_type  *tp = get_Call_type(node);
1948         ir_type  *call_tp;
1949         ir_node  **in, *proj, *results;
1950         int      n_params, n_res, need_lower = 0;
1951         int      i, j;
1952         long     *res_numbers = NULL;
1953         (void) mode;
1954
1955         if (is_lowered_type(tp)) {
1956                 call_tp = get_associated_type(tp);
1957         } else {
1958                 call_tp = tp;
1959         }  /* if */
1960
1961         assert(! is_lowered_type(call_tp));
1962
1963         n_params = get_method_n_params(call_tp);
1964         for (i = 0; i < n_params; ++i) {
1965                 ir_type *tp = get_method_param_type(call_tp, i);
1966
1967                 if (is_Primitive_type(tp)) {
1968                         ir_mode *mode = get_type_mode(tp);
1969
1970                         if (mode == env->params->high_signed ||
1971                                 mode == env->params->high_unsigned) {
1972                                 need_lower = 1;
1973                                 break;
1974                         }  /* if */
1975                 }  /* if */
1976         }  /* for */
1977         n_res = get_method_n_ress(call_tp);
1978         if (n_res > 0) {
1979                 NEW_ARR_A(long, res_numbers, n_res);
1980
1981                 for (i = j = 0; i < n_res; ++i, ++j) {
1982                         ir_type *tp = get_method_res_type(call_tp, i);
1983
1984                         res_numbers[i] = j;
1985                         if (is_Primitive_type(tp)) {
1986                                 ir_mode *mode = get_type_mode(tp);
1987
1988                                 if (mode == env->params->high_signed ||
1989                                         mode == env->params->high_unsigned) {
1990                                         need_lower = 1;
1991                                         ++j;
1992                                 }  /* if */
1993                         }  /* if */
1994                 }  /* for */
1995         }  /* if */
1996
1997         if (! need_lower)
1998                 return;
1999
2000         /* let's lower it */
2001         call_tp = lower_mtp(call_tp, env);
2002         set_Call_type(node, call_tp);
2003
2004         NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2005
2006         in[0] = get_Call_mem(node);
2007         in[1] = get_Call_ptr(node);
2008
2009         for (j = 2, i = 0; i < n_params; ++i) {
2010                 ir_node *pred = get_Call_param(node, i);
2011                 int     idx = get_irn_idx(pred);
2012
2013                 if (env->entries[idx]) {
2014                         if (! env->entries[idx]->low_word) {
2015                                 /* not ready yet, wait */
2016                                 pdeq_putr(env->waitq, node);
2017                                 return;
2018                         }
2019                         in[j++] = env->entries[idx]->low_word;
2020                         in[j++] = env->entries[idx]->high_word;
2021                 } else {
2022                         in[j++] = pred;
2023                 }  /* if */
2024         }  /* for */
2025
2026         set_irn_in(node, j, in);
2027
2028         /* fix the results */
2029         results = NULL;
2030         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2031                 long proj_nr = get_Proj_proj(proj);
2032
2033                 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2034                         /* found the result proj */
2035                         results = proj;
2036                         break;
2037                 }  /* if */
2038         }  /* for */
2039
2040         if (results) {          /* there are results */
2041                 int rem = get_optimize();
2042
2043                 /* switch off optimization for new Proj nodes or they might be CSE'ed
2044                    with not patched one's */
2045                 set_optimize(0);
2046                 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2047                         if (get_Proj_pred(proj) == results) {
2048                                 long proj_nr = get_Proj_proj(proj);
2049                                 int idx;
2050
2051                                 /* found a result */
2052                                 set_Proj_proj(proj, res_numbers[proj_nr]);
2053                                 idx = get_irn_idx(proj);
2054                                 if (env->entries[idx]) {
2055                                         ir_mode *mode = get_irn_mode(proj);
2056                                         ir_mode *low_mode = env->params->low_unsigned;
2057                                         dbg_info *dbg;
2058
2059                                         if (mode == env->params->high_signed) {
2060                                                 mode = env->params->low_signed;
2061                                         } else {
2062                                                 mode = env->params->low_unsigned;
2063                                         }  /* if */
2064
2065                                         dbg = get_irn_dbg_info(proj);
2066                                         env->entries[idx]->low_word  =
2067                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2068                                         env->entries[idx]->high_word =
2069                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2070                                 }  /* if */
2071                                 mark_irn_visited(proj);
2072                         }  /* if */
2073                 }  /* for */
2074                 set_optimize(rem);
2075         }
2076 }  /* lower_Call */
2077
2078 /**
2079  * Translate an Unknown into two.
2080  */
2081 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2082         int      idx = get_irn_idx(node);
2083         ir_graph *irg = current_ir_graph;
2084         ir_mode  *low_mode = env->params->low_unsigned;
2085
2086         env->entries[idx]->low_word  = new_r_Unknown(irg, low_mode);
2087         env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2088 }  /* lower_Unknown */
2089
2090 /**
2091  * Translate a Phi.
2092  *
2093  * First step: just create two templates
2094  */
2095 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2096         ir_mode  *mode_l = env->params->low_unsigned;
2097         ir_graph *irg = current_ir_graph;
2098         ir_node  *block, *unk_l, *unk_h, *phi_l, *phi_h;
2099         ir_node  **inl, **inh;
2100         dbg_info *dbg;
2101         int      idx, i, arity = get_Phi_n_preds(phi);
2102         int      enq = 0;
2103
2104         idx = get_irn_idx(phi);
2105         if (env->entries[idx]->low_word) {
2106                 /* Phi nodes already build, check for inputs */
2107                 ir_node *phil = env->entries[idx]->low_word;
2108                 ir_node *phih = env->entries[idx]->high_word;
2109
2110                 for (i = 0; i < arity; ++i) {
2111                         ir_node *pred = get_Phi_pred(phi, i);
2112                         int     idx = get_irn_idx(pred);
2113
2114                         if (env->entries[idx]->low_word) {
2115                                 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2116                                 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2117                         } else {
2118                                 /* still not ready */
2119                                 pdeq_putr(env->waitq, phi);
2120                                 return;
2121                         }  /* if */
2122                 }  /* for */
2123         }  /* if */
2124
2125         /* first create a new in array */
2126         NEW_ARR_A(ir_node *, inl, arity);
2127         NEW_ARR_A(ir_node *, inh, arity);
2128         unk_l = new_r_Unknown(irg, mode_l);
2129         unk_h = new_r_Unknown(irg, mode);
2130
2131         for (i = 0; i < arity; ++i) {
2132                 ir_node *pred = get_Phi_pred(phi, i);
2133                 int     idx = get_irn_idx(pred);
2134
2135                 if (env->entries[idx]->low_word) {
2136                         inl[i] = env->entries[idx]->low_word;
2137                         inh[i] = env->entries[idx]->high_word;
2138                 } else {
2139                         inl[i] = unk_l;
2140                         inh[i] = unk_h;
2141                         enq = 1;
2142                 }  /* if */
2143         }  /* for */
2144
2145         dbg   = get_irn_dbg_info(phi);
2146         block = get_nodes_block(phi);
2147
2148         idx = get_irn_idx(phi);
2149         assert(idx < env->n_entries);
2150         env->entries[idx]->low_word  = phi_l = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2151         env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2152
2153         /* Don't forget to link the new Phi nodes into the block! */
2154         add_Block_phi(block, phi_l);
2155         add_Block_phi(block, phi_h);
2156
2157         if (enq) {
2158                 /* not yet finished */
2159                 pdeq_putr(env->waitq, phi);
2160         }  /* if */
2161 }  /* lower_Phi */
2162
2163 /**
2164  * Translate a Mux.
2165  */
2166 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2167         ir_graph *irg = current_ir_graph;
2168         ir_node  *block, *val;
2169         ir_node  *true_l, *true_h, *false_l, *false_h, *sel;
2170         dbg_info *dbg;
2171         int      idx;
2172
2173         val = get_Mux_true(mux);
2174         idx = get_irn_idx(val);
2175         if (env->entries[idx]->low_word) {
2176                 /* Values already build */
2177                 true_l = env->entries[idx]->low_word;
2178                 true_h = env->entries[idx]->high_word;
2179         } else {
2180                 /* still not ready */
2181                 pdeq_putr(env->waitq, mux);
2182                 return;
2183         }  /* if */
2184
2185         val = get_Mux_false(mux);
2186         idx = get_irn_idx(val);
2187         if (env->entries[idx]->low_word) {
2188                 /* Values already build */
2189                 false_l = env->entries[idx]->low_word;
2190                 false_h = env->entries[idx]->high_word;
2191         } else {
2192                 /* still not ready */
2193                 pdeq_putr(env->waitq, mux);
2194                 return;
2195         }  /* if */
2196
2197
2198         sel = get_Mux_sel(mux);
2199
2200         dbg   = get_irn_dbg_info(mux);
2201         block = get_nodes_block(mux);
2202
2203         idx = get_irn_idx(mux);
2204         assert(idx < env->n_entries);
2205         env->entries[idx]->low_word  = new_rd_Mux(dbg, irg, block, sel, false_l, true_l, mode);
2206         env->entries[idx]->high_word = new_rd_Mux(dbg, irg, block, sel, false_h, true_h, mode);
2207 }  /* lower_Mux */
2208
2209 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env)
2210 {
2211         ir_mode *his = env->params->high_signed;
2212         ir_mode *hiu = env->params->high_unsigned;
2213         int      i;
2214         ir_node *n;
2215
2216         (void)mode;
2217
2218         for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2219                 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2220                 if (op_mode == his || op_mode == hiu) {
2221                         panic("lowering ASM unimplemented");
2222                 }
2223         }
2224
2225         for (n = asmn;;) {
2226                 ir_mode *proj_mode;
2227
2228                 n = get_irn_link(n);
2229                 if (n == NULL)
2230                         break;
2231
2232                 proj_mode = get_irn_mode(n);
2233                 if (proj_mode == his || proj_mode == hiu) {
2234                         panic("lowering ASM unimplemented");
2235                 }
2236         }
2237 }
2238
2239 /**
2240  * check for opcodes that must always be lowered.
2241  */
2242 static int always_lower(ir_opcode code) {
2243         switch (code) {
2244         case iro_ASM:
2245         case iro_Proj:
2246         case iro_Start:
2247         case iro_Call:
2248         case iro_Return:
2249         case iro_Cond:
2250         case iro_Conv:
2251                 return 1;
2252         default:
2253                 return 0;
2254         }  /* switch */
2255 }  /* always_lower */
2256
2257 /**
2258  * lower boolean Proj(Cmp)
2259  */
2260 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2261         int      lidx, ridx;
2262         ir_node  *l, *r, *low, *high, *t, *res;
2263         pn_Cmp   pnc;
2264         ir_node  *blk;
2265         ir_graph *irg = current_ir_graph;
2266         dbg_info *db;
2267
2268         l    = get_Cmp_left(cmp);
2269         lidx = get_irn_idx(l);
2270         if (! env->entries[lidx]->low_word) {
2271                 /* still not ready */
2272                 return NULL;
2273         }  /* if */
2274
2275         r    = get_Cmp_right(cmp);
2276         ridx = get_irn_idx(r);
2277         if (! env->entries[ridx]->low_word) {
2278                 /* still not ready */
2279                 return NULL;
2280         }  /* if */
2281
2282         pnc  = get_Proj_proj(proj);
2283         blk  = get_nodes_block(cmp);
2284         db   = get_irn_dbg_info(cmp);
2285         low  = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2286         high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2287
2288         if (pnc == pn_Cmp_Eq) {
2289                 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2290                 res = new_rd_And(db, irg, blk,
2291                         new_r_Proj(irg, blk, low, mode_b, pnc),
2292                         new_r_Proj(irg, blk, high, mode_b, pnc),
2293                         mode_b);
2294         } else if (pnc == pn_Cmp_Lg) {
2295                 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2296                 res = new_rd_Or(db, irg, blk,
2297                         new_r_Proj(irg, blk, low, mode_b, pnc),
2298                         new_r_Proj(irg, blk, high, mode_b, pnc),
2299                         mode_b);
2300         } else {
2301                 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2302                 t = new_rd_And(db, irg, blk,
2303                         new_r_Proj(irg, blk, low, mode_b, pnc),
2304                         new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2305                         mode_b);
2306                 res = new_rd_Or(db, irg, blk,
2307                         new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2308                         t,
2309                         mode_b);
2310         }  /* if */
2311         return res;
2312 }  /* lower_boolean_Proj_Cmp */
2313
2314 /**
2315  * The type of a lower function.
2316  *
2317  * @param node   the node to be lowered
2318  * @param mode   the low mode for the destination node
2319  * @param env    the lower environment
2320  */
2321 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2322
2323 /**
2324  * Lower a node.
2325  */
2326 static void lower_ops(ir_node *node, void *env)
2327 {
2328         lower_env_t  *lenv = env;
2329         node_entry_t *entry;
2330         int          idx = get_irn_idx(node);
2331         ir_mode      *mode = get_irn_mode(node);
2332
2333         if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2334                 int i;
2335
2336                 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2337                         ir_node *proj = get_irn_n(node, i);
2338
2339                         if (is_Proj(proj)) {
2340                                 ir_node *cmp = get_Proj_pred(proj);
2341
2342                                 if (is_Cmp(cmp)) {
2343                                         ir_node *arg = get_Cmp_left(cmp);
2344
2345                                         mode = get_irn_mode(arg);
2346                                         if (mode == lenv->params->high_signed ||
2347                                                 mode == lenv->params->high_unsigned) {
2348                                                 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2349
2350                                                 if (res == NULL) {
2351                                                         /* could not lower because predecessors not ready */
2352                                                         waitq_put(lenv->waitq, node);
2353                                                         return;
2354                                                 }  /* if */
2355                                                 set_irn_n(node, i, res);
2356                                         }  /* if */
2357                                 }  /* if */
2358                         }  /* if */
2359                 }  /* for */
2360         }  /* if */
2361
2362         entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2363         if (entry || always_lower(get_irn_opcode(node))) {
2364                 ir_op      *op = get_irn_op(node);
2365                 lower_func func = (lower_func)op->ops.generic;
2366
2367                 if (func) {
2368                         mode = get_irn_op_mode(node);
2369
2370                         if (mode == lenv->params->high_signed)
2371                                 mode = lenv->params->low_signed;
2372                         else
2373                                 mode = lenv->params->low_unsigned;
2374
2375                         DB((dbg, LEVEL_1, "  %+F\n", node));
2376                         func(node, mode, lenv);
2377                 }  /* if */
2378         }  /* if */
2379 }  /* lower_ops */
2380
2381 #define IDENT(s)  new_id_from_chars(s, sizeof(s)-1)
2382
2383 /**
2384  * Compare two op_mode_entry_t's.
2385  */
2386 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2387         const op_mode_entry_t *e1 = elt;
2388         const op_mode_entry_t *e2 = key;
2389         (void) size;
2390
2391         return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2392 }  /* cmp_op_mode */
2393
2394 /**
2395  * Compare two conv_tp_entry_t's.
2396  */
2397 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2398         const conv_tp_entry_t *e1 = elt;
2399         const conv_tp_entry_t *e2 = key;
2400         (void) size;
2401
2402         return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2403 }  /* static int cmp_conv_tp */
2404
2405 /**
2406  * Enter a lowering function into an ir_op.
2407  */
2408 static void enter_lower_func(ir_op *op, lower_func func) {
2409         op->ops.generic = (op_func)func;
2410 }
2411
2412 /*
2413  * Do the lowering.
2414  */
2415 void lower_dw_ops(const lwrdw_param_t *param)
2416 {
2417         lower_env_t lenv;
2418         int i;
2419         ir_graph *rem;
2420
2421         if (! param)
2422                 return;
2423
2424         if (! param->enable)
2425                 return;
2426
2427         FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2428
2429         assert(2 * get_mode_size_bits(param->low_signed)   == get_mode_size_bits(param->high_signed));
2430         assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2431         assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2432
2433         /* create the necessary maps */
2434         if (! prim_types)
2435                 prim_types = pmap_create();
2436         if (! intrinsic_fkt)
2437                 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2438         if (! conv_types)
2439                 conv_types = new_set(cmp_conv_tp, 16);
2440         if (! lowered_type)
2441                 lowered_type = pmap_create();
2442
2443         /* create a primitive unsigned and signed type */
2444         if (! tp_u)
2445                 tp_u = get_primitive_type(param->low_unsigned);
2446         if (! tp_s)
2447                 tp_s = get_primitive_type(param->low_signed);
2448
2449         /* create method types for the created binop calls */
2450         if (! binop_tp_u) {
2451                 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2452                 set_method_param_type(binop_tp_u, 0, tp_u);
2453                 set_method_param_type(binop_tp_u, 1, tp_u);
2454                 set_method_param_type(binop_tp_u, 2, tp_u);
2455                 set_method_param_type(binop_tp_u, 3, tp_u);
2456                 set_method_res_type(binop_tp_u, 0, tp_u);
2457                 set_method_res_type(binop_tp_u, 1, tp_u);
2458         }  /* if */
2459         if (! binop_tp_s) {
2460                 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2461                 set_method_param_type(binop_tp_s, 0, tp_u);
2462                 set_method_param_type(binop_tp_s, 1, tp_s);
2463                 set_method_param_type(binop_tp_s, 2, tp_u);
2464                 set_method_param_type(binop_tp_s, 3, tp_s);
2465                 set_method_res_type(binop_tp_s, 0, tp_u);
2466                 set_method_res_type(binop_tp_s, 1, tp_s);
2467         }  /* if */
2468         if (! shiftop_tp_u) {
2469                 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2470                 set_method_param_type(shiftop_tp_u, 0, tp_u);
2471                 set_method_param_type(shiftop_tp_u, 1, tp_u);
2472                 set_method_param_type(shiftop_tp_u, 2, tp_u);
2473                 set_method_res_type(shiftop_tp_u, 0, tp_u);
2474                 set_method_res_type(shiftop_tp_u, 1, tp_u);
2475         }  /* if */
2476         if (! shiftop_tp_s) {
2477                 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2478                 set_method_param_type(shiftop_tp_s, 0, tp_u);
2479                 set_method_param_type(shiftop_tp_s, 1, tp_s);
2480                 /* beware: shift count is always mode_Iu */
2481                 set_method_param_type(shiftop_tp_s, 2, tp_u);
2482                 set_method_res_type(shiftop_tp_s, 0, tp_u);
2483                 set_method_res_type(shiftop_tp_s, 1, tp_s);
2484         }  /* if */
2485         if (! unop_tp_u) {
2486                 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2487                 set_method_param_type(unop_tp_u, 0, tp_u);
2488                 set_method_param_type(unop_tp_u, 1, tp_u);
2489                 set_method_res_type(unop_tp_u, 0, tp_u);
2490                 set_method_res_type(unop_tp_u, 1, tp_u);
2491         }  /* if */
2492         if (! unop_tp_s) {
2493                 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2494                 set_method_param_type(unop_tp_s, 0, tp_u);
2495                 set_method_param_type(unop_tp_s, 1, tp_s);
2496                 set_method_res_type(unop_tp_s, 0, tp_u);
2497                 set_method_res_type(unop_tp_s, 1, tp_s);
2498         }  /* if */
2499
2500         lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
2501         lenv.tv_mode_bits  = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
2502         lenv.waitq         = new_pdeq();
2503         lenv.params        = param;
2504
2505         /* first clear the generic function pointer for all ops */
2506         clear_irp_opcodes_generic_func();
2507
2508 #define LOWER2(op, fkt)   enter_lower_func(op_##op, fkt)
2509 #define LOWER(op)         LOWER2(op, lower_##op)
2510 #define LOWER_BIN(op)     LOWER2(op, lower_Binop)
2511 #define LOWER_UN(op)      LOWER2(op, lower_Unop)
2512
2513         /* the table of all operations that must be lowered follows */
2514         LOWER(ASM);
2515         LOWER(Load);
2516         LOWER(Store);
2517         LOWER(Const);
2518         LOWER(And);
2519         LOWER(Or);
2520         LOWER(Eor);
2521         LOWER(Not);
2522         LOWER(Cond);
2523         LOWER(Return);
2524         LOWER(Call);
2525         LOWER(Unknown);
2526         LOWER(Phi);
2527         LOWER(Mux);
2528         LOWER(Start);
2529
2530         LOWER_BIN(Add);
2531         LOWER_BIN(Sub);
2532         LOWER_BIN(Mul);
2533         LOWER(Shl);
2534         LOWER(Shr);
2535         LOWER(Shrs);
2536         LOWER(Rotl);
2537         LOWER(DivMod);
2538         LOWER(Div);
2539         LOWER(Mod);
2540         LOWER_UN(Abs);
2541         LOWER_UN(Minus);
2542
2543         LOWER(Conv);
2544
2545 #undef LOWER_UN
2546 #undef LOWER_BIN
2547 #undef LOWER
2548 #undef LOWER2
2549
2550         /* transform all graphs */
2551         rem = current_ir_graph;
2552         for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2553                 ir_graph *irg = get_irp_irg(i);
2554                 int n_idx;
2555
2556                 obstack_init(&lenv.obst);
2557
2558                 n_idx = get_irg_last_idx(irg);
2559                 n_idx = n_idx + (n_idx >> 2);  /* add 25% */
2560                 lenv.n_entries = n_idx;
2561                 lenv.entries   = NEW_ARR_F(node_entry_t *, n_idx);
2562                 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2563
2564                 /* first step: link all nodes and allocate data */
2565                 lenv.flags = 0;
2566                 lenv.proj_2_block = pmap_create();
2567
2568                 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2569
2570                 irg_walk_graph(irg, firm_clear_node_and_phi_links, prepare_links_and_handle_rotl, &lenv);
2571
2572                 if (lenv.flags & MUST_BE_LOWERED) {
2573                         DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2574
2575                         /* must do some work */
2576                         irg_walk_graph(irg, NULL, lower_ops, &lenv);
2577
2578                         /* last step: all waiting nodes */
2579                         DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2580                         current_ir_graph = irg;
2581                         while (! pdeq_empty(lenv.waitq)) {
2582                                 ir_node *node = pdeq_getl(lenv.waitq);
2583
2584                                 lower_ops(node, &lenv);
2585                         }  /* while */
2586
2587                         ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2588
2589                         /* outs are invalid, we changed the graph */
2590                         set_irg_outs_inconsistent(irg);
2591
2592                         if (lenv.flags & CF_CHANGED) {
2593                                 /* control flow changed, dominance info is invalid */
2594                                 set_irg_doms_inconsistent(irg);
2595                                 set_irg_extblk_inconsistent(irg);
2596                                 set_irg_loopinfo_inconsistent(irg);
2597                         }  /* if */
2598                 } else {
2599                         ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2600                 }  /* if */
2601                 pmap_destroy(lenv.proj_2_block);
2602                 DEL_ARR_F(lenv.entries);
2603                 obstack_free(&lenv.obst, NULL);
2604         }  /* for */
2605         del_pdeq(lenv.waitq);
2606         current_ir_graph = rem;
2607 }  /* lower_dw_ops */
2608
2609 /* Default implementation. */
2610 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2611                                     const ir_mode *imode, const ir_mode *omode,
2612                                     void *context)
2613 {
2614         char buf[64];
2615         ident *id;
2616         ir_entity *ent;
2617         (void) context;
2618
2619         if (imode == omode) {
2620                 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2621         } else {
2622                 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2623                         get_mode_name(imode), get_mode_name(omode));
2624         }  /* if */
2625         id = new_id_from_str(buf);
2626
2627         ent = new_entity(get_glob_type(), id, method);
2628         set_entity_ld_ident(ent, get_entity_ident(ent));
2629         set_entity_visibility(ent, visibility_external_allocated);
2630         return ent;
2631 }  /* def_create_intrinsic_fkt */