2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
42 #include "irgraph_t.h"
47 #include "dbginfo_t.h"
48 #include "iropt_dbg.h"
62 /** A map from mode to a primitive type. */
63 static pmap *prim_types;
65 /** A map from (op, imode, omode) to Intrinsic functions entities. */
66 static set *intrinsic_fkt;
68 /** A map from (imode, omode) to conv function types. */
69 static set *conv_types;
71 /** A map from a method type to its lowered type. */
72 static pmap *lowered_type;
74 /** The types for the binop and unop intrinsics. */
75 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
77 /** the debug handle */
78 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
81 * An entry in the (op, imode, omode) -> entity map.
83 typedef struct _op_mode_entry {
84 const ir_op *op; /**< the op */
85 const ir_mode *imode; /**< the input mode */
86 const ir_mode *omode; /**< the output mode */
87 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
91 * An entry in the (imode, omode) -> tp map.
93 typedef struct _conv_tp_entry {
94 const ir_mode *imode; /**< the input mode */
95 const ir_mode *omode; /**< the output mode */
96 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
100 * Every double word node will be replaced,
101 * we need some store to hold the replacement:
103 typedef struct _node_entry_t {
104 ir_node *low_word; /**< the low word */
105 ir_node *high_word; /**< the high word */
109 MUST_BE_LOWERED = 1, /**< graph must be lowered */
110 CF_CHANGED = 2, /**< control flow was changed */
114 * The lower environment.
116 typedef struct _lower_env_t {
117 node_entry_t **entries; /**< entries per node */
118 struct obstack obst; /**< an obstack holding the temporary data */
119 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
120 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
121 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
122 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
123 const lwrdw_param_t *params; /**< transformation parameter */
124 unsigned flags; /**< some flags */
125 int n_entries; /**< number of entries */
129 * Get a primitive mode for a mode.
131 static ir_type *get_primitive_type(ir_mode *mode) {
132 pmap_entry *entry = pmap_find(prim_types, mode);
139 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
140 tp = new_type_primitive(new_id_from_str(buf), mode);
142 pmap_insert(prim_types, mode, tp);
144 } /* get_primitive_type */
147 * Create a method type for a Conv emulation from imode to omode.
149 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
150 conv_tp_entry_t key, *entry;
157 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
159 int n_param = 1, n_res = 1;
162 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
164 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
167 /* create a new one */
168 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
169 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
171 /* set param types and result types */
173 if (imode == env->params->high_signed) {
174 set_method_param_type(mtd, n_param++, tp_s);
175 set_method_param_type(mtd, n_param++, tp_s);
176 } else if (imode == env->params->high_unsigned) {
177 set_method_param_type(mtd, n_param++, tp_u);
178 set_method_param_type(mtd, n_param++, tp_u);
180 ir_type *tp = get_primitive_type(imode);
181 set_method_param_type(mtd, n_param++, tp);
185 if (omode == env->params->high_signed) {
186 set_method_res_type(mtd, n_res++, tp_s);
187 set_method_res_type(mtd, n_res++, tp_s);
188 } else if (omode == env->params->high_unsigned) {
189 set_method_res_type(mtd, n_res++, tp_u);
190 set_method_res_type(mtd, n_res++, tp_u);
192 ir_type *tp = get_primitive_type(omode);
193 set_method_res_type(mtd, n_res++, tp);
200 } /* get_conv_type */
203 * Add an additional control flow input to a block.
204 * Patch all Phi nodes. The new Phi inputs are copied from
205 * old input number nr.
207 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
209 int i, arity = get_irn_arity(block);
214 NEW_ARR_A(ir_node *, in, arity + 1);
215 for (i = 0; i < arity; ++i)
216 in[i] = get_irn_n(block, i);
219 set_irn_in(block, i + 1, in);
221 for (phi = get_irn_link(block); phi; phi = get_irn_link(phi)) {
222 for (i = 0; i < arity; ++i)
223 in[i] = get_irn_n(phi, i);
225 set_irn_in(phi, i + 1, in);
227 } /* add_block_cf_input_nr */
230 * Add an additional control flow input to a block.
231 * Patch all Phi nodes. The new Phi inputs are copied from
232 * old input from cf tmpl.
234 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
236 int i, arity = get_irn_arity(block);
239 for (i = 0; i < arity; ++i) {
240 if (get_irn_n(block, i) == tmpl) {
246 add_block_cf_input_nr(block, nr, cf);
247 } /* add_block_cf_input */
250 * Return the "operational" mode of a Firm node.
252 static ir_mode *get_irn_op_mode(ir_node *node)
254 switch (get_irn_opcode(node)) {
256 return get_Load_mode(node);
258 return get_irn_mode(get_Store_value(node));
260 return get_irn_mode(get_DivMod_left(node));
262 return get_irn_mode(get_Div_left(node));
264 return get_irn_mode(get_Mod_left(node));
266 return get_irn_mode(get_Cmp_left(node));
268 return get_irn_mode(node);
270 } /* get_irn_op_mode */
273 * Walker, prepare the node links.
275 static void prepare_links(ir_node *node, void *env)
277 lower_env_t *lenv = env;
278 ir_mode *mode = get_irn_op_mode(node);
282 if (mode == lenv->params->high_signed ||
283 mode == lenv->params->high_unsigned) {
284 /* ok, found a node that will be lowered */
285 link = obstack_alloc(&lenv->obst, sizeof(*link));
287 memset(link, 0, sizeof(*link));
289 lenv->entries[get_irn_idx(node)] = link;
290 lenv->flags |= MUST_BE_LOWERED;
291 } else if (get_irn_op(node) == op_Conv) {
292 /* Conv nodes have two modes */
293 ir_node *pred = get_Conv_op(node);
294 mode = get_irn_mode(pred);
296 if (mode == lenv->params->high_signed ||
297 mode == lenv->params->high_unsigned) {
298 /* must lower this node either but don't need a link */
299 lenv->flags |= MUST_BE_LOWERED;
305 /* link all Proj nodes to its predecessor:
306 Note that Tuple Proj's and its Projs are linked either. */
307 ir_node *pred = get_Proj_pred(node);
309 set_irn_link(node, get_irn_link(pred));
310 set_irn_link(pred, node);
311 } else if (is_Phi(node)) {
312 /* link all Phi nodes to its block */
313 ir_node *block = get_nodes_block(node);
315 set_irn_link(node, get_irn_link(block));
316 set_irn_link(block, node);
317 } else if (is_Block(node)) {
318 /* fill the Proj -> Block map */
319 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
320 ir_node *pred = get_Block_cfgpred(node, i);
323 pmap_insert(lenv->proj_2_block, pred, node);
326 } /* prepare_links */
329 * Translate a Constant: create two.
331 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
332 tarval *tv, *tv_l, *tv_h;
334 dbg_info *dbg = get_irn_dbg_info(node);
335 ir_node *block = get_nodes_block(node);
337 ir_graph *irg = current_ir_graph;
339 tv = get_Const_tarval(node);
341 tv_l = tarval_convert_to(tv, mode);
342 low = new_rd_Const(dbg, irg, block, mode, tv_l);
344 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
345 high = new_rd_Const(dbg, irg, block, mode, tv_h);
347 idx = get_irn_idx(node);
348 assert(idx < env->n_entries);
349 env->entries[idx]->low_word = low;
350 env->entries[idx]->high_word = high;
354 * Translate a Load: create two.
356 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
357 ir_graph *irg = current_ir_graph;
358 ir_node *adr = get_Load_ptr(node);
359 ir_node *mem = get_Load_mem(node);
360 ir_node *low, *high, *proj;
362 ir_node *block = get_nodes_block(node);
365 if (env->params->little_endian) {
367 high = new_r_Add(irg, block, adr,
368 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
371 low = new_r_Add(irg, block, adr,
372 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
377 /* create two loads */
378 dbg = get_irn_dbg_info(node);
379 low = new_rd_Load(dbg, irg, block, mem, low, mode);
380 proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
381 high = new_rd_Load(dbg, irg, block, proj, high, mode);
383 set_Load_volatility(low, get_Load_volatility(node));
384 set_Load_volatility(high, get_Load_volatility(node));
386 idx = get_irn_idx(node);
387 assert(idx < env->n_entries);
388 env->entries[idx]->low_word = low;
389 env->entries[idx]->high_word = high;
391 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
392 idx = get_irn_idx(proj);
394 switch (get_Proj_proj(proj)) {
395 case pn_Load_M: /* Memory result. */
396 /* put it to the second one */
397 set_Proj_pred(proj, high);
399 case pn_Load_X_except: /* Execution result if exception occurred. */
400 /* put it to the first one */
401 set_Proj_pred(proj, low);
403 case pn_Load_res: /* Result of load operation. */
404 assert(idx < env->n_entries);
405 env->entries[idx]->low_word = new_r_Proj(irg, block, low, mode, pn_Load_res);
406 env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode, pn_Load_res);
409 assert(0 && "unexpected Proj number");
411 /* mark this proj: we have handled it already, otherwise we might fall into
413 mark_irn_visited(proj);
418 * Translate a Store: create two.
420 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
422 ir_node *block, *adr, *mem;
423 ir_node *low, *high, *irn, *proj;
430 irn = get_Store_value(node);
431 entry = env->entries[get_irn_idx(irn)];
434 if (! entry->low_word) {
435 /* not ready yet, wait */
436 pdeq_putr(env->waitq, node);
440 irg = current_ir_graph;
441 adr = get_Store_ptr(node);
442 mem = get_Store_mem(node);
443 block = get_nodes_block(node);
445 if (env->params->little_endian) {
447 high = new_r_Add(irg, block, adr,
448 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
451 low = new_r_Add(irg, block, adr,
452 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
457 /* create two Stores */
458 dbg = get_irn_dbg_info(node);
459 low = new_rd_Store(dbg, irg, block, mem, low, entry->low_word);
460 proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
461 high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
463 set_Store_volatility(low, get_Store_volatility(node));
464 set_Store_volatility(high, get_Store_volatility(node));
466 idx = get_irn_idx(node);
467 assert(idx < env->n_entries);
468 env->entries[idx]->low_word = low;
469 env->entries[idx]->high_word = high;
471 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
472 idx = get_irn_idx(proj);
474 switch (get_Proj_proj(proj)) {
475 case pn_Store_M: /* Memory result. */
476 /* put it to the second one */
477 set_Proj_pred(proj, high);
479 case pn_Store_X_except: /* Execution result if exception occurred. */
480 /* put it to the first one */
481 set_Proj_pred(proj, low);
484 assert(0 && "unexpected Proj number");
486 /* mark this proj: we have handled it already, otherwise we might fall into
488 mark_irn_visited(proj);
493 * Return a node containing the address of the intrinsic emulation function.
495 * @param method the method type of the emulation function
496 * @param op the emulated ir_op
497 * @param imode the input mode of the emulated opcode
498 * @param omode the output mode of the emulated opcode
499 * @param block where the new mode is created
500 * @param env the lower environment
502 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
503 ir_mode *imode, ir_mode *omode,
504 ir_node *block, lower_env_t *env) {
507 op_mode_entry_t key, *entry;
514 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
515 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
517 /* create a new one */
518 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
520 assert(ent && "Intrinsic creator must return an entity");
526 return new_r_SymConst(current_ir_graph, block, sym, symconst_addr_ent);
527 } /* get_intrinsic_address */
532 * Create an intrinsic Call.
534 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
535 ir_node *block, *irn, *call, *proj;
544 irn = get_Div_left(node);
545 entry = env->entries[get_irn_idx(irn)];
548 if (! entry->low_word) {
549 /* not ready yet, wait */
550 pdeq_putr(env->waitq, node);
554 in[0] = entry->low_word;
555 in[1] = entry->high_word;
557 irn = get_Div_right(node);
558 entry = env->entries[get_irn_idx(irn)];
561 if (! entry->low_word) {
562 /* not ready yet, wait */
563 pdeq_putr(env->waitq, node);
567 in[2] = entry->low_word;
568 in[3] = entry->high_word;
570 dbg = get_irn_dbg_info(node);
571 block = get_nodes_block(node);
572 irg = current_ir_graph;
574 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
575 opmode = get_irn_op_mode(node);
576 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
577 call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
579 set_irn_pinned(call, get_irn_pinned(node));
580 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
582 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
583 switch (get_Proj_proj(proj)) {
584 case pn_Div_M: /* Memory result. */
585 /* reroute to the call */
586 set_Proj_pred(proj, call);
587 set_Proj_proj(proj, pn_Call_M_except);
589 case pn_Div_X_except: /* Execution result if exception occurred. */
590 /* reroute to the call */
591 set_Proj_pred(proj, call);
592 set_Proj_proj(proj, pn_Call_X_except);
594 case pn_Div_res: /* Result of computation. */
595 idx = get_irn_idx(proj);
596 assert(idx < env->n_entries);
597 env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0);
598 env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
601 assert(0 && "unexpected Proj number");
603 /* mark this proj: we have handled it already, otherwise we might fall into
605 mark_irn_visited(proj);
612 * Create an intrinsic Call.
614 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
615 ir_node *block, *proj, *irn, *call;
624 irn = get_Mod_left(node);
625 entry = env->entries[get_irn_idx(irn)];
628 if (! entry->low_word) {
629 /* not ready yet, wait */
630 pdeq_putr(env->waitq, node);
634 in[0] = entry->low_word;
635 in[1] = entry->high_word;
637 irn = get_Mod_right(node);
638 entry = env->entries[get_irn_idx(irn)];
641 if (! entry->low_word) {
642 /* not ready yet, wait */
643 pdeq_putr(env->waitq, node);
647 in[2] = entry->low_word;
648 in[3] = entry->high_word;
650 dbg = get_irn_dbg_info(node);
651 block = get_nodes_block(node);
652 irg = current_ir_graph;
654 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
655 opmode = get_irn_op_mode(node);
656 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
657 call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
659 set_irn_pinned(call, get_irn_pinned(node));
660 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
662 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
663 switch (get_Proj_proj(proj)) {
664 case pn_Mod_M: /* Memory result. */
665 /* reroute to the call */
666 set_Proj_pred(proj, call);
667 set_Proj_proj(proj, pn_Call_M_except);
669 case pn_Mod_X_except: /* Execution result if exception occurred. */
670 /* reroute to the call */
671 set_Proj_pred(proj, call);
672 set_Proj_proj(proj, pn_Call_X_except);
674 case pn_Mod_res: /* Result of computation. */
675 idx = get_irn_idx(proj);
676 assert(idx < env->n_entries);
677 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
678 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
681 assert(0 && "unexpected Proj number");
683 /* mark this proj: we have handled it already, otherwise we might fall into
685 mark_irn_visited(proj);
690 * Translate a DivMod.
692 * Create two intrinsic Calls.
694 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
695 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
696 ir_node *resDiv = NULL;
697 ir_node *resMod = NULL;
707 /* check if both results are needed */
708 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
709 switch (get_Proj_proj(proj)) {
710 case pn_DivMod_res_div: flags |= 1; break;
711 case pn_DivMod_res_mod: flags |= 2; break;
716 irn = get_DivMod_left(node);
717 entry = env->entries[get_irn_idx(irn)];
720 if (! entry->low_word) {
721 /* not ready yet, wait */
722 pdeq_putr(env->waitq, node);
726 in[0] = entry->low_word;
727 in[1] = entry->high_word;
729 irn = get_DivMod_right(node);
730 entry = env->entries[get_irn_idx(irn)];
733 if (! entry->low_word) {
734 /* not ready yet, wait */
735 pdeq_putr(env->waitq, node);
739 in[2] = entry->low_word;
740 in[3] = entry->high_word;
742 dbg = get_irn_dbg_info(node);
743 block = get_nodes_block(node);
744 irg = current_ir_graph;
746 mem = get_DivMod_mem(node);
748 callDiv = callMod = NULL;
749 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
751 opmode = get_irn_op_mode(node);
752 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
753 callDiv = new_rd_Call(dbg, irg, block, mem,
755 set_irn_pinned(callDiv, get_irn_pinned(node));
756 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
760 mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
761 opmode = get_irn_op_mode(node);
762 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
763 callMod = new_rd_Call(dbg, irg, block, mem,
765 set_irn_pinned(callMod, get_irn_pinned(node));
766 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
769 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
770 switch (get_Proj_proj(proj)) {
771 case pn_DivMod_M: /* Memory result. */
772 /* reroute to the first call */
773 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
774 set_Proj_proj(proj, pn_Call_M_except);
776 case pn_DivMod_X_except: /* Execution result if exception occurred. */
777 /* reroute to the first call */
778 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
779 set_Proj_proj(proj, pn_Call_X_except);
781 case pn_DivMod_res_div: /* Result of Div. */
782 idx = get_irn_idx(proj);
783 assert(idx < env->n_entries);
784 env->entries[idx]->low_word = new_r_Proj(irg, block, resDiv, mode, 0);
785 env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode, 1);
787 case pn_DivMod_res_mod: /* Result of Mod. */
788 idx = get_irn_idx(proj);
789 env->entries[idx]->low_word = new_r_Proj(irg, block, resMod, mode, 0);
790 env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode, 1);
793 assert(0 && "unexpected Proj number");
795 /* mark this proj: we have handled it already, otherwise we might fall into
797 mark_irn_visited(proj);
804 * Create an intrinsic Call.
806 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
807 ir_node *block, *irn;
815 irn = get_binop_left(node);
816 entry = env->entries[get_irn_idx(irn)];
819 if (! entry->low_word) {
820 /* not ready yet, wait */
821 pdeq_putr(env->waitq, node);
825 in[0] = entry->low_word;
826 in[1] = entry->high_word;
828 irn = get_binop_right(node);
829 entry = env->entries[get_irn_idx(irn)];
832 if (! entry->low_word) {
833 /* not ready yet, wait */
834 pdeq_putr(env->waitq, node);
838 in[2] = entry->low_word;
839 in[3] = entry->high_word;
841 dbg = get_irn_dbg_info(node);
842 block = get_nodes_block(node);
843 irg = current_ir_graph;
845 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
846 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
847 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
849 set_irn_pinned(irn, get_irn_pinned(node));
850 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
852 idx = get_irn_idx(node);
853 assert(idx < env->n_entries);
854 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
855 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
859 * Translate a Shiftop.
861 * Create an intrinsic Call.
863 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
864 ir_node *block, *irn;
872 irn = get_binop_left(node);
873 entry = env->entries[get_irn_idx(irn)];
876 if (! entry->low_word) {
877 /* not ready yet, wait */
878 pdeq_putr(env->waitq, node);
882 in[0] = entry->low_word;
883 in[1] = entry->high_word;
885 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
886 in[2] = get_binop_right(node);
888 dbg = get_irn_dbg_info(node);
889 block = get_nodes_block(node);
890 irg = current_ir_graph;
892 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
893 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
894 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
896 set_irn_pinned(irn, get_irn_pinned(node));
897 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
899 idx = get_irn_idx(node);
900 assert(idx < env->n_entries);
901 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
902 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
903 } /* lower_Shiftop */
906 * Translate a Shr and handle special cases.
908 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
909 ir_node *right = get_Shr_right(node);
910 ir_graph *irg = current_ir_graph;
912 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
913 tarval *tv = get_Const_tarval(right);
915 if (tarval_is_long(tv) &&
916 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
917 ir_node *block = get_nodes_block(node);
918 ir_node *left = get_Shr_left(node);
920 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
921 int idx = get_irn_idx(left);
923 left = env->entries[idx]->high_word;
924 idx = get_irn_idx(node);
927 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
928 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
930 env->entries[idx]->low_word = left;
932 env->entries[idx]->high_word = new_r_Const(irg, block, mode, get_mode_null(mode));
937 lower_Shiftop(node, mode, env);
941 * Translate a Shl and handle special cases.
943 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
944 ir_node *right = get_Shl_right(node);
945 ir_graph *irg = current_ir_graph;
947 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
948 tarval *tv = get_Const_tarval(right);
950 if (tarval_is_long(tv) &&
951 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
952 ir_node *block = get_nodes_block(node);
953 ir_node *left = get_Shl_left(node);
955 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
956 int idx = get_irn_idx(left);
958 left = env->entries[idx]->low_word;
959 idx = get_irn_idx(node);
962 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
963 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
965 env->entries[idx]->high_word = left;
967 env->entries[idx]->low_word = new_r_Const(irg, block, mode, get_mode_null(mode));
972 lower_Shiftop(node, mode, env);
976 * Translate a Shrs and handle special cases.
978 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
979 ir_node *right = get_Shrs_right(node);
980 ir_graph *irg = current_ir_graph;
982 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
983 tarval *tv = get_Const_tarval(right);
985 if (tarval_is_long(tv) &&
986 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
987 ir_node *block = get_nodes_block(node);
988 ir_node *left = get_Shrs_left(node);
989 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
991 int idx = get_irn_idx(left);
993 left = env->entries[idx]->high_word;
994 idx = get_irn_idx(node);
997 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
998 env->entries[idx]->low_word = new_r_Shrs(irg, block, left, c, mode);
1000 env->entries[idx]->low_word = left;
1002 c = new_r_Const_long(irg, block, mode_Iu, get_mode_size_bits(mode) - 1);
1003 env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1008 lower_Shiftop(node, mode, env);
1012 * Translate a Rot and handle special cases.
1014 static void lower_Rot(ir_node *node, ir_mode *mode, lower_env_t *env) {
1015 ir_node *right = get_Rot_right(node);
1017 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1018 tarval *tv = get_Const_tarval(right);
1020 if (tarval_is_long(tv) &&
1021 get_tarval_long(tv) == get_mode_size_bits(mode)) {
1022 ir_node *left = get_Rot_left(node);
1024 int idx = get_irn_idx(left);
1026 l = env->entries[idx]->low_word;
1027 h = env->entries[idx]->high_word;
1028 idx = get_irn_idx(node);
1030 env->entries[idx]->low_word = h;
1031 env->entries[idx]->high_word = l;
1036 lower_Shiftop(node, mode, env);
1040 * Translate an Unop.
1042 * Create an intrinsic Call.
1044 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1045 ir_node *block, *irn;
1051 node_entry_t *entry;
1053 irn = get_unop_op(node);
1054 entry = env->entries[get_irn_idx(irn)];
1057 if (! entry->low_word) {
1058 /* not ready yet, wait */
1059 pdeq_putr(env->waitq, node);
1063 in[0] = entry->low_word;
1064 in[1] = entry->high_word;
1066 dbg = get_irn_dbg_info(node);
1067 block = get_nodes_block(node);
1068 irg = current_ir_graph;
1070 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1071 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1072 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1074 set_irn_pinned(irn, get_irn_pinned(node));
1075 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1077 idx = get_irn_idx(node);
1078 assert(idx < env->n_entries);
1079 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
1080 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
1084 * Translate a logical Binop.
1086 * Create two logical Binops.
1088 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1089 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1090 ir_node *block, *irn;
1091 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1095 node_entry_t *entry;
1097 irn = get_binop_left(node);
1098 entry = env->entries[get_irn_idx(irn)];
1101 if (! entry->low_word) {
1102 /* not ready yet, wait */
1103 pdeq_putr(env->waitq, node);
1107 lop_l = entry->low_word;
1108 lop_h = entry->high_word;
1110 irn = get_binop_right(node);
1111 entry = env->entries[get_irn_idx(irn)];
1114 if (! entry->low_word) {
1115 /* not ready yet, wait */
1116 pdeq_putr(env->waitq, node);
1120 rop_l = entry->low_word;
1121 rop_h = entry->high_word;
1123 dbg = get_irn_dbg_info(node);
1124 block = get_nodes_block(node);
1126 idx = get_irn_idx(node);
1127 assert(idx < env->n_entries);
1128 irg = current_ir_graph;
1129 env->entries[idx]->low_word = constr_rd(dbg, irg, block, lop_l, rop_l, mode);
1130 env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1131 } /* lower_Binop_logical */
1133 /** create a logical operation tranformation */
1134 #define lower_logical(op) \
1135 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1136 lower_Binop_logical(node, mode, env, new_rd_##op); \
1146 * Create two logical Nots.
1148 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1149 ir_node *block, *irn;
1150 ir_node *op_l, *op_h;
1154 node_entry_t *entry;
1156 irn = get_Not_op(node);
1157 entry = env->entries[get_irn_idx(irn)];
1160 if (! entry->low_word) {
1161 /* not ready yet, wait */
1162 pdeq_putr(env->waitq, node);
1166 op_l = entry->low_word;
1167 op_h = entry->high_word;
1169 dbg = get_irn_dbg_info(node);
1170 block = get_nodes_block(node);
1171 irg = current_ir_graph;
1173 idx = get_irn_idx(node);
1174 assert(idx < env->n_entries);
1175 env->entries[idx]->low_word = new_rd_Not(dbg, current_ir_graph, block, op_l, mode);
1176 env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1180 * Translate a Minus.
1182 * Create two Minus'.
1184 static void lower_Minus(ir_node *node, ir_mode *mode, lower_env_t *env) {
1185 ir_node *block, *irn;
1186 ir_node *op_l, *op_h;
1190 node_entry_t *entry;
1192 irn = get_Minus_op(node);
1193 entry = env->entries[get_irn_idx(irn)];
1196 if (! entry->low_word) {
1197 /* not ready yet, wait */
1198 pdeq_putr(env->waitq, node);
1202 op_l = entry->low_word;
1203 op_h = entry->high_word;
1205 dbg = get_irn_dbg_info(node);
1206 block = get_nodes_block(node);
1207 irg = current_ir_graph;
1209 idx = get_irn_idx(node);
1210 assert(idx < env->n_entries);
1211 env->entries[idx]->low_word = new_rd_Minus(dbg, current_ir_graph, block, op_l, mode);
1212 env->entries[idx]->high_word = new_rd_Minus(dbg, current_ir_graph, block, op_h, mode);
1218 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1219 ir_node *cmp, *left, *right, *block;
1220 ir_node *sel = get_Cond_selector(node);
1221 ir_mode *m = get_irn_mode(sel);
1226 node_entry_t *lentry, *rentry;
1227 ir_node *proj, *projT = NULL, *projF = NULL;
1228 ir_node *new_bl, *cmpH, *cmpL, *irn;
1229 ir_node *projHF, *projHT;
1235 cmp = get_Proj_pred(sel);
1236 left = get_Cmp_left(cmp);
1237 idx = get_irn_idx(left);
1238 lentry = env->entries[idx];
1245 right = get_Cmp_right(cmp);
1246 idx = get_irn_idx(right);
1247 rentry = env->entries[idx];
1250 if (! lentry->low_word || !rentry->low_word) {
1252 pdeq_putr(env->waitq, node);
1256 /* all right, build the code */
1257 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1258 long proj_nr = get_Proj_proj(proj);
1260 if (proj_nr == pn_Cond_true) {
1261 assert(projT == NULL && "more than one Proj(true)");
1264 assert(proj_nr == pn_Cond_false);
1265 assert(projF == NULL && "more than one Proj(false)");
1268 mark_irn_visited(proj);
1270 assert(projT && projF);
1272 /* create a new high compare */
1273 block = get_nodes_block(cmp);
1274 dbg = get_irn_dbg_info(cmp);
1275 irg = current_ir_graph;
1277 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1279 pnc = get_Proj_proj(sel);
1280 if (pnc == pn_Cmp_Eq) {
1281 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1282 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1285 dst_blk = entry->value;
1287 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1288 dbg = get_irn_dbg_info(node);
1289 irn = new_rd_Cond(dbg, irg, block, irn);
1291 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1292 mark_irn_visited(projHF);
1293 exchange(projF, projHF);
1295 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1296 mark_irn_visited(projHT);
1298 new_bl = new_r_Block(irg, 1, &projHT);
1300 dbg = get_irn_dbg_info(cmp);
1301 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1302 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1303 dbg = get_irn_dbg_info(node);
1304 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1306 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1307 mark_irn_visited(proj);
1308 add_block_cf_input(dst_blk, projHF, proj);
1310 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1311 mark_irn_visited(proj);
1312 exchange(projT, proj);
1313 } else if (pnc == pn_Cmp_Lg) {
1314 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1315 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1318 dst_blk = entry->value;
1320 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1321 dbg = get_irn_dbg_info(node);
1322 irn = new_rd_Cond(dbg, irg, block, irn);
1324 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1325 mark_irn_visited(projHT);
1326 exchange(projT, projHT);
1328 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1329 mark_irn_visited(projHF);
1331 new_bl = new_r_Block(irg, 1, &projHF);
1333 dbg = get_irn_dbg_info(cmp);
1334 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1335 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1336 dbg = get_irn_dbg_info(node);
1337 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1339 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1340 mark_irn_visited(proj);
1341 add_block_cf_input(dst_blk, projHT, proj);
1343 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1344 mark_irn_visited(proj);
1345 exchange(projF, proj);
1347 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1348 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1351 entry = pmap_find(env->proj_2_block, projT);
1353 dstT = entry->value;
1355 entry = pmap_find(env->proj_2_block, projF);
1357 dstF = entry->value;
1359 irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1360 dbg = get_irn_dbg_info(node);
1361 irn = new_rd_Cond(dbg, irg, block, irn);
1363 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1364 mark_irn_visited(projHT);
1365 exchange(projT, projHT);
1368 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1369 mark_irn_visited(projHF);
1371 newbl_eq = new_r_Block(irg, 1, &projHF);
1373 irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1374 irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1376 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1377 mark_irn_visited(proj);
1378 exchange(projF, proj);
1381 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1382 mark_irn_visited(proj);
1384 newbl_l = new_r_Block(irg, 1, &proj);
1386 dbg = get_irn_dbg_info(cmp);
1387 cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1388 irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1389 dbg = get_irn_dbg_info(node);
1390 irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1392 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1393 mark_irn_visited(proj);
1394 add_block_cf_input(dstT, projT, proj);
1396 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1397 mark_irn_visited(proj);
1398 add_block_cf_input(dstF, projF, proj);
1401 /* we have changed the control flow */
1402 env->flags |= CF_CHANGED;
1404 idx = get_irn_idx(sel);
1406 if (env->entries[idx]) {
1408 Bad, a jump-table with double-word index.
1409 This should not happen, but if it does we handle
1410 it like a Conv were between (in other words, ignore
1414 if (! env->entries[idx]->low_word) {
1415 /* not ready yet, wait */
1416 pdeq_putr(env->waitq, node);
1419 set_Cond_selector(node, env->entries[idx]->low_word);
1425 * Translate a Conv to higher_signed
1427 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1428 ir_node *op = get_Conv_op(node);
1429 ir_mode *imode = get_irn_mode(op);
1430 ir_mode *dst_mode = env->params->low_signed;
1431 int idx = get_irn_idx(node);
1432 ir_graph *irg = current_ir_graph;
1433 ir_node *block = get_nodes_block(node);
1434 dbg_info *dbg = get_irn_dbg_info(node);
1436 assert(idx < env->n_entries);
1438 if (mode_is_int(imode) || mode_is_reference(imode)) {
1439 if (imode == env->params->high_unsigned) {
1440 /* a Conv from Lu to Ls */
1441 int op_idx = get_irn_idx(op);
1443 if (! env->entries[op_idx]->low_word) {
1444 /* not ready yet, wait */
1445 pdeq_putr(env->waitq, node);
1448 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1449 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1451 /* simple case: create a high word */
1452 if (imode != dst_mode)
1453 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1455 env->entries[idx]->low_word = op;
1456 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1457 new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode);
1460 ir_node *irn, *call;
1461 ir_mode *omode = env->params->high_signed;
1462 ir_type *mtp = get_conv_type(imode, omode, env);
1464 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1465 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1466 set_irn_pinned(call, get_irn_pinned(node));
1467 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1469 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1470 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1472 } /* lower_Conv_to_Ls */
1475 * Translate a Conv to higher_unsigned
1477 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1478 ir_node *op = get_Conv_op(node);
1479 ir_mode *imode = get_irn_mode(op);
1480 ir_mode *dst_mode = env->params->low_unsigned;
1481 int idx = get_irn_idx(node);
1482 ir_graph *irg = current_ir_graph;
1483 ir_node *block = get_nodes_block(node);
1484 dbg_info *dbg = get_irn_dbg_info(node);
1486 assert(idx < env->n_entries);
1488 if (mode_is_int(imode) || mode_is_reference(imode)) {
1489 if (imode == env->params->high_signed) {
1490 /* a Conv from Ls to Lu */
1491 int op_idx = get_irn_idx(op);
1493 if (! env->entries[op_idx]->low_word) {
1494 /* not ready yet, wait */
1495 pdeq_putr(env->waitq, node);
1498 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1499 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1501 /* simple case: create a high word */
1502 if (imode != dst_mode)
1503 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1505 env->entries[idx]->low_word = op;
1506 env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
1509 ir_node *irn, *call;
1510 ir_mode *omode = env->params->high_unsigned;
1511 ir_type *mtp = get_conv_type(imode, omode, env);
1513 /* do an intrinsic call */
1514 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1515 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1516 set_irn_pinned(call, get_irn_pinned(node));
1517 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1519 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1520 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1522 } /* lower_Conv_to_Lu */
1525 * Translate a Conv from higher_signed
1527 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1528 ir_node *op = get_Conv_op(node);
1529 ir_mode *omode = get_irn_mode(node);
1530 ir_node *block = get_nodes_block(node);
1531 dbg_info *dbg = get_irn_dbg_info(node);
1532 int idx = get_irn_idx(op);
1533 ir_graph *irg = current_ir_graph;
1535 assert(idx < env->n_entries);
1537 if (! env->entries[idx]->low_word) {
1538 /* not ready yet, wait */
1539 pdeq_putr(env->waitq, node);
1543 if (mode_is_int(omode) || mode_is_reference(omode)) {
1544 op = env->entries[idx]->low_word;
1546 /* simple case: create a high word */
1547 if (omode != env->params->low_signed)
1548 op = new_rd_Conv(dbg, irg, block, op, omode);
1550 set_Conv_op(node, op);
1552 ir_node *irn, *call, *in[2];
1553 ir_mode *imode = env->params->high_signed;
1554 ir_type *mtp = get_conv_type(imode, omode, env);
1556 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1557 in[0] = env->entries[idx]->low_word;
1558 in[1] = env->entries[idx]->high_word;
1560 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1561 set_irn_pinned(call, get_irn_pinned(node));
1562 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1564 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1566 } /* lower_Conv_from_Ls */
1569 * Translate a Conv from higher_unsigned
1571 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1572 ir_node *op = get_Conv_op(node);
1573 ir_mode *omode = get_irn_mode(node);
1574 ir_node *block = get_nodes_block(node);
1575 dbg_info *dbg = get_irn_dbg_info(node);
1576 int idx = get_irn_idx(op);
1577 ir_graph *irg = current_ir_graph;
1579 assert(idx < env->n_entries);
1581 if (! env->entries[idx]->low_word) {
1582 /* not ready yet, wait */
1583 pdeq_putr(env->waitq, node);
1587 if (mode_is_int(omode) || mode_is_reference(omode)) {
1588 op = env->entries[idx]->low_word;
1590 /* simple case: create a high word */
1591 if (omode != env->params->low_unsigned)
1592 op = new_rd_Conv(dbg, irg, block, op, omode);
1594 set_Conv_op(node, op);
1596 ir_node *irn, *call, *in[2];
1597 ir_mode *imode = env->params->high_unsigned;
1598 ir_type *mtp = get_conv_type(imode, omode, env);
1600 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1601 in[0] = env->entries[idx]->low_word;
1602 in[1] = env->entries[idx]->high_word;
1604 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1605 set_irn_pinned(call, get_irn_pinned(node));
1606 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1608 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1610 } /* lower_Conv_from_Lu */
1615 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1616 mode = get_irn_mode(node);
1618 if (mode == env->params->high_signed) {
1619 lower_Conv_to_Ls(node, env);
1620 } else if (mode == env->params->high_unsigned) {
1621 lower_Conv_to_Lu(node, env);
1623 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1625 if (mode == env->params->high_signed) {
1626 lower_Conv_from_Ls(node, env);
1627 } else if (mode == env->params->high_unsigned) {
1628 lower_Conv_from_Lu(node, env);
1634 * Lower the method type.
1636 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1641 if (is_lowered_type(mtp))
1644 entry = pmap_find(lowered_type, mtp);
1646 int i, n, r, n_param, n_res;
1648 /* count new number of params */
1649 n_param = n = get_method_n_params(mtp);
1650 for (i = n_param - 1; i >= 0; --i) {
1651 ir_type *tp = get_method_param_type(mtp, i);
1653 if (is_Primitive_type(tp)) {
1654 ir_mode *mode = get_type_mode(tp);
1656 if (mode == env->params->high_signed ||
1657 mode == env->params->high_unsigned)
1662 /* count new number of results */
1663 n_res = r = get_method_n_ress(mtp);
1664 for (i = n_res - 1; i >= 0; --i) {
1665 ir_type *tp = get_method_res_type(mtp, i);
1667 if (is_Primitive_type(tp)) {
1668 ir_mode *mode = get_type_mode(tp);
1670 if (mode == env->params->high_signed ||
1671 mode == env->params->high_unsigned)
1676 id = mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1677 res = new_type_method(id, n_param, n_res);
1679 /* set param types and result types */
1680 for (i = n_param = 0; i < n; ++i) {
1681 ir_type *tp = get_method_param_type(mtp, i);
1683 if (is_Primitive_type(tp)) {
1684 ir_mode *mode = get_type_mode(tp);
1686 if (mode == env->params->high_signed) {
1687 set_method_param_type(res, n_param++, tp_s);
1688 set_method_param_type(res, n_param++, tp_s);
1689 } else if (mode == env->params->high_unsigned) {
1690 set_method_param_type(res, n_param++, tp_u);
1691 set_method_param_type(res, n_param++, tp_u);
1693 set_method_param_type(res, n_param++, tp);
1696 set_method_param_type(res, n_param++, tp);
1699 for (i = n_res = 0; i < r; ++i) {
1700 ir_type *tp = get_method_res_type(mtp, i);
1702 if (is_Primitive_type(tp)) {
1703 ir_mode *mode = get_type_mode(tp);
1705 if (mode == env->params->high_signed) {
1706 set_method_res_type(res, n_res++, tp_s);
1707 set_method_res_type(res, n_res++, tp_s);
1708 } else if (mode == env->params->high_unsigned) {
1709 set_method_res_type(res, n_res++, tp_u);
1710 set_method_res_type(res, n_res++, tp_u);
1712 set_method_res_type(res, n_res++, tp);
1715 set_method_res_type(res, n_res++, tp);
1718 set_lowered_type(mtp, res);
1719 pmap_insert(lowered_type, mtp, res);
1727 * Translate a Return.
1729 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1730 ir_graph *irg = current_ir_graph;
1731 ir_entity *ent = get_irg_entity(irg);
1732 ir_type *mtp = get_entity_type(ent);
1738 /* check if this return must be lowered */
1739 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1740 ir_node *pred = get_Return_res(node, i);
1741 ir_mode *mode = get_irn_op_mode(pred);
1743 if (mode == env->params->high_signed ||
1744 mode == env->params->high_unsigned) {
1745 idx = get_irn_idx(pred);
1746 if (! env->entries[idx]->low_word) {
1747 /* not ready yet, wait */
1748 pdeq_putr(env->waitq, node);
1757 ent = get_irg_entity(irg);
1758 mtp = get_entity_type(ent);
1760 mtp = lower_mtp(mtp, env);
1761 set_entity_type(ent, mtp);
1763 /* create a new in array */
1764 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1765 in[0] = get_Return_mem(node);
1767 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1768 ir_node *pred = get_Return_res(node, i);
1770 idx = get_irn_idx(pred);
1771 assert(idx < env->n_entries);
1773 if (env->entries[idx]) {
1774 in[++j] = env->entries[idx]->low_word;
1775 in[++j] = env->entries[idx]->high_word;
1781 set_irn_in(node, j+1, in);
1782 } /* lower_Return */
1785 * Translate the parameters.
1787 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1788 ir_graph *irg = current_ir_graph;
1789 ir_entity *ent = get_irg_entity(irg);
1790 ir_type *tp = get_entity_type(ent);
1793 int i, j, n_params, rem;
1794 ir_node *proj, *args;
1797 if (is_lowered_type(tp)) {
1798 mtp = get_associated_type(tp);
1802 assert(! is_lowered_type(mtp));
1804 n_params = get_method_n_params(mtp);
1808 NEW_ARR_A(long, new_projs, n_params);
1810 /* first check if we have parameters that must be fixed */
1811 for (i = j = 0; i < n_params; ++i, ++j) {
1812 ir_type *tp = get_method_param_type(mtp, i);
1815 if (is_Primitive_type(tp)) {
1816 ir_mode *mode = get_type_mode(tp);
1818 if (mode == env->params->high_signed ||
1819 mode == env->params->high_unsigned)
1826 mtp = lower_mtp(mtp, env);
1827 set_entity_type(ent, mtp);
1829 /* switch off optimization for new Proj nodes or they might be CSE'ed
1830 with not patched one's */
1831 rem = get_optimize();
1834 /* ok, fix all Proj's and create new ones */
1835 args = get_irg_args(irg);
1836 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1837 ir_node *pred = get_Proj_pred(proj);
1843 /* do not visit this node again */
1844 mark_irn_visited(proj);
1849 proj_nr = get_Proj_proj(proj);
1850 set_Proj_proj(proj, new_projs[proj_nr]);
1852 idx = get_irn_idx(proj);
1853 if (env->entries[idx]) {
1854 mode = get_irn_mode(proj);
1856 if (mode == env->params->high_signed) {
1857 mode = env->params->low_signed;
1859 mode = env->params->low_unsigned;
1862 dbg = get_irn_dbg_info(proj);
1863 env->entries[idx]->low_word =
1864 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr]);
1865 env->entries[idx]->high_word =
1866 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1875 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1876 ir_graph *irg = current_ir_graph;
1877 ir_type *tp = get_Call_type(node);
1879 ir_node **in, *proj, *results;
1880 int n_params, n_res, need_lower = 0;
1882 long *res_numbers = NULL;
1885 if (is_lowered_type(tp)) {
1886 call_tp = get_associated_type(tp);
1891 assert(! is_lowered_type(call_tp));
1893 n_params = get_method_n_params(call_tp);
1894 for (i = 0; i < n_params; ++i) {
1895 ir_type *tp = get_method_param_type(call_tp, i);
1897 if (is_Primitive_type(tp)) {
1898 ir_mode *mode = get_type_mode(tp);
1900 if (mode == env->params->high_signed ||
1901 mode == env->params->high_unsigned) {
1907 n_res = get_method_n_ress(call_tp);
1909 NEW_ARR_A(long, res_numbers, n_res);
1911 for (i = j = 0; i < n_res; ++i, ++j) {
1912 ir_type *tp = get_method_res_type(call_tp, i);
1915 if (is_Primitive_type(tp)) {
1916 ir_mode *mode = get_type_mode(tp);
1918 if (mode == env->params->high_signed ||
1919 mode == env->params->high_unsigned) {
1930 /* let's lower it */
1931 call_tp = lower_mtp(call_tp, env);
1932 set_Call_type(node, call_tp);
1934 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
1936 in[0] = get_Call_mem(node);
1937 in[1] = get_Call_ptr(node);
1939 for (j = 2, i = 0; i < n_params; ++i) {
1940 ir_node *pred = get_Call_param(node, i);
1941 int idx = get_irn_idx(pred);
1943 if (env->entries[idx]) {
1944 if (! env->entries[idx]->low_word) {
1945 /* not ready yet, wait */
1946 pdeq_putr(env->waitq, node);
1949 in[j++] = env->entries[idx]->low_word;
1950 in[j++] = env->entries[idx]->high_word;
1956 set_irn_in(node, j, in);
1958 /* fix the results */
1960 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1961 long proj_nr = get_Proj_proj(proj);
1963 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
1964 /* found the result proj */
1970 if (results) { /* there are results */
1971 int rem = get_optimize();
1973 /* switch off optimization for new Proj nodes or they might be CSE'ed
1974 with not patched one's */
1976 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
1977 if (get_Proj_pred(proj) == results) {
1978 long proj_nr = get_Proj_proj(proj);
1981 /* found a result */
1982 set_Proj_proj(proj, res_numbers[proj_nr]);
1983 idx = get_irn_idx(proj);
1984 if (env->entries[idx]) {
1985 ir_mode *mode = get_irn_mode(proj);
1988 if (mode == env->params->high_signed) {
1989 mode = env->params->low_signed;
1991 mode = env->params->low_unsigned;
1994 dbg = get_irn_dbg_info(proj);
1995 env->entries[idx]->low_word =
1996 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr]);
1997 env->entries[idx]->high_word =
1998 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2000 mark_irn_visited(proj);
2008 * Translate an Unknown into two.
2010 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2011 int idx = get_irn_idx(node);
2012 ir_graph *irg = current_ir_graph;
2014 env->entries[idx]->low_word =
2015 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2016 } /* lower_Unknown */
2021 * First step: just create two templates
2023 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2024 ir_graph *irg = current_ir_graph;
2025 ir_node *block, *unk;
2026 ir_node **inl, **inh;
2028 int idx, i, arity = get_Phi_n_preds(phi);
2031 idx = get_irn_idx(phi);
2032 if (env->entries[idx]->low_word) {
2033 /* Phi nodes already build, check for inputs */
2034 ir_node *phil = env->entries[idx]->low_word;
2035 ir_node *phih = env->entries[idx]->high_word;
2037 for (i = 0; i < arity; ++i) {
2038 ir_node *pred = get_Phi_pred(phi, i);
2039 int idx = get_irn_idx(pred);
2041 if (env->entries[idx]->low_word) {
2042 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2043 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2045 /* still not ready */
2046 pdeq_putr(env->waitq, phi);
2052 /* first create a new in array */
2053 NEW_ARR_A(ir_node *, inl, arity);
2054 NEW_ARR_A(ir_node *, inh, arity);
2055 unk = new_r_Unknown(irg, mode);
2057 for (i = 0; i < arity; ++i) {
2058 ir_node *pred = get_Phi_pred(phi, i);
2059 int idx = get_irn_idx(pred);
2061 if (env->entries[idx]->low_word) {
2062 inl[i] = env->entries[idx]->low_word;
2063 inh[i] = env->entries[idx]->high_word;
2071 dbg = get_irn_dbg_info(phi);
2072 block = get_nodes_block(phi);
2074 idx = get_irn_idx(phi);
2075 assert(idx < env->n_entries);
2076 env->entries[idx]->low_word = new_rd_Phi(dbg, irg, block, arity, inl, mode);
2077 env->entries[idx]->high_word = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2080 /* not yet finished */
2081 pdeq_putr(env->waitq, phi);
2088 static void lower_Psi(ir_node *psi, ir_mode *mode, lower_env_t *env) {
2089 ir_graph *irg = current_ir_graph;
2090 ir_node *block, *val;
2091 ir_node **valsl, **valsh, **conds;
2093 int idx, i, n_conds = get_Psi_n_conds(psi);
2095 /* first create a new in array */
2096 NEW_ARR_A(ir_node *, valsl, n_conds + 1);
2097 NEW_ARR_A(ir_node *, valsh, n_conds + 1);
2099 for (i = 0; i < n_conds; ++i) {
2100 val = get_Psi_val(psi, i);
2101 idx = get_irn_idx(val);
2102 if (env->entries[idx]->low_word) {
2103 /* Values already build */
2104 valsl[i] = env->entries[idx]->low_word;
2105 valsh[i] = env->entries[idx]->high_word;
2107 /* still not ready */
2108 pdeq_putr(env->waitq, psi);
2112 val = get_Psi_default(psi);
2113 idx = get_irn_idx(val);
2114 if (env->entries[idx]->low_word) {
2115 /* Values already build */
2116 valsl[i] = env->entries[idx]->low_word;
2117 valsh[i] = env->entries[idx]->high_word;
2119 /* still not ready */
2120 pdeq_putr(env->waitq, psi);
2125 NEW_ARR_A(ir_node *, conds, n_conds);
2126 for (i = 0; i < n_conds; ++i) {
2127 conds[i] = get_Psi_cond(psi, i);
2130 dbg = get_irn_dbg_info(psi);
2131 block = get_nodes_block(psi);
2133 idx = get_irn_idx(psi);
2134 assert(idx < env->n_entries);
2135 env->entries[idx]->low_word = new_rd_Psi(dbg, irg, block, n_conds, conds, valsl, mode);
2136 env->entries[idx]->high_word = new_rd_Psi(dbg, irg, block, n_conds, conds, valsh, mode);
2140 * check for opcodes that must always be lowered.
2142 static int always_lower(ir_opcode code) {
2154 } /* always_lower */
2157 * lower boolean Proj(Cmp)
2159 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2161 ir_node *l, *r, *low, *high, *t, *res;
2164 ir_graph *irg = current_ir_graph;
2167 l = get_Cmp_left(cmp);
2168 lidx = get_irn_idx(l);
2169 if (! env->entries[lidx]->low_word) {
2170 /* still not ready */
2174 r = get_Cmp_right(cmp);
2175 ridx = get_irn_idx(r);
2176 if (! env->entries[ridx]->low_word) {
2177 /* still not ready */
2181 pnc = get_Proj_proj(proj);
2182 blk = get_nodes_block(cmp);
2183 db = get_irn_dbg_info(cmp);
2184 low = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2185 high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2187 if (pnc == pn_Cmp_Eq) {
2188 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2189 res = new_rd_And(db, irg, blk,
2190 new_r_Proj(irg, blk, low, mode_b, pnc),
2191 new_r_Proj(irg, blk, high, mode_b, pnc),
2193 } else if (pnc == pn_Cmp_Lg) {
2194 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2195 res = new_rd_Or(db, irg, blk,
2196 new_r_Proj(irg, blk, low, mode_b, pnc),
2197 new_r_Proj(irg, blk, high, mode_b, pnc),
2200 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2201 t = new_rd_And(db, irg, blk,
2202 new_r_Proj(irg, blk, low, mode_b, pnc),
2203 new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2205 res = new_rd_Or(db, irg, blk,
2206 new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2211 } /* lower_boolean_Proj_Cmp */
2214 * The type of a lower function.
2216 * @param node the node to be lowered
2217 * @param mode the low mode for the destination node
2218 * @param env the lower environment
2220 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2225 static void lower_ops(ir_node *node, void *env)
2227 lower_env_t *lenv = env;
2228 node_entry_t *entry;
2229 int idx = get_irn_idx(node);
2230 ir_mode *mode = get_irn_mode(node);
2232 if (mode == mode_b || get_irn_op(node) == op_Psi) {
2235 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2236 ir_node *proj = get_irn_n(node, i);
2238 if (is_Proj(proj)) {
2239 ir_node *cmp = get_Proj_pred(proj);
2242 ir_node *arg = get_Cmp_left(cmp);
2244 mode = get_irn_mode(arg);
2245 if (mode == lenv->params->high_signed ||
2246 mode == lenv->params->high_unsigned) {
2247 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2250 /* could not lower because predecessors not ready */
2251 waitq_put(lenv->waitq, node);
2254 set_irn_n(node, i, res);
2261 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2262 if (entry || always_lower(get_irn_opcode(node))) {
2263 ir_op *op = get_irn_op(node);
2264 lower_func func = (lower_func)op->ops.generic;
2267 mode = get_irn_op_mode(node);
2269 if (mode == lenv->params->high_signed)
2270 mode = lenv->params->low_signed;
2272 mode = lenv->params->low_unsigned;
2274 DB((dbg, LEVEL_1, " %+F\n", node));
2275 func(node, mode, lenv);
2280 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2283 * Compare two op_mode_entry_t's.
2285 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2286 const op_mode_entry_t *e1 = elt;
2287 const op_mode_entry_t *e2 = key;
2290 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2294 * Compare two conv_tp_entry_t's.
2296 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2297 const conv_tp_entry_t *e1 = elt;
2298 const conv_tp_entry_t *e2 = key;
2301 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2302 } /* static int cmp_conv_tp */
2307 void lower_dw_ops(const lwrdw_param_t *param)
2316 if (! param->enable)
2319 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2321 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2322 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2323 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2325 /* create the necessary maps */
2327 prim_types = pmap_create();
2328 if (! intrinsic_fkt)
2329 intrinsic_fkt = new_set(cmp_op_mode, iro_MaxOpcode);
2331 conv_types = new_set(cmp_conv_tp, 16);
2333 lowered_type = pmap_create();
2335 /* create a primitive unsigned and signed type */
2337 tp_u = get_primitive_type(param->low_unsigned);
2339 tp_s = get_primitive_type(param->low_signed);
2341 /* create method types for the created binop calls */
2343 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2344 set_method_param_type(binop_tp_u, 0, tp_u);
2345 set_method_param_type(binop_tp_u, 1, tp_u);
2346 set_method_param_type(binop_tp_u, 2, tp_u);
2347 set_method_param_type(binop_tp_u, 3, tp_u);
2348 set_method_res_type(binop_tp_u, 0, tp_u);
2349 set_method_res_type(binop_tp_u, 1, tp_u);
2352 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2353 set_method_param_type(binop_tp_s, 0, tp_s);
2354 set_method_param_type(binop_tp_s, 1, tp_s);
2355 set_method_param_type(binop_tp_s, 2, tp_s);
2356 set_method_param_type(binop_tp_s, 3, tp_s);
2357 set_method_res_type(binop_tp_s, 0, tp_s);
2358 set_method_res_type(binop_tp_s, 1, tp_s);
2360 if (! shiftop_tp_u) {
2361 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2362 set_method_param_type(shiftop_tp_u, 0, tp_u);
2363 set_method_param_type(shiftop_tp_u, 1, tp_u);
2364 set_method_param_type(shiftop_tp_u, 2, tp_u);
2365 set_method_res_type(shiftop_tp_u, 0, tp_u);
2366 set_method_res_type(shiftop_tp_u, 1, tp_u);
2368 if (! shiftop_tp_s) {
2369 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2370 set_method_param_type(shiftop_tp_s, 0, tp_s);
2371 set_method_param_type(shiftop_tp_s, 1, tp_s);
2372 /* beware: shift count is always mode_Iu */
2373 set_method_param_type(shiftop_tp_s, 2, tp_u);
2374 set_method_res_type(shiftop_tp_s, 0, tp_s);
2375 set_method_res_type(shiftop_tp_s, 1, tp_s);
2378 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2379 set_method_param_type(unop_tp_u, 0, tp_u);
2380 set_method_param_type(unop_tp_u, 1, tp_u);
2381 set_method_res_type(unop_tp_u, 0, tp_u);
2382 set_method_res_type(unop_tp_u, 1, tp_u);
2385 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2386 set_method_param_type(unop_tp_s, 0, tp_s);
2387 set_method_param_type(unop_tp_s, 1, tp_s);
2388 set_method_res_type(unop_tp_s, 0, tp_s);
2389 set_method_res_type(unop_tp_s, 1, tp_s);
2392 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
2393 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
2394 lenv.waitq = new_pdeq();
2395 lenv.params = param;
2397 /* first clear the generic function pointer for all ops */
2398 clear_irp_opcodes_generic_func();
2400 #define LOWER2(op, fkt) op_##op->ops.generic = (op_func)fkt
2401 #define LOWER(op) LOWER2(op, lower_##op)
2402 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2403 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2405 /* the table of all operations that must be lowered follows */
2441 /* transform all graphs */
2442 rem = current_ir_graph;
2443 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2444 ir_graph *irg = get_irp_irg(i);
2447 obstack_init(&lenv.obst);
2449 n_idx = get_irg_last_idx(irg);
2450 lenv.n_entries = n_idx;
2451 lenv.entries = xmalloc(n_idx * sizeof(lenv.entries[0]));
2452 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2454 /* first step: link all nodes and allocate data */
2456 lenv.proj_2_block = pmap_create();
2457 irg_walk_graph(irg, firm_clear_link, prepare_links, &lenv);
2459 if (lenv.flags & MUST_BE_LOWERED) {
2460 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2462 /* must do some work */
2463 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2465 /* last step: all waiting nodes */
2466 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2467 current_ir_graph = irg;
2468 while (! pdeq_empty(lenv.waitq)) {
2469 ir_node *node = pdeq_getl(lenv.waitq);
2471 lower_ops(node, &lenv);
2474 /* outs are invalid, we changed the graph */
2475 set_irg_outs_inconsistent(irg);
2477 if (lenv.flags & CF_CHANGED) {
2478 /* control flow changed, dominance info is invalid */
2479 set_irg_doms_inconsistent(irg);
2480 set_irg_extblk_inconsistent(irg);
2481 set_irg_loopinfo_inconsistent(irg);
2484 pmap_destroy(lenv.proj_2_block);
2486 obstack_free(&lenv.obst, NULL);
2488 del_pdeq(lenv.waitq);
2489 current_ir_graph = rem;
2490 } /* lower_dw_ops */
2492 /* Default implementation. */
2493 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2494 const ir_mode *imode, const ir_mode *omode,
2502 if (imode == omode) {
2503 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2505 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2506 get_mode_name(imode), get_mode_name(omode));
2508 id = new_id_from_str(buf);
2510 ent = new_entity(get_glob_type(), id, method);
2511 set_entity_ld_ident(ent, get_entity_ident(ent));
2512 set_entity_visibility(ent, visibility_external_allocated);
2514 } /* def_create_intrinsic_fkt */